arm: spear: Add BCH4 SW support to SPEAr600 x600 board

This board is equipped with a Micron NAND chip (MT29F1G08ABADAH4) that
needs 4-bit ECC. But the SPEAr600 only supports 1-bit HW ECC internally.
This patch enables the SW 4-bit BCH support for this board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
master
Stefan Roese 9 years ago committed by Tom Rini
parent da53ba0219
commit 0ddc5a2dee
  1. 2
      include/configs/x600.h

@ -67,6 +67,8 @@
#define CONFIG_MTD_ECC_SOFT
#define CONFIG_SYS_FSMC_NAND_8BIT
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_NAND_ECC_BCH
#define CONFIG_BCH
/* UBI/UBI config options */
#define CONFIG_MTD_DEVICE

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