Exynos5: ddr3: Choose between single or double channel config

Add a 4G configuration and choose it based on the number of banks
declared in config file. A board with 4 SDRAM banks declared (as
per CONFIG_NR_DRAM_BANKS) will end up with the 2G confiuration.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

arch/arm/cpu/armv7/exynos/dmc_init_ddr3.c

@@ -464,6 +464,16 @@ int ddr3_mem_ctrl_init(struct mem_timings *mem, int reset)
 							+ DMC_OFFSET);
 	pmu = (struct exynos5_power *)EXYNOS5420_POWER_BASE;
 
+	if (CONFIG_NR_DRAM_BANKS > 4) {
+		/* Need both controllers. */
+		mem->memcontrol |= DMC_MEMCONTROL_NUM_CHIP_2;
+		mem->chips_per_channel = 2;
+		mem->chips_to_configure = 2;
+	} else {
+		/* 2GB requires a single controller */
+		mem->memcontrol |= DMC_MEMCONTROL_NUM_CHIP_1;
+	}
+
 	/* Enable PAUSE for DREX */
 	setbits_le32(&clk->pause, ENABLE_BIT);