This patch adds support for the Favr-32 board made by EarthLCD. This kit, which is also called ezLCD-101 when running with EarthLCD firmware, has a 10.4" touch screen LCD panel, 16 MB 32-bit SDRAM, 8 MB parallel flash, Ethernet, audio out, USB device, SD-card slot, USART and various other connectors for cennecting stuff to SPI, I2C, GPIO, etc. Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>master
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#
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# (C) Copyright 2001-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# Copyright (C) 2008 Atmel Corporation
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#
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# See file CREDITS for list of people who contributed to this project.
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#
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# This program is free software; you can redistribute it and/or modify it under
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# the terms of the GNU General Public License as published by the Free Software
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# Foundation; either version 2 of the License, or (at your option) any later
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# version.
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#
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# This program is distributed in the hope that it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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# FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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# details.
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#
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# You should have received a copy of the GNU General Public License along with
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# this program; if not, write to the Free Software Foundation, Inc., 59 Temple
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# Place, Suite 330, Boston, MA 02111-1307 USA
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include $(TOPDIR)/config.mk |
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LIB := $(obj)lib$(BOARD).a
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COBJS := $(BOARD).o flash.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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$(LIB): $(obj).depend $(OBJS) |
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$(AR) $(ARFLAGS) $@ $(OBJS)
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
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PLATFORM_LDFLAGS += --gc-sections
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TEXT_BASE = 0x00000000
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LDSCRIPT = $(obj)board/earthlcd/favr-32-ezkit/u-boot.lds
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@ -0,0 +1,96 @@ |
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/*
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* Copyright (C) 2008 Atmel Corporation |
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* |
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* See file CREDITS for list of people who contributed to this project. |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by the Free |
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* Software Foundation; either version 2 of the License, or (at your option) |
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* any later version. |
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* |
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* This program is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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* more details. |
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* |
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* You should have received a copy of the GNU General Public License along with |
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple |
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* Place, Suite 330, Boston, MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/io.h> |
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#include <asm/sdram.h> |
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#include <asm/arch/clk.h> |
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#include <asm/arch/gpio.h> |
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#include <asm/arch/hmatrix.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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static const struct sdram_config sdram_config = { |
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/* MT48LC4M32B2P-6 (16 MB) */ |
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.data_bits = SDRAM_DATA_32BIT, |
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.row_bits = 12, |
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.col_bits = 8, |
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.bank_bits = 2, |
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.cas = 3, |
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.twr = 2, |
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.trc = 7, |
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.trp = 2, |
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.trcd = 2, |
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.tras = 5, |
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.txsr = 5, |
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/* 15.6 us */ |
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.refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000, |
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}; |
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int board_early_init_f(void) |
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{ |
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/* Enable SDRAM in the EBI mux */ |
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hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); |
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gpio_enable_ebi(); |
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gpio_enable_usart3(); |
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#if defined(CONFIG_MACB) |
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gpio_enable_macb0(); |
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#endif |
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#if defined(CONFIG_MMC) |
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gpio_enable_mmci(); |
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#endif |
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return 0; |
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} |
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phys_size_t initdram(int board_type) |
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{ |
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unsigned long expected_size; |
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unsigned long actual_size; |
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void *sdram_base; |
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sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE); |
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expected_size = sdram_init(sdram_base, &sdram_config); |
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actual_size = get_ram_size(sdram_base, expected_size); |
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unmap_physmem(sdram_base, EBI_SDRAM_SIZE); |
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if (expected_size != actual_size) |
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printf("Warning: Only %u of %u MiB SDRAM is working\n", |
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actual_size >> 20, expected_size >> 20); |
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return actual_size; |
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} |
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void board_init_info(void) |
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{ |
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gd->bd->bi_phy_id[0] = 0x01; |
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} |
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#if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET) |
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extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); |
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int board_eth_init(bd_t *bi) |
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{ |
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return macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]); |
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} |
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#endif |
@ -0,0 +1,230 @@ |
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/*
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* Copyright (C) 2008 Atmel Corporation |
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* |
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* See file CREDITS for list of people who contributed to this project. |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by the Free |
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* Software Foundation; either version 2 of the License, or (at your option) |
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* any later version. |
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* |
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* This program is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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* more details. |
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* |
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* You should have received a copy of the GNU General Public License along with |
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple |
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* Place, Suite 330, Boston, MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#ifdef CONFIG_FAVR32_EZKIT_EXT_FLASH |
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#include <asm/cacheflush.h> |
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#include <asm/io.h> |
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#include <asm/sections.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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flash_info_t flash_info[1]; |
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static void flash_identify(uint16_t *flash, flash_info_t *info) |
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{ |
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unsigned long flags; |
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flags = disable_interrupts(); |
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dcache_flush_unlocked(); |
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writew(0xaa, flash + 0x555); |
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writew(0x55, flash + 0xaaa); |
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writew(0x90, flash + 0x555); |
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info->flash_id = readl(flash); |
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writew(0xff, flash); |
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readw(flash); |
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if (flags) |
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enable_interrupts(); |
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} |
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unsigned long flash_init(void) |
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{ |
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unsigned long addr; |
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unsigned int i; |
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flash_info[0].size = CFG_FLASH_SIZE; |
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flash_info[0].sector_count = 135; |
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flash_identify(uncached((void *)CFG_FLASH_BASE), &flash_info[0]); |
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for (i = 0, addr = 0; i < 8; i++, addr += 0x2000) |
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flash_info[0].start[i] = addr; |
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for (; i < flash_info[0].sector_count; i++, addr += 0x10000) |
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flash_info[0].start[i] = addr; |
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return CFG_FLASH_SIZE; |
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} |
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void flash_print_info(flash_info_t *info) |
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{ |
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printf("Flash: Vendor ID: 0x%02x, Product ID: 0x%02x\n", |
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info->flash_id >> 16, info->flash_id & 0xffff); |
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printf("Size: %ld MB in %d sectors\n", |
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info->size >> 10, info->sector_count); |
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} |
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int flash_erase(flash_info_t *info, int s_first, int s_last) |
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{ |
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unsigned long flags; |
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unsigned long start_time; |
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uint16_t *fb, *sb; |
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unsigned int i; |
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int ret; |
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uint16_t status; |
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if ((s_first < 0) || (s_first > s_last) |
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|| (s_last >= info->sector_count)) { |
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puts("Error: first and/or last sector out of range\n"); |
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return ERR_INVAL; |
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} |
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for (i = s_first; i < s_last; i++) |
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if (info->protect[i]) { |
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printf("Error: sector %d is protected\n", i); |
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return ERR_PROTECTED; |
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} |
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fb = (uint16_t *)uncached(info->start[0]); |
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dcache_flush_unlocked(); |
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for (i = s_first; (i <= s_last) && !ctrlc(); i++) { |
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printf("Erasing sector %3d...", i); |
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sb = (uint16_t *)uncached(info->start[i]); |
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flags = disable_interrupts(); |
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start_time = get_timer(0); |
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/* Unlock sector */ |
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writew(0xaa, fb + 0x555); |
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writew(0x70, sb); |
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/* Erase sector */ |
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writew(0xaa, fb + 0x555); |
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writew(0x55, fb + 0xaaa); |
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writew(0x80, fb + 0x555); |
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writew(0xaa, fb + 0x555); |
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writew(0x55, fb + 0xaaa); |
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writew(0x30, sb); |
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/* Wait for completion */ |
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ret = ERR_OK; |
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do { |
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/* TODO: Timeout */ |
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status = readw(sb); |
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} while ((status != 0xffff) && !(status & 0x28)); |
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writew(0xf0, fb); |
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/*
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* Make sure the command actually makes it to the bus |
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* before we re-enable interrupts. |
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*/ |
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readw(fb); |
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if (flags) |
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enable_interrupts(); |
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if (status != 0xffff) { |
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printf("Flash erase error at address 0x%p: 0x%02x\n", |
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sb, status); |
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ret = ERR_PROG_ERROR; |
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break; |
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} |
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} |
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if (ctrlc()) |
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printf("User interrupt!\n"); |
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return ERR_OK; |
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} |
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int write_buff(flash_info_t *info, uchar *src, |
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ulong addr, ulong count) |
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{ |
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unsigned long flags; |
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uint16_t *base, *p, *s, *end; |
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uint16_t word, status, status1; |
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int ret = ERR_OK; |
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if (addr < info->start[0] |
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|| (addr + count) > (info->start[0] + info->size) |
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|| (addr + count) < addr) { |
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puts("Error: invalid address range\n"); |
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return ERR_INVAL; |
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} |
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if (addr & 1 || count & 1 || (unsigned int)src & 1) { |
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puts("Error: misaligned source, destination or count\n"); |
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return ERR_ALIGN; |
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} |
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base = (uint16_t *)uncached(info->start[0]); |
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end = (uint16_t *)uncached(addr + count); |
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flags = disable_interrupts(); |
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dcache_flush_unlocked(); |
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sync_write_buffer(); |
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for (p = (uint16_t *)uncached(addr), s = (uint16_t *)src; |
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p < end && !ctrlc(); p++, s++) { |
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word = *s; |
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writew(0xaa, base + 0x555); |
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writew(0x55, base + 0xaaa); |
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writew(0xa0, base + 0x555); |
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writew(word, p); |
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sync_write_buffer(); |
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/* Wait for completion */ |
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status1 = readw(p); |
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do { |
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/* TODO: Timeout */ |
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status = status1; |
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status1 = readw(p); |
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} while (((status ^ status1) & 0x40) /* toggled */ |
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&& !(status1 & 0x28)); /* error bits */ |
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/*
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* We'll need to check once again for toggle bit |
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* because the toggle bit may stop toggling as I/O5 |
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* changes to "1" (ref at49bv642.pdf p9) |
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*/ |
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status1 = readw(p); |
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status = readw(p); |
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if ((status ^ status1) & 0x40) { |
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printf("Flash write error at address 0x%p: " |
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"0x%02x != 0x%02x\n", |
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p, status,word); |
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ret = ERR_PROG_ERROR; |
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writew(0xf0, base); |
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readw(base); |
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break; |
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} |
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writew(0xf0, base); |
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readw(base); |
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} |
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if (flags) |
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enable_interrupts(); |
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return ret; |
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} |
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#endif /* CONFIG_FAVR32_EZKIT_EXT_FLASH */ |
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/* -*- Fundamental -*- |
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* |
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* Copyright (C) 2008 Atmel Corporation |
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* |
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* See file CREDITS for list of people who contributed to this project. |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by the Free |
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* Software Foundation; either version 2 of the License, or (at your option) |
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* any later version. |
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* |
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* This program is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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* more details. |
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* |
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* You should have received a copy of the GNU General Public License along with |
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple |
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* Place, Suite 330, Boston, MA 02111-1307 USA |
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*/ |
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OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") |
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OUTPUT_ARCH(avr32) |
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ENTRY(_start) |
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SECTIONS |
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{ |
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. = 0; |
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_text = .; |
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.text : { |
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*(.exception.text) |
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*(.text) |
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*(.text.*) |
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} |
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_etext = .; |
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.rodata : { |
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*(.rodata) |
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*(.rodata.*) |
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} |
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. = ALIGN(8); |
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_data = .; |
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.data : { |
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*(.data) |
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*(.data.*) |
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} |
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. = ALIGN(4); |
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__u_boot_cmd_start = .; |
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.u_boot_cmd : { |
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KEEP(*(.u_boot_cmd)) |
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} |
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__u_boot_cmd_end = .; |
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. = ALIGN(4); |
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_got = .; |
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.got : { |
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*(.got) |
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} |
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_egot = .; |
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. = ALIGN(8); |
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_edata = .; |
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.bss (NOLOAD) : { |
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*(.bss) |
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*(.bss.*) |
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} |
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. = ALIGN(8); |
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_end = .; |
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} |
@ -0,0 +1,201 @@ |
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/*
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* Copyright (C) 2008 Atmel Corporation |
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* |
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* Configuration settings for the Favr-32 EarthLCD LCD kit. |
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* |
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* See file CREDITS for list of people who contributed to this project. |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by the Free |
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* Software Foundation; either version 2 of the License, or (at your option) |
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* any later version. |
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* |
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* This program is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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* more details. |
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* |
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* You should have received a copy of the GNU General Public License along with |
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple |
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* Place, Suite 330, Boston, MA 02111-1307 USA |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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#include <asm/arch/memory-map.h> |
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#define CONFIG_AVR32 1 |
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#define CONFIG_AT32AP 1 |
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#define CONFIG_AT32AP7000 1 |
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#define CONFIG_FAVR32_EZKIT 1 |
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#define CONFIG_FAVR32_EZKIT_EXT_FLASH 1 |
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/*
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* Timer clock frequency. We're using the CPU-internal COUNT register |
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* for this, so this is equivalent to the CPU core clock frequency |
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*/ |
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#define CFG_HZ 1000 |
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/*
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* Set up the PLL to run at 140 MHz, the CPU to run at the PLL |
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* frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the |
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* PLL frequency. |
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* (CFG_OSC0_HZ * CFG_PLL0_MUL) / CFG_PLL0_DIV = PLL MHz |
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*/ |
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#define CONFIG_PLL 1 |
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#define CFG_POWER_MANAGER 1 |
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#define CFG_OSC0_HZ 20000000 |
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#define CFG_PLL0_DIV 1 |
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#define CFG_PLL0_MUL 7 |
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#define CFG_PLL0_SUPPRESS_CYCLES 16 |
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/*
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* Set the CPU running at: |
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* PLL / (2^CFG_CLKDIV_CPU) = CPU MHz |
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*/ |
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#define CFG_CLKDIV_CPU 0 |
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/*
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* Set the HSB running at: |
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* PLL / (2^CFG_CLKDIV_HSB) = HSB MHz |
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*/ |
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#define CFG_CLKDIV_HSB 1 |
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/*
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* Set the PBA running at: |
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* PLL / (2^CFG_CLKDIV_PBA) = PBA MHz |
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*/ |
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#define CFG_CLKDIV_PBA 2 |
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/*
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* Set the PBB running at: |
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* PLL / (2^CFG_CLKDIV_PBB) = PBB MHz |
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*/ |
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#define CFG_CLKDIV_PBB 1 |
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/*
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* The PLLOPT register controls the PLL like this: |
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* icp = PLLOPT<2> |
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* ivco = PLLOPT<1:0> |
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* |
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* We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). |
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*/ |
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#define CFG_PLL0_OPT 0x04 |
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#undef CONFIG_USART0 |
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#undef CONFIG_USART1 |
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#undef CONFIG_USART2 |
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#define CONFIG_USART3 1 |
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/* User serviceable stuff */ |
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#define CONFIG_DOS_PARTITION 1 |
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#define CONFIG_CMDLINE_TAG 1 |
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#define CONFIG_SETUP_MEMORY_TAGS 1 |
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#define CONFIG_INITRD_TAG 1 |
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#define CONFIG_STACKSIZE (2048) |
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#define CONFIG_BAUDRATE 115200 |
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#define CONFIG_BOOTARGS \ |
||||
"root=/dev/mtdblock1 rootfstype=jffs fbmem=1800k" |
||||
|
||||
#define CONFIG_BOOTCOMMAND \ |
||||
"fsload; bootm $(fileaddr)" |
||||
|
||||
/*
|
||||
* Only interrupt autoboot if <space> is pressed. Otherwise, garbage |
||||
* data on the serial line may interrupt the boot sequence. |
||||
*/ |
||||
#define CONFIG_BOOTDELAY 1 |
||||
#define CONFIG_AUTOBOOT 1 |
||||
#define CONFIG_AUTOBOOT_KEYED 1 |
||||
#define CONFIG_AUTOBOOT_PROMPT \ |
||||
"Press SPACE to abort autoboot in %d seconds\n" |
||||
#define CONFIG_AUTOBOOT_DELAY_STR "d" |
||||
#define CONFIG_AUTOBOOT_STOP_STR " " |
||||
|
||||
/*
|
||||
* After booting the board for the first time, new ethernet addresses |
||||
* should be generated and assigned to the environment variables |
||||
* "ethaddr" and "eth1addr". This is normally done during production. |
||||
*/ |
||||
#define CONFIG_OVERWRITE_ETHADDR_ONCE 1 |
||||
#define CONFIG_NET_MULTI 1 |
||||
|
||||
/*
|
||||
* BOOTP options |
||||
*/ |
||||
#define CONFIG_BOOTP_SUBNETMASK |
||||
#define CONFIG_BOOTP_GATEWAY |
||||
|
||||
|
||||
/*
|
||||
* Command line configuration. |
||||
*/ |
||||
#include <config_cmd_default.h> |
||||
|
||||
#define CONFIG_CMD_ASKENV |
||||
#define CONFIG_CMD_DHCP |
||||
#define CONFIG_CMD_EXT2 |
||||
#define CONFIG_CMD_FAT |
||||
#define CONFIG_CMD_JFFS2 |
||||
#define CONFIG_CMD_MMC |
||||
|
||||
#undef CONFIG_CMD_AUTOSCRIPT |
||||
#undef CONFIG_CMD_FPGA |
||||
#undef CONFIG_CMD_SETGETDCR |
||||
#undef CONFIG_CMD_XIMG |
||||
|
||||
#define CONFIG_ATMEL_USART 1 |
||||
#define CONFIG_MACB 1 |
||||
#define CONFIG_PIO2 1 |
||||
#define CFG_NR_PIOS 5 |
||||
#define CFG_HSDRAMC 1 |
||||
#define CONFIG_MMC 1 |
||||
#define CONFIG_ATMEL_MCI 1 |
||||
|
||||
#define CFG_DCACHE_LINESZ 32 |
||||
#define CFG_ICACHE_LINESZ 32 |
||||
|
||||
#define CONFIG_NR_DRAM_BANKS 1 |
||||
|
||||
/* External flash on Favr-32 */ |
||||
#if 0 |
||||
#define CFG_FLASH_CFI 1 |
||||
#define CFG_FLASH_CFI_DRIVER 1 |
||||
#endif |
||||
|
||||
#define CFG_FLASH_BASE 0x00000000 |
||||
#define CFG_FLASH_SIZE 0x800000 |
||||
#define CFG_MAX_FLASH_BANKS 1 |
||||
#define CFG_MAX_FLASH_SECT 135 |
||||
|
||||
#define CFG_MONITOR_BASE CFG_FLASH_BASE |
||||
|
||||
#define CFG_INTRAM_BASE INTERNAL_SRAM_BASE |
||||
#define CFG_INTRAM_SIZE INTERNAL_SRAM_SIZE |
||||
#define CFG_SDRAM_BASE EBI_SDRAM_BASE |
||||
|
||||
#define CFG_ENV_IS_IN_FLASH 1 |
||||
#define CFG_ENV_SIZE 65536 |
||||
#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_FLASH_SIZE - CFG_ENV_SIZE) |
||||
|
||||
#define CFG_INIT_SP_ADDR (CFG_INTRAM_BASE + CFG_INTRAM_SIZE) |
||||
|
||||
#define CFG_MALLOC_LEN (256*1024) |
||||
#define CFG_DMA_ALLOC_LEN (16384) |
||||
|
||||
/* Allow 4MB for the kernel run-time image */ |
||||
#define CFG_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) |
||||
#define CFG_BOOTPARAMS_LEN (16 * 1024) |
||||
|
||||
/* Other configuration settings that shouldn't have to change all that often */ |
||||
#define CFG_PROMPT "U-Boot> " |
||||
#define CFG_CBSIZE 256 |
||||
#define CFG_MAXARGS 16 |
||||
#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) |
||||
#define CFG_LONGHELP 1 |
||||
|
||||
#define CFG_MEMTEST_START EBI_SDRAM_BASE |
||||
#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x700000) |
||||
#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } |
||||
|
||||
#endif /* __CONFIG_H */ |
Loading…
Reference in new issue