On i.MX5, the asm-offsets.h file is not yet generated as it should be. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Matthias Weisser <weisserm@arcor.de>master
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/*
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* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c |
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* |
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* This program is used to generate definitions needed by |
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* assembly language modules. |
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* |
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* We use the technique used in the OSF Mach kernel code: |
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* generate asm statements containing #defines, |
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* compile this file to assembler, and then extract the |
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* #defines from the assembly-language output. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License |
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* as published by the Free Software Foundation; either version |
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* 2 of the License, or (at your option) any later version. |
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*/ |
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#include <common.h> |
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#include <asm/arch/imx-regs.h> |
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#include <linux/kbuild.h> |
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int main(void) |
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{ |
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/* Round up to make sure size gives nice stack alignment */ |
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DEFINE(CLKCTL_CCMR, offsetof(struct clkctl, ccr)); |
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DEFINE(CLKCTL_CCDR, offsetof(struct clkctl, ccdr)); |
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DEFINE(CLKCTL_CSR, offsetof(struct clkctl, csr)); |
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DEFINE(CLKCTL_CCSR, offsetof(struct clkctl, ccsr)); |
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DEFINE(CLKCTL_CACRR, offsetof(struct clkctl, cacrr)); |
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DEFINE(CLKCTL_CBCDR, offsetof(struct clkctl, cbcdr)); |
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DEFINE(CLKCTL_CBCMR, offsetof(struct clkctl, cbcmr)); |
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DEFINE(CLKCTL_CSCMR1, offsetof(struct clkctl, cscmr1)); |
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DEFINE(CLKCTL_CSCMR2, offsetof(struct clkctl, cscmr2)); |
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DEFINE(CLKCTL_CSCDR1, offsetof(struct clkctl, cscdr1)); |
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DEFINE(CLKCTL_CS1CDR, offsetof(struct clkctl, cs1cdr)); |
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DEFINE(CLKCTL_CS2CDR, offsetof(struct clkctl, cs2cdr)); |
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DEFINE(CLKCTL_CDCDR, offsetof(struct clkctl, cdcdr)); |
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DEFINE(CLKCTL_CHSCCDR, offsetof(struct clkctl, chsccdr)); |
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DEFINE(CLKCTL_CSCDR2, offsetof(struct clkctl, cscdr2)); |
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DEFINE(CLKCTL_CSCDR3, offsetof(struct clkctl, cscdr3)); |
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DEFINE(CLKCTL_CSCDR4, offsetof(struct clkctl, cscdr4)); |
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DEFINE(CLKCTL_CWDR, offsetof(struct clkctl, cwdr)); |
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DEFINE(CLKCTL_CDHIPR, offsetof(struct clkctl, cdhipr)); |
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DEFINE(CLKCTL_CDCR, offsetof(struct clkctl, cdcr)); |
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DEFINE(CLKCTL_CTOR, offsetof(struct clkctl, ctor)); |
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DEFINE(CLKCTL_CLPCR, offsetof(struct clkctl, clpcr)); |
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DEFINE(CLKCTL_CISR, offsetof(struct clkctl, cisr)); |
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DEFINE(CLKCTL_CIMR, offsetof(struct clkctl, cimr)); |
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DEFINE(CLKCTL_CCOSR, offsetof(struct clkctl, ccosr)); |
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DEFINE(CLKCTL_CGPR, offsetof(struct clkctl, cgpr)); |
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DEFINE(CLKCTL_CCGR0, offsetof(struct clkctl, ccgr0)); |
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DEFINE(CLKCTL_CCGR1, offsetof(struct clkctl, ccgr1)); |
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DEFINE(CLKCTL_CCGR2, offsetof(struct clkctl, ccgr2)); |
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DEFINE(CLKCTL_CCGR3, offsetof(struct clkctl, ccgr3)); |
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DEFINE(CLKCTL_CCGR4, offsetof(struct clkctl, ccgr4)); |
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DEFINE(CLKCTL_CCGR5, offsetof(struct clkctl, ccgr5)); |
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DEFINE(CLKCTL_CCGR6, offsetof(struct clkctl, ccgr6)); |
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DEFINE(CLKCTL_CMEOR, offsetof(struct clkctl, cmeor)); |
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#if defined(CONFIG_MX53) |
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DEFINE(CLKCTL_CCGR7, offsetof(struct clkctl, ccgr7)); |
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#endif |
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/* DPLL */ |
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DEFINE(PLL_DP_CTL, offsetof(struct dpll, dp_ctl)); |
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DEFINE(PLL_DP_CONFIG, offsetof(struct dpll, dp_config)); |
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DEFINE(PLL_DP_OP, offsetof(struct dpll, dp_op)); |
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DEFINE(PLL_DP_MFD, offsetof(struct dpll, dp_mfd)); |
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DEFINE(PLL_DP_MFN, offsetof(struct dpll, dp_mfn)); |
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DEFINE(PLL_DP_HFS_OP, offsetof(struct dpll, dp_hfs_op)); |
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DEFINE(PLL_DP_HFS_MFD, offsetof(struct dpll, dp_hfs_mfd)); |
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DEFINE(PLL_DP_HFS_MFN, offsetof(struct dpll, dp_hfs_mfn)); |
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return 0; |
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} |
@ -1,55 +0,0 @@ |
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/*
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* needed for arch/arm/cpu/armv7/mx51/lowlevel_init.S |
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* |
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* These should be auto-generated |
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*/ |
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/* CCM */ |
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#define CLKCTL_CCR 0x00 |
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#define CLKCTL_CCDR 0x04 |
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#define CLKCTL_CSR 0x08 |
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#define CLKCTL_CCSR 0x0C |
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#define CLKCTL_CACRR 0x10 |
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#define CLKCTL_CBCDR 0x14 |
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#define CLKCTL_CBCMR 0x18 |
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#define CLKCTL_CSCMR1 0x1C |
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#define CLKCTL_CSCMR2 0x20 |
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#define CLKCTL_CSCDR1 0x24 |
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#define CLKCTL_CS1CDR 0x28 |
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#define CLKCTL_CS2CDR 0x2C |
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#define CLKCTL_CDCDR 0x30 |
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#define CLKCTL_CHSCCDR 0x34 |
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#define CLKCTL_CSCDR2 0x38 |
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#define CLKCTL_CSCDR3 0x3C |
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#define CLKCTL_CSCDR4 0x40 |
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#define CLKCTL_CWDR 0x44 |
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#define CLKCTL_CDHIPR 0x48 |
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#define CLKCTL_CDCR 0x4C |
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#define CLKCTL_CTOR 0x50 |
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#define CLKCTL_CLPCR 0x54 |
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#define CLKCTL_CISR 0x58 |
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#define CLKCTL_CIMR 0x5C |
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#define CLKCTL_CCOSR 0x60 |
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#define CLKCTL_CGPR 0x64 |
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#define CLKCTL_CCGR0 0x68 |
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#define CLKCTL_CCGR1 0x6C |
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#define CLKCTL_CCGR2 0x70 |
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#define CLKCTL_CCGR3 0x74 |
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#define CLKCTL_CCGR4 0x78 |
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#define CLKCTL_CCGR5 0x7C |
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#define CLKCTL_CCGR6 0x80 |
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#if defined(CONFIG_MX53) |
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#define CLKCTL_CCGR7 0x84 |
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#define CLKCTL_CMEOR 0x88 |
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#elif defined(CONFIG_MX51) |
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#define CLKCTL_CMEOR 0x84 |
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#endif |
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/* DPLL */ |
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#define PLL_DP_CTL 0x00 |
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#define PLL_DP_CONFIG 0x04 |
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#define PLL_DP_OP 0x08 |
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#define PLL_DP_MFD 0x0C |
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#define PLL_DP_MFN 0x10 |
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#define PLL_DP_HFS_OP 0x1C |
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#define PLL_DP_HFS_MFD 0x20 |
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#define PLL_DP_HFS_MFN 0x24 |
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