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@ -85,13 +85,13 @@ struct hdmi_phy_config { |
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static const struct hdmi_phy_config rockchip_phy_config[] = { |
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{ |
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.mpixelclock = 74250, |
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.mpixelclock = 74250000, |
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.sym_ctr = 0x8009, .term = 0x0004, .vlev_ctr = 0x0272, |
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}, { |
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.mpixelclock = 148500, |
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.mpixelclock = 148500000, |
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.sym_ctr = 0x802b, .term = 0x0004, .vlev_ctr = 0x028d, |
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}, { |
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.mpixelclock = 297000, |
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.mpixelclock = 297000000, |
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.sym_ctr = 0x8039, .term = 0x0005, .vlev_ctr = 0x028d, |
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}, { |
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.mpixelclock = ~0ul, |
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@ -101,22 +101,22 @@ static const struct hdmi_phy_config rockchip_phy_config[] = { |
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static const struct hdmi_mpll_config rockchip_mpll_cfg[] = { |
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{ |
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.mpixelclock = 40000, |
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.mpixelclock = 40000000, |
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.cpce = 0x00b3, .gmp = 0x0000, .curr = 0x0018, |
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}, { |
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.mpixelclock = 65000, |
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.mpixelclock = 65000000, |
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.cpce = 0x0072, .gmp = 0x0001, .curr = 0x0028, |
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}, { |
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.mpixelclock = 66000, |
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.mpixelclock = 66000000, |
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.cpce = 0x013e, .gmp = 0x0003, .curr = 0x0038, |
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}, { |
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.mpixelclock = 83500, |
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.mpixelclock = 835000000, |
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.cpce = 0x0072, .gmp = 0x0001, .curr = 0x0028, |
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}, { |
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.mpixelclock = 146250, |
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.mpixelclock = 146250000, |
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.cpce = 0x0051, .gmp = 0x0002, .curr = 0x0038, |
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}, { |
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.mpixelclock = 148500, |
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.mpixelclock = 148500000, |
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.cpce = 0x0051, .gmp = 0x0003, .curr = 0x0000, |
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}, { |
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.mpixelclock = ~0ul, |
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@ -870,7 +870,7 @@ static int rk_hdmi_probe(struct udevice *dev) |
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clk_free(&clk); |
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} |
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if (ret) { |
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debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); |
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debug("%s: Failed to set hdmi clock: ret=%d\n", __func__, ret); |
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return ret; |
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} |
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