x86: qemu: Enable legacy IDE I/O ports decode

QEMU always decode legacy IDE I/O ports on PIIX chipset. However Linux ata_piix
driver does sanity check to see whether legacy ports decode is turned on.
To make Linux ata_piix driver happy, turn on the decode via IDE_TIMING register.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

arch/x86/cpu/qemu/pci.c

@@ -8,6 +8,7 @@
 #include <pci.h>
 #include <pci_rom.h>
 #include <asm/pci.h>
+#include <asm/arch/device.h>
 #include <asm/arch/qemu.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -87,5 +88,18 @@ int board_pci_post_scan(struct pci_controller *hose)
 	for (i = 0; i < PAM_NUM; i++)
 		x86_pci_write_config8(PCI_BDF(0, 0, 0), pam + i, PAM_RW);
 
+	if (device == PCI_DEVICE_ID_INTEL_82441) {
+		/*
+		 * Enable legacy IDE I/O ports decode
+		 *
+		 * Note: QEMU always decode legacy IDE I/O port on PIIX chipset.
+		 * However Linux ata_piix driver does sanity check on these two
+		 * registers to see whether legacy ports decode is turned on.
+		 * This is to make Linux ata_piix driver happy.
+		 */
+		x86_pci_write_config16(PIIX_IDE, IDE0_TIM, IDE_DECODE_EN);
+		x86_pci_write_config16(PIIX_IDE, IDE1_TIM, IDE_DECODE_EN);
+	}
+
 	return ret;
 }

arch/x86/include/asm/arch-qemu/device.h

@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _QEMU_DEVICE_H_
+#define _QEMU_DEVICE_H_
+
+#include <pci.h>
+
+#define QEMU_I440FX	PCI_BDF(0, 0, 0)
+#define PIIX_ISA	PCI_BDF(0, 1, 0)
+#define PIIX_IDE	PCI_BDF(0, 1, 1)
+#define PIIX_USB	PCI_BDF(0, 1, 2)
+
+#define QEMU_Q35	PCI_BDF(0, 0, 0)
+
+#endif /* _QEMU_DEVICE_H_ */

arch/x86/include/asm/arch-qemu/qemu.h

@@ -13,6 +13,11 @@
 #define PAM_NUM			7
 #define PAM_RW			0x33
 
+/* IDE Timing Register */
+#define IDE0_TIM		0x40
+#define IDE1_TIM		0x42
+#define IDE_DECODE_EN		0x8000
+
 /* I/O Ports */
 #define CMOS_ADDR_PORT		0x70
 #define CMOS_DATA_PORT		0x71