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@ -41,51 +41,51 @@ int checkboard (void) |
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phys_size_t initdram (int board_type) |
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{ |
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int size,i; |
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int size, i; |
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size = 0; |
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MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6 |
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| MCFSDRAMC_DCR_RC((15 * CFG_CLK)>>4); |
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#ifdef CFG_SDRAM_BASE0 |
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MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE(CFG_SDRAM_BASE0) |
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| MCFSDRAMC_DACR_CASL(1) |
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| MCFSDRAMC_DACR_CBM(3) |
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| MCFSDRAMC_DACR_PS_16; |
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MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M |
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| MCFSDRAMC_DMR_V; |
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MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP; |
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*(unsigned short *)(CFG_SDRAM_BASE0) = 0xA5A5; |
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MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE; |
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for (i=0; i < 2000; i++) |
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asm(" nop"); |
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mbar_writeLong(MCFSDRAMC_DACR0, mbar_readLong(MCFSDRAMC_DACR0) |
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| MCFSDRAMC_DACR_IMRS); |
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*(unsigned int *)(CFG_SDRAM_BASE0 + 0x220) = 0xA5A5; |
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size += CFG_SDRAM_SIZE * 1024 * 1024; |
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#endif |
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#ifdef CFG_SDRAM_BASE1 |
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MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE(CFG_SDRAM_BASE1) |
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| MCFSDRAMC_DACR_CASL(1) |
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| MCFSDRAMC_DACR_CBM(3) |
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| MCFSDRAMC_DACR_PS_16; |
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MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M |
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| MCFSDRAMC_DMR_V; |
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MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP; |
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*(unsigned short *)(CFG_SDRAM_BASE1) = 0xA5A5; |
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MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE; |
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for (i=0; i < 2000; i++) |
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asm(" nop"); |
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MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS; |
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*(unsigned int *)(CFG_SDRAM_BASE1 + 0x220) = 0xA5A5; |
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size += CFG_SDRAM_SIZE1 * 1024 * 1024; |
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#endif |
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MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6 |
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| MCFSDRAMC_DCR_RC ((15 * CFG_CLK) >> 4); |
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#ifdef CFG_SDRAM_BASE0 |
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MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE (CFG_SDRAM_BASE0) |
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| MCFSDRAMC_DACR_CASL (1) |
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| MCFSDRAMC_DACR_CBM (3) |
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| MCFSDRAMC_DACR_PS_16; |
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MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V; |
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MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP; |
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*(unsigned short *) (CFG_SDRAM_BASE0) = 0xA5A5; |
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MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE; |
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for (i = 0; i < 2000; i++) |
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asm (" nop"); |
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mbar_writeLong (MCFSDRAMC_DACR0, |
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mbar_readLong (MCFSDRAMC_DACR0) | MCFSDRAMC_DACR_IMRS); |
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*(unsigned int *) (CFG_SDRAM_BASE0 + 0x220) = 0xA5A5; |
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size += CFG_SDRAM_SIZE * 1024 * 1024; |
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#endif |
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#ifdef CFG_SDRAM_BASE1 |
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MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CFG_SDRAM_BASE1) |
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| MCFSDRAMC_DACR_CASL (1) |
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| MCFSDRAMC_DACR_CBM (3) |
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| MCFSDRAMC_DACR_PS_16; |
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MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V; |
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MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP; |
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*(unsigned short *) (CFG_SDRAM_BASE1) = 0xA5A5; |
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MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE; |
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for (i = 0; i < 2000; i++) |
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asm (" nop"); |
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MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS; |
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*(unsigned int *) (CFG_SDRAM_BASE1 + 0x220) = 0xA5A5; |
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size += CFG_SDRAM_SIZE1 * 1024 * 1024; |
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#endif |
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return size; |
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} |
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