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@ -3,7 +3,7 @@ |
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* Stelian Pop <stelian.pop@leadtechdesign.com> |
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* Lead Tech Design <www.leadtechdesign.com> |
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* |
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* (C) Copyright 2009 |
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* (C) Copyright 2009-2011 |
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* Daniel Gorsulowski <daniel.gorsulowski@esd.eu> |
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* esd electronic system design gmbh <www.esd.eu> |
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* |
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@ -27,78 +27,59 @@ |
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*/ |
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#include <common.h> |
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#include <asm/io.h> |
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#include <asm/arch/hardware.h> |
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#include <asm/arch/io.h> |
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#include <asm/arch/at91_common.h> |
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#include <asm/arch/at91_pmc.h> |
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#include <asm/arch/at91_pio.h> |
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void at91_serial0_hw_init(void) |
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{ |
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; |
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
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at91_set_a_periph(AT91_PIO_PORTA, 26, 1); /* TXD0 */ |
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at91_set_a_periph(AT91_PIO_PORTA, 27, 0); /* RXD0 */ |
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writel(1 << AT91SAM9263_ID_US0, &pmc->pcer); |
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writel(1 << ATMEL_ID_USART0, &pmc->pcer); |
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} |
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void at91_serial1_hw_init(void) |
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{ |
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; |
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
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at91_set_a_periph(AT91_PIO_PORTD, 0, 1); /* TXD1 */ |
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at91_set_a_periph(AT91_PIO_PORTD, 1, 0); /* RXD1 */ |
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writel(1 << AT91SAM9263_ID_US1, &pmc->pcer); |
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writel(1 << ATMEL_ID_USART1, &pmc->pcer); |
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} |
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void at91_serial2_hw_init(void) |
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{ |
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; |
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
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at91_set_a_periph(AT91_PIO_PORTD, 2, 1); /* TXD2 */ |
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at91_set_a_periph(AT91_PIO_PORTD, 3, 0); /* RXD2 */ |
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writel(1 << AT91SAM9263_ID_US2, &pmc->pcer); |
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writel(1 << ATMEL_ID_USART2, &pmc->pcer); |
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} |
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void at91_serial3_hw_init(void) |
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void at91_seriald_hw_init(void) |
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{ |
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; |
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
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at91_set_a_periph(AT91_PIO_PORTC, 30, 0); /* DRXD */ |
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at91_set_a_periph(AT91_PIO_PORTC, 31, 1); /* DTXD */ |
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writel(1 << AT91_ID_SYS, &pmc->pcer); |
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writel(1 << ATMEL_ID_SYS, &pmc->pcer); |
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} |
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void at91_serial_hw_init(void) |
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{ |
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#ifdef CONFIG_USART0 |
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at91_serial0_hw_init(); |
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#endif |
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#ifdef CONFIG_USART1 |
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at91_serial1_hw_init(); |
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#endif |
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#ifdef CONFIG_USART2 |
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at91_serial2_hw_init(); |
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#endif |
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#ifdef CONFIG_USART3 /* DBGU */ |
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at91_serial3_hw_init(); |
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#endif |
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} |
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#ifdef CONFIG_HAS_DATAFLASH |
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#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI) |
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void at91_spi0_hw_init(unsigned long cs_mask) |
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{ |
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; |
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
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at91_set_b_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */ |
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at91_set_b_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */ |
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at91_set_b_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */ |
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/* Enable clock */ |
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writel(1 << AT91SAM9263_ID_SPI0, &pmc->pcer); |
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writel(1 << ATMEL_ID_SPI0, &pmc->pcer); |
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if (cs_mask & (1 << 0)) { |
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at91_set_b_periph(AT91_PIO_PORTA, 5, 1); |
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@ -128,14 +109,14 @@ void at91_spi0_hw_init(unsigned long cs_mask) |
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void at91_spi1_hw_init(unsigned long cs_mask) |
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{ |
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; |
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
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at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* SPI1_MISO */ |
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at91_set_a_periph(AT91_PIO_PORTB, 13, 0); /* SPI1_MOSI */ |
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at91_set_a_periph(AT91_PIO_PORTB, 14, 0); /* SPI1_SPCK */ |
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/* Enable clock */ |
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writel(1 << AT91SAM9263_ID_SPI1, &pmc->pcer); |
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writel(1 << ATMEL_ID_SPI1, &pmc->pcer); |
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if (cs_mask & (1 << 0)) { |
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at91_set_a_periph(AT91_PIO_PORTB, 15, 1); |
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@ -203,12 +184,12 @@ void at91_uhp_hw_init(void) |
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#ifdef CONFIG_AT91_CAN |
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void at91_can_hw_init(void) |
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{ |
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; |
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
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at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* CAN_TX */ |
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at91_set_a_periph(AT91_PIO_PORTA, 14, 1); /* CAN_RX */ |
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/* Enable clock */ |
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writel(1 << AT91SAM9263_ID_CAN, &pmc->pcer); |
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writel(1 << ATMEL_ID_CAN, &pmc->pcer); |
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} |
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#endif |
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