Add the device tree files for sama5d3xek board. The dts files are copied from Linux-4.9, do the changes as below. - add reg property for the pinctrl node. - move the gpio nodes (pioA, pioB, pioC ...) as the pinctrl's slibling nodes. - add the "u-boot,dm-pre-reloc" property to determine which nodes which are needed by SPL and by the board_init_f stage. - fix the compile warning. - add spi0 node aliases. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>master
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/* |
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* sama5d31.dtsi - Device Tree Include file for SAMA5D31 SoC |
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* |
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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#include "sama5d3.dtsi" |
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#include "sama5d3_lcd.dtsi" |
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#include "sama5d3_emac.dtsi" |
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#include "sama5d3_mci2.dtsi" |
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#include "sama5d3_uart.dtsi" |
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|
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/ { |
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compatible = "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; |
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}; |
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/* |
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* sama5d31ek.dts - Device Tree file for SAMA5D31-EK board |
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* |
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* Copyright (C) 2013 Atmel, |
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* 2013 Ludovic Desroches <ludovic.desroches@atmel.com> |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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/dts-v1/; |
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#include "sama5d31.dtsi" |
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#include "sama5d3xmb.dtsi" |
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#include "sama5d3xdm.dtsi" |
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|
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/ { |
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model = "Atmel SAMA5D31-EK"; |
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compatible = "atmel,sama5d31ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; |
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aliases { |
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spi0 = &spi0; |
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}; |
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|
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ahb { |
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apb { |
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spi0: spi@f0004000 { |
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status = "okay"; |
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}; |
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|
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ssc0: ssc@f0008000 { |
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status = "okay"; |
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}; |
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|
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i2c0: i2c@f0014000 { |
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status = "okay"; |
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}; |
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|
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i2c1: i2c@f0018000 { |
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status = "okay"; |
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}; |
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macb1: ethernet@f802c000 { |
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status = "okay"; |
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}; |
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}; |
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}; |
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|
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leds { |
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d3 { |
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label = "d3"; |
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gpios = <&pioE 24 GPIO_ACTIVE_HIGH>; |
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}; |
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}; |
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|
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sound { |
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status = "okay"; |
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}; |
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}; |
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/* |
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* sama5d33.dtsi - Device Tree Include file for SAMA5D33 SoC |
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* |
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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#include "sama5d3.dtsi" |
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#include "sama5d3_lcd.dtsi" |
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#include "sama5d3_gmac.dtsi" |
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/ { |
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compatible = "atmel,sama5d33", "atmel,sama5d3", "atmel,sama5"; |
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}; |
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/* |
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* sama5d33ek.dts - Device Tree file for SAMA5D33-EK board |
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* |
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* Copyright (C) 2013 Atmel, |
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* 2013 Ludovic Desroches <ludovic.desroches@atmel.com> |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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/dts-v1/; |
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#include "sama5d33.dtsi" |
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#include "sama5d3xmb.dtsi" |
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#include "sama5d3xdm.dtsi" |
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/ { |
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model = "Atmel SAMA5D33-EK"; |
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compatible = "atmel,sama5d33ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d33", "atmel,sama5d3", "atmel,sama5"; |
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aliases { |
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spi0 = &spi0; |
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}; |
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ahb { |
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apb { |
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spi0: spi@f0004000 { |
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status = "okay"; |
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}; |
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ssc0: ssc@f0008000 { |
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status = "okay"; |
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}; |
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i2c0: i2c@f0014000 { |
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status = "okay"; |
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}; |
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i2c1: i2c@f0018000 { |
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status = "okay"; |
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}; |
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macb0: ethernet@f0028000 { |
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status = "okay"; |
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}; |
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}; |
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}; |
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sound { |
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status = "okay"; |
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}; |
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}; |
@ -0,0 +1,16 @@ |
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/* |
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* sama5d34.dtsi - Device Tree Include file for SAMA5D34 SoC |
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* |
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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#include "sama5d3.dtsi" |
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#include "sama5d3_lcd.dtsi" |
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#include "sama5d3_gmac.dtsi" |
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#include "sama5d3_can.dtsi" |
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#include "sama5d3_mci2.dtsi" |
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/ { |
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compatible = "atmel,sama5d34", "atmel,sama5d3", "atmel,sama5"; |
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}; |
@ -0,0 +1,66 @@ |
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/* |
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* sama5d34ek.dts - Device Tree file for SAMA5D34-EK board |
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* |
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* Copyright (C) 2013 Atmel, |
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* 2013 Ludovic Desroches <ludovic.desroches@atmel.com> |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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/dts-v1/; |
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#include "sama5d34.dtsi" |
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#include "sama5d3xmb.dtsi" |
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#include "sama5d3xdm.dtsi" |
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/ { |
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model = "Atmel SAMA5D34-EK"; |
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compatible = "atmel,sama5d34ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d34", "atmel,sama5d3", "atmel,sama5"; |
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aliases { |
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spi0 = &spi0; |
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}; |
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ahb { |
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apb { |
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spi0: spi@f0004000 { |
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status = "okay"; |
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}; |
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ssc0: ssc@f0008000 { |
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status = "okay"; |
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}; |
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can0: can@f000c000 { |
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status = "okay"; |
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}; |
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i2c0: i2c@f0014000 { |
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status = "okay"; |
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}; |
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i2c1: i2c@f0018000 { |
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status = "okay"; |
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24c256@50 { |
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compatible = "24c256"; |
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reg = <0x50>; |
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pagesize = <64>; |
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}; |
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}; |
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macb0: ethernet@f0028000 { |
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status = "okay"; |
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}; |
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}; |
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}; |
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leds { |
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d3 { |
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label = "d3"; |
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gpios = <&pioE 24 GPIO_ACTIVE_HIGH>; |
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}; |
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}; |
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sound { |
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status = "okay"; |
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}; |
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}; |
@ -0,0 +1,18 @@ |
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/* |
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* sama5d35.dtsi - Device Tree Include file for SAMA5D35 SoC |
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* |
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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#include "sama5d3.dtsi" |
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#include "sama5d3_gmac.dtsi" |
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#include "sama5d3_emac.dtsi" |
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#include "sama5d3_can.dtsi" |
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#include "sama5d3_mci2.dtsi" |
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#include "sama5d3_uart.dtsi" |
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#include "sama5d3_tcb1.dtsi" |
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/ { |
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compatible = "atmel,sama5d35", "atmel,sama5d3", "atmel,sama5"; |
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}; |
@ -0,0 +1,59 @@ |
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/* |
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* sama5d35ek.dts - Device Tree file for SAMA5D35-EK board |
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* |
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* Copyright (C) 2013 Atmel, |
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* 2013 Ludovic Desroches <ludovic.desroches@atmel.com> |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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/dts-v1/; |
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#include "sama5d35.dtsi" |
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#include "sama5d3xmb.dtsi" |
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/ { |
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model = "Atmel SAMA5D35-EK"; |
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compatible = "atmel,sama5d35ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d35", "atmel,sama5d3", "atmel,sama5"; |
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aliases { |
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spi0 = &spi0; |
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}; |
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ahb { |
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apb { |
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spi0: spi@f0004000 { |
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status = "okay"; |
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}; |
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can0: can@f000c000 { |
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status = "okay"; |
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}; |
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i2c1: i2c@f0018000 { |
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status = "okay"; |
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}; |
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macb0: ethernet@f0028000 { |
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status = "okay"; |
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}; |
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isi: isi@f0034000 { |
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status = "okay"; |
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}; |
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macb1: ethernet@f802c000 { |
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status = "okay"; |
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}; |
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}; |
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}; |
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gpio_keys { |
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compatible = "gpio-keys"; |
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pb_user1 { |
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label = "pb_user1"; |
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gpios = <&pioE 27 GPIO_ACTIVE_HIGH>; |
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linux,code = <0x100>; |
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wakeup-source; |
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}; |
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}; |
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}; |
@ -0,0 +1,20 @@ |
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/* |
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* sama5d36.dtsi - Device Tree Include file for SAMA5D36 SoC |
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* |
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* Copyright (C) 2013 Atmel, |
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* 2013 Josh Wu <josh.wu@atmel.com> |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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#include "sama5d3.dtsi" |
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#include "sama5d3_can.dtsi" |
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#include "sama5d3_gmac.dtsi" |
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#include "sama5d3_emac.dtsi" |
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#include "sama5d3_lcd.dtsi" |
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#include "sama5d3_mci2.dtsi" |
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#include "sama5d3_tcb1.dtsi" |
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#include "sama5d3_uart.dtsi" |
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/ { |
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compatible = "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5"; |
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}; |
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/* |
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* sama5d36ek.dts - Device Tree file for SAMA5D36-EK board |
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* |
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* Copyright (C) 2013 Atmel, |
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* 2013 Josh Wu <josh.wu@atmel.com> |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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/dts-v1/; |
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#include "sama5d36.dtsi" |
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#include "sama5d3xmb.dtsi" |
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#include "sama5d3xdm.dtsi" |
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/ { |
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model = "Atmel SAMA5D36-EK"; |
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compatible = "atmel,sama5d36ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5"; |
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aliases { |
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spi0 = &spi0; |
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}; |
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ahb { |
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apb { |
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spi0: spi@f0004000 { |
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status = "okay"; |
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}; |
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ssc0: ssc@f0008000 { |
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status = "okay"; |
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}; |
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can0: can@f000c000 { |
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status = "okay"; |
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}; |
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i2c0: i2c@f0014000 { |
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status = "okay"; |
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}; |
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i2c1: i2c@f0018000 { |
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status = "okay"; |
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}; |
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macb0: ethernet@f0028000 { |
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status = "okay"; |
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}; |
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macb1: ethernet@f802c000 { |
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status = "okay"; |
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}; |
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}; |
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}; |
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sound { |
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status = "okay"; |
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}; |
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}; |
@ -0,0 +1,55 @@ |
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/* |
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* sama5d36ek_cmp.dts - Device Tree file for SAMA5D36-EK CMP board |
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* |
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* Copyright (C) 2016 Atmel, |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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/dts-v1/; |
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#include "sama5d36.dtsi" |
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#include "sama5d3xmb_cmp.dtsi" |
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/ { |
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model = "Atmel SAMA5D36-EK"; |
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compatible = "atmel,sama5d36ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5"; |
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aliases { |
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spi0 = &spi0; |
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}; |
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ahb { |
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apb { |
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spi0: spi@f0004000 { |
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status = "okay"; |
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}; |
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ssc0: ssc@f0008000 { |
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status = "okay"; |
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}; |
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can0: can@f000c000 { |
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status = "okay"; |
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}; |
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i2c0: i2c@f0014000 { |
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status = "okay"; |
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}; |
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i2c1: i2c@f0018000 { |
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status = "okay"; |
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}; |
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macb0: ethernet@f0028000 { |
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status = "okay"; |
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}; |
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macb1: ethernet@f802c000 { |
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status = "okay"; |
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}; |
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}; |
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}; |
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sound { |
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status = "okay"; |
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}; |
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}; |
@ -0,0 +1,74 @@ |
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/* |
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* sama5d3_can.dtsi - Device Tree Include file for SAMA5D3 SoC with |
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* CAN support |
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* |
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
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* |
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* Licensed under GPLv2. |
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*/ |
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#include <dt-bindings/pinctrl/at91.h> |
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#include <dt-bindings/interrupt-controller/irq.h> |
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/ { |
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ahb { |
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apb { |
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pinctrl@fffff200 { |
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can0 { |
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pinctrl_can0_rx_tx: can0_rx_tx { |
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atmel,pins = |
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<AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */ |
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AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */ |
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}; |
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}; |
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can1 { |
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pinctrl_can1_rx_tx: can1_rx_tx { |
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atmel,pins = |
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<AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */ |
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AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */ |
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}; |
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}; |
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}; |
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pmc: pmc@fffffc00 { |
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periphck { |
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can0_clk: can0_clk@40 { |
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#clock-cells = <0>; |
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reg = <40>; |
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atmel,clk-output-range = <0 66000000>; |
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}; |
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can1_clk: can1_clk@41 { |
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#clock-cells = <0>; |
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reg = <41>; |
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atmel,clk-output-range = <0 66000000>; |
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}; |
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}; |
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}; |
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can0: can@f000c000 { |
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compatible = "atmel,at91sam9x5-can"; |
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reg = <0xf000c000 0x300>; |
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interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_can0_rx_tx>; |
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clocks = <&can0_clk>; |
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clock-names = "can_clk"; |
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status = "disabled"; |
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}; |
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can1: can@f8010000 { |
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compatible = "atmel,at91sam9x5-can"; |
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reg = <0xf8010000 0x300>; |
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interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_can1_rx_tx>; |
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clocks = <&can1_clk>; |
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clock-names = "can_clk"; |
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status = "disabled"; |
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}; |
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}; |
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}; |
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}; |
@ -0,0 +1,55 @@ |
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/* |
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* sama5d3_emac.dtsi - Device Tree Include file for SAMA5D3 SoC with |
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* Ethernet. |
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* |
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
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* |
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* Licensed under GPLv2. |
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*/ |
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#include <dt-bindings/pinctrl/at91.h> |
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#include <dt-bindings/interrupt-controller/irq.h> |
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/ { |
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ahb { |
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apb { |
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pinctrl@fffff200 { |
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macb1 { |
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pinctrl_macb1_rmii: macb1_rmii-0 { |
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atmel,pins = |
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<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC0 periph A ETX0, conflicts with TIOA3 */ |
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AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A ETX1, conflicts with TIOB3 */ |
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AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A ERX0, conflicts with TCLK3 */ |
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AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A ERX1, conflicts with TIOA4 */ |
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AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC4 periph A ETXEN, conflicts with TIOB4 */ |
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AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 periph A ECRSDV,conflicts with TCLK4 */ |
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AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A ERXER, conflicts with TIOA5 */ |
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AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A EREFCK, conflicts with TIOB5 */ |
||||
AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A EMDC, conflicts with TCLK5 */ |
||||
AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A EMDIO */ |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
pmc: pmc@fffffc00 { |
||||
periphck { |
||||
macb1_clk: macb1_clk@35 { |
||||
#clock-cells = <0>; |
||||
reg = <35>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
macb1: ethernet@f802c000 { |
||||
compatible = "cdns,at91sam9260-macb", "cdns,macb"; |
||||
reg = <0xf802c000 0x100>; |
||||
interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_macb1_rmii>; |
||||
clocks = <&macb1_clk>, <&macb1_clk>; |
||||
clock-names = "hclk", "pclk"; |
||||
status = "disabled"; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
@ -0,0 +1,88 @@ |
||||
/* |
||||
* sama5d3_gmac.dtsi - Device Tree Include file for SAMA5D3 SoC with |
||||
* Gigabit Ethernet. |
||||
* |
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
||||
* |
||||
* Licensed under GPLv2. |
||||
*/ |
||||
|
||||
#include <dt-bindings/pinctrl/at91.h> |
||||
#include <dt-bindings/interrupt-controller/irq.h> |
||||
|
||||
/ { |
||||
ahb { |
||||
apb { |
||||
pinctrl@fffff200 { |
||||
macb0 { |
||||
pinctrl_macb0_data_rgmii: macb0_data_rgmii { |
||||
atmel,pins = |
||||
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A GTX0, conflicts with PWMH0 */ |
||||
AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A GTX1, conflicts with PWML0 */ |
||||
AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A GTX2, conflicts with TK1 */ |
||||
AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A GTX3, conflicts with TF1 */ |
||||
AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A GRX0, conflicts with PWMH1 */ |
||||
AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A GRX1, conflicts with PWML1 */ |
||||
AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A GRX2, conflicts with TD1 */ |
||||
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A GRX3, conflicts with RK1 */ |
||||
}; |
||||
pinctrl_macb0_data_gmii: macb0_data_gmii { |
||||
atmel,pins = |
||||
<AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB19 periph B GTX4, conflicts with MCI1_CDA */ |
||||
AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB20 periph B GTX5, conflicts with MCI1_DA0 */ |
||||
AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB21 periph B GTX6, conflicts with MCI1_DA1 */ |
||||
AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB22 periph B GTX7, conflicts with MCI1_DA2 */ |
||||
AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B GRX4, conflicts with MCI1_DA3 */ |
||||
AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B GRX5, conflicts with MCI1_CK */ |
||||
AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B GRX6, conflicts with SCK1 */ |
||||
AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */ |
||||
}; |
||||
pinctrl_macb0_signal_rgmii: macb0_signal_rgmii { |
||||
atmel,pins = |
||||
<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A GTXCK, conflicts with PWMH2 */ |
||||
AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */ |
||||
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */ |
||||
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */ |
||||
AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */ |
||||
AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */ |
||||
AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */ |
||||
}; |
||||
pinctrl_macb0_signal_gmii: macb0_signal_gmii { |
||||
atmel,pins = |
||||
<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */ |
||||
AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A GTXER, conflicts with RF1 */ |
||||
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */ |
||||
AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A GRXDV, conflicts with PWMH3 */ |
||||
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */ |
||||
AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A GCRS, conflicts with CANRX1 */ |
||||
AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A GCOL, conflicts with CANTX1 */ |
||||
AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */ |
||||
AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */ |
||||
AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */ |
||||
}; |
||||
|
||||
}; |
||||
}; |
||||
|
||||
pmc: pmc@fffffc00 { |
||||
periphck { |
||||
macb0_clk: macb0_clk@34 { |
||||
#clock-cells = <0>; |
||||
reg = <34>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
macb0: ethernet@f0028000 { |
||||
compatible = "atmel,sama5d3-gem"; |
||||
reg = <0xf0028000 0x100>; |
||||
interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>; |
||||
clocks = <&macb0_clk>, <&macb0_clk>; |
||||
clock-names = "hclk", "pclk"; |
||||
status = "disabled"; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
@ -0,0 +1,215 @@ |
||||
/* |
||||
* sama5d3_lcd.dtsi - Device Tree Include file for SAMA5D3 SoC with |
||||
* LCD support |
||||
* |
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
||||
* |
||||
* Licensed under GPLv2. |
||||
*/ |
||||
|
||||
#include <dt-bindings/pinctrl/at91.h> |
||||
#include <dt-bindings/interrupt-controller/irq.h> |
||||
|
||||
/ { |
||||
ahb { |
||||
apb { |
||||
hlcdc: hlcdc@f0030000 { |
||||
compatible = "atmel,sama5d3-hlcdc"; |
||||
reg = <0xf0030000 0x2000>; |
||||
interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; |
||||
clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; |
||||
clock-names = "periph_clk","sys_clk", "slow_clk"; |
||||
status = "disabled"; |
||||
|
||||
hlcdc-display-controller { |
||||
compatible = "atmel,hlcdc-display-controller"; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
|
||||
port@0 { |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
reg = <0>; |
||||
}; |
||||
}; |
||||
|
||||
hlcdc_pwm: hlcdc-pwm { |
||||
compatible = "atmel,hlcdc-pwm"; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_lcd_pwm>; |
||||
#pwm-cells = <3>; |
||||
}; |
||||
}; |
||||
|
||||
pinctrl@fffff200 { |
||||
lcd { |
||||
pinctrl_lcd_base: lcd-base-0 { |
||||
atmel,pins = |
||||
<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */ |
||||
AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */ |
||||
AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDISP */ |
||||
AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */ |
||||
AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */ |
||||
}; |
||||
|
||||
pinctrl_lcd_pwm: lcd-pwm-0 { |
||||
atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */ |
||||
}; |
||||
|
||||
pinctrl_lcd_rgb444: lcd-rgb-0 { |
||||
atmel,pins = |
||||
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ |
||||
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ |
||||
AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ |
||||
AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ |
||||
AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ |
||||
AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ |
||||
AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ |
||||
AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ |
||||
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ |
||||
AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ |
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ |
||||
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */ |
||||
}; |
||||
|
||||
pinctrl_lcd_rgb565: lcd-rgb-1 { |
||||
atmel,pins = |
||||
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ |
||||
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ |
||||
AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ |
||||
AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ |
||||
AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ |
||||
AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ |
||||
AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ |
||||
AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ |
||||
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ |
||||
AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ |
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ |
||||
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ |
||||
AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ |
||||
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ |
||||
AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ |
||||
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */ |
||||
}; |
||||
|
||||
pinctrl_lcd_rgb666: lcd-rgb-2 { |
||||
atmel,pins = |
||||
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ |
||||
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ |
||||
AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ |
||||
AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ |
||||
AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ |
||||
AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ |
||||
AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ |
||||
AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ |
||||
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ |
||||
AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ |
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ |
||||
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ |
||||
AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ |
||||
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ |
||||
AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ |
||||
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ |
||||
AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */ |
||||
AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD17 pin */ |
||||
}; |
||||
|
||||
pinctrl_lcd_rgb666_alt: lcd-rgb-2-alt { |
||||
atmel,pins = |
||||
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ |
||||
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ |
||||
AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ |
||||
AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ |
||||
AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ |
||||
AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ |
||||
AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ |
||||
AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ |
||||
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ |
||||
AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ |
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ |
||||
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ |
||||
AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ |
||||
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ |
||||
AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ |
||||
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ |
||||
AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* LCDD16 pin */ |
||||
AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* LCDD17 pin */ |
||||
}; |
||||
|
||||
pinctrl_lcd_rgb888: lcd-rgb-3 { |
||||
atmel,pins = |
||||
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ |
||||
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ |
||||
AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ |
||||
AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ |
||||
AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ |
||||
AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ |
||||
AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ |
||||
AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ |
||||
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ |
||||
AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ |
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ |
||||
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ |
||||
AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ |
||||
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ |
||||
AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ |
||||
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ |
||||
AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */ |
||||
AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */ |
||||
AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */ |
||||
AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */ |
||||
AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */ |
||||
AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */ |
||||
AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */ |
||||
AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */ |
||||
}; |
||||
|
||||
pinctrl_lcd_rgb888_alt: lcd-rgb-3-alt { |
||||
atmel,pins = |
||||
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ |
||||
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ |
||||
AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ |
||||
AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ |
||||
AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ |
||||
AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ |
||||
AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ |
||||
AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ |
||||
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ |
||||
AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ |
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ |
||||
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ |
||||
AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ |
||||
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ |
||||
AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ |
||||
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ |
||||
AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* LCDD16 pin */ |
||||
AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE /* LCDD17 pin */ |
||||
AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE /* LCDD18 pin */ |
||||
AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE /* LCDD19 pin */ |
||||
AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE /* LCDD20 pin */ |
||||
AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE /* LCDD21 pin */ |
||||
AT91_PIOE 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* LCDD22 pin */ |
||||
AT91_PIOE 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* LCDD23 pin */ |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
pmc: pmc@fffffc00 { |
||||
periphck { |
||||
lcdc_clk: lcdc_clk@36 { |
||||
#clock-cells = <0>; |
||||
reg = <36>; |
||||
}; |
||||
}; |
||||
|
||||
systemck { |
||||
lcdck: lcdck@3 { |
||||
#clock-cells = <0>; |
||||
reg = <3>; |
||||
clocks = <&mck>; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
@ -0,0 +1,59 @@ |
||||
/* |
||||
* sama5d3_mci2.dtsi - Device Tree Include file for SAMA5D3 SoC with |
||||
* 3 MMC ports |
||||
* |
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
||||
* |
||||
* Licensed under GPLv2. |
||||
*/ |
||||
|
||||
#include <dt-bindings/pinctrl/at91.h> |
||||
#include <dt-bindings/interrupt-controller/irq.h> |
||||
#include <dt-bindings/clock/at91.h> |
||||
|
||||
/ { |
||||
ahb { |
||||
apb { |
||||
pinctrl@fffff200 { |
||||
mmc2 { |
||||
pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 { |
||||
atmel,pins = |
||||
<AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A MCI2_CK, conflicts with PCK2 */ |
||||
AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC10 periph A MCI2_CDA with pullup */ |
||||
AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC11 periph A MCI2_DA0 with pullup */ |
||||
}; |
||||
pinctrl_mmc2_dat1_3: mmc2_dat1_3 { |
||||
atmel,pins = |
||||
<AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */ |
||||
AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */ |
||||
AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */ |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
pmc: pmc@fffffc00 { |
||||
periphck { |
||||
mci2_clk: mci2_clk@23 { |
||||
#clock-cells = <0>; |
||||
reg = <23>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
mmc2: mmc@f8004000 { |
||||
compatible = "atmel,hsmci"; |
||||
reg = <0xf8004000 0x600>; |
||||
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; |
||||
dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(1)>; |
||||
dma-names = "rxtx"; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>; |
||||
clocks = <&mci2_clk>; |
||||
clock-names = "mci_clk"; |
||||
status = "disabled"; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
@ -0,0 +1,39 @@ |
||||
/* |
||||
* sama5d3_tcb1.dtsi - Device Tree Include file for SAMA5D3 SoC with |
||||
* 2 TC blocks. |
||||
* |
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
||||
* |
||||
* Licensed under GPLv2. |
||||
*/ |
||||
|
||||
#include <dt-bindings/pinctrl/at91.h> |
||||
#include <dt-bindings/interrupt-controller/irq.h> |
||||
#include <dt-bindings/clock/at91.h> |
||||
|
||||
/ { |
||||
aliases { |
||||
tcb1 = &tcb1; |
||||
}; |
||||
|
||||
ahb { |
||||
apb { |
||||
pmc: pmc@fffffc00 { |
||||
periphck { |
||||
tcb1_clk: tcb1_clk@27 { |
||||
#clock-cells = <0>; |
||||
reg = <27>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
tcb1: timer@f8014000 { |
||||
compatible = "atmel,at91sam9x5-tcb"; |
||||
reg = <0xf8014000 0x100>; |
||||
interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; |
||||
clocks = <&tcb1_clk>, <&clk32k>; |
||||
clock-names = "t0_clk", "slow_clk"; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
@ -0,0 +1,79 @@ |
||||
/* |
||||
* sama5d3_uart.dtsi - Device Tree Include file for SAMA5D3 SoC with |
||||
* UART support |
||||
* |
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
||||
* |
||||
* Licensed under GPLv2. |
||||
*/ |
||||
|
||||
#include <dt-bindings/pinctrl/at91.h> |
||||
#include <dt-bindings/interrupt-controller/irq.h> |
||||
#include <dt-bindings/clock/at91.h> |
||||
|
||||
/ { |
||||
aliases { |
||||
serial5 = &uart0; |
||||
serial6 = &uart1; |
||||
}; |
||||
|
||||
ahb { |
||||
apb { |
||||
pinctrl@fffff200 { |
||||
uart0 { |
||||
pinctrl_uart0: uart0-0 { |
||||
atmel,pins = |
||||
<AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */ |
||||
AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */ |
||||
}; |
||||
}; |
||||
|
||||
uart1 { |
||||
pinctrl_uart1: uart1-0 { |
||||
atmel,pins = |
||||
<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */ |
||||
AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */ |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
pmc: pmc@fffffc00 { |
||||
periphck { |
||||
uart0_clk: uart0_clk@16 { |
||||
#clock-cells = <0>; |
||||
reg = <16>; |
||||
atmel,clk-output-range = <0 66000000>; |
||||
}; |
||||
|
||||
uart1_clk: uart1_clk@17 { |
||||
#clock-cells = <0>; |
||||
reg = <17>; |
||||
atmel,clk-output-range = <0 66000000>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
uart0: serial@f0024000 { |
||||
compatible = "atmel,at91sam9260-usart"; |
||||
reg = <0xf0024000 0x200>; |
||||
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_uart0>; |
||||
clocks = <&uart0_clk>; |
||||
clock-names = "usart"; |
||||
status = "disabled"; |
||||
}; |
||||
|
||||
uart1: serial@f8028000 { |
||||
compatible = "atmel,at91sam9260-usart"; |
||||
reg = <0xf8028000 0x200>; |
||||
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_uart1>; |
||||
clocks = <&uart1_clk>; |
||||
clock-names = "usart"; |
||||
status = "disabled"; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
@ -0,0 +1,123 @@ |
||||
/* |
||||
* sama5d3xcm.dtsi - Device Tree Include file for SAMA5D3x CPU Module |
||||
* |
||||
* Copyright (C) 2013 Atmel, |
||||
* 2013 Ludovic Desroches <ludovic.desroches@atmel.com> |
||||
* |
||||
* Licensed under GPLv2 or later. |
||||
*/ |
||||
|
||||
/ { |
||||
compatible = "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; |
||||
|
||||
chosen { |
||||
bootargs = "rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs"; |
||||
stdout-path = "serial0:115200n8"; |
||||
}; |
||||
|
||||
memory { |
||||
reg = <0x20000000 0x20000000>; |
||||
}; |
||||
|
||||
clocks { |
||||
slow_xtal { |
||||
clock-frequency = <32768>; |
||||
}; |
||||
|
||||
main_xtal { |
||||
clock-frequency = <12000000>; |
||||
}; |
||||
}; |
||||
|
||||
ahb { |
||||
apb { |
||||
spi0: spi@f0004000 { |
||||
cs-gpios = <&pioD 13 0>, <0>, <0>, <0>; |
||||
}; |
||||
|
||||
macb0: ethernet@f0028000 { |
||||
phy-mode = "rgmii"; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
|
||||
ethernet-phy@1 { |
||||
reg = <0x1>; |
||||
interrupt-parent = <&pioB>; |
||||
interrupts = <25 IRQ_TYPE_EDGE_FALLING>; |
||||
txen-skew-ps = <800>; |
||||
txc-skew-ps = <3000>; |
||||
rxdv-skew-ps = <400>; |
||||
rxc-skew-ps = <3000>; |
||||
rxd0-skew-ps = <400>; |
||||
rxd1-skew-ps = <400>; |
||||
rxd2-skew-ps = <400>; |
||||
rxd3-skew-ps = <400>; |
||||
}; |
||||
|
||||
ethernet-phy@7 { |
||||
reg = <0x7>; |
||||
interrupt-parent = <&pioB>; |
||||
interrupts = <25 IRQ_TYPE_EDGE_FALLING>; |
||||
txen-skew-ps = <800>; |
||||
txc-skew-ps = <3000>; |
||||
rxdv-skew-ps = <400>; |
||||
rxc-skew-ps = <3000>; |
||||
rxd0-skew-ps = <400>; |
||||
rxd1-skew-ps = <400>; |
||||
rxd2-skew-ps = <400>; |
||||
rxd3-skew-ps = <400>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
nand0: nand@60000000 { |
||||
nand-bus-width = <8>; |
||||
nand-ecc-mode = "hw"; |
||||
atmel,has-pmecc; |
||||
atmel,pmecc-cap = <4>; |
||||
atmel,pmecc-sector-size = <512>; |
||||
nand-on-flash-bbt; |
||||
status = "okay"; |
||||
|
||||
at91bootstrap@0 { |
||||
label = "at91bootstrap"; |
||||
reg = <0x0 0x40000>; |
||||
}; |
||||
|
||||
bootloader@40000 { |
||||
label = "bootloader"; |
||||
reg = <0x40000 0x80000>; |
||||
}; |
||||
|
||||
bootloaderenv@c0000 { |
||||
label = "bootloader env"; |
||||
reg = <0xc0000 0xc0000>; |
||||
}; |
||||
|
||||
dtb@180000 { |
||||
label = "device tree"; |
||||
reg = <0x180000 0x80000>; |
||||
}; |
||||
|
||||
kernel@200000 { |
||||
label = "kernel"; |
||||
reg = <0x200000 0x600000>; |
||||
}; |
||||
|
||||
rootfs@800000 { |
||||
label = "rootfs"; |
||||
reg = <0x800000 0x0f800000>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
leds { |
||||
compatible = "gpio-leds"; |
||||
|
||||
d2 { |
||||
label = "d2"; |
||||
gpios = <&pioE 25 GPIO_ACTIVE_LOW>; /* PE25, conflicts with A25, RXD2 */ |
||||
linux,default-trigger = "heartbeat"; |
||||
}; |
||||
}; |
||||
}; |
@ -0,0 +1,166 @@ |
||||
/* |
||||
* sama5d3xcm_cmp.dtsi - Device Tree Include file for SAMA5D36 CMP CPU Module |
||||
* |
||||
* Copyright (C) 2016 Atmel, |
||||
* |
||||
* Licensed under GPLv2 or later. |
||||
*/ |
||||
|
||||
/ { |
||||
compatible = "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; |
||||
|
||||
chosen { |
||||
bootargs = "rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs"; |
||||
stdout-path = "serial0:115200n8"; |
||||
}; |
||||
|
||||
memory { |
||||
reg = <0x20000000 0x20000000>; |
||||
}; |
||||
|
||||
clocks { |
||||
slow_xtal { |
||||
clock-frequency = <32768>; |
||||
}; |
||||
|
||||
main_xtal { |
||||
clock-frequency = <12000000>; |
||||
}; |
||||
}; |
||||
|
||||
ahb { |
||||
apb { |
||||
spi0: spi@f0004000 { |
||||
cs-gpios = <&pioD 13 0>, <0>, <0>, <0>; |
||||
}; |
||||
|
||||
macb0: ethernet@f0028000 { |
||||
phy-mode = "rgmii"; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
|
||||
ethernet-phy@1 { |
||||
reg = <0x1>; |
||||
interrupt-parent = <&pioB>; |
||||
interrupts = <25 IRQ_TYPE_EDGE_FALLING>; |
||||
txen-skew-ps = <800>; |
||||
txc-skew-ps = <3000>; |
||||
rxdv-skew-ps = <400>; |
||||
rxc-skew-ps = <3000>; |
||||
rxd0-skew-ps = <400>; |
||||
rxd1-skew-ps = <400>; |
||||
rxd2-skew-ps = <400>; |
||||
rxd3-skew-ps = <400>; |
||||
}; |
||||
|
||||
ethernet-phy@7 { |
||||
reg = <0x7>; |
||||
interrupt-parent = <&pioB>; |
||||
interrupts = <25 IRQ_TYPE_EDGE_FALLING>; |
||||
txen-skew-ps = <800>; |
||||
txc-skew-ps = <3000>; |
||||
rxdv-skew-ps = <400>; |
||||
rxc-skew-ps = <3000>; |
||||
rxd0-skew-ps = <400>; |
||||
rxd1-skew-ps = <400>; |
||||
rxd2-skew-ps = <400>; |
||||
rxd3-skew-ps = <400>; |
||||
}; |
||||
}; |
||||
|
||||
i2c1: i2c@f0018000 { |
||||
pmic: act8865@5b { |
||||
compatible = "active-semi,act8865"; |
||||
reg = <0x5b>; |
||||
status = "disabled"; |
||||
|
||||
regulators { |
||||
vcc_1v8_reg: DCDC_REG1 { |
||||
regulator-name = "VCC_1V8"; |
||||
regulator-min-microvolt = <1800000>; |
||||
regulator-max-microvolt = <1800000>; |
||||
regulator-always-on; |
||||
}; |
||||
|
||||
vcc_1v2_reg: DCDC_REG2 { |
||||
regulator-name = "VCC_1V2"; |
||||
regulator-min-microvolt = <1100000>; |
||||
regulator-max-microvolt = <1300000>; |
||||
regulator-always-on; |
||||
}; |
||||
|
||||
vcc_3v3_reg: DCDC_REG3 { |
||||
regulator-name = "VCC_3V3"; |
||||
regulator-min-microvolt = <3300000>; |
||||
regulator-max-microvolt = <3300000>; |
||||
regulator-always-on; |
||||
}; |
||||
|
||||
vddana_reg: LDO_REG1 { |
||||
regulator-name = "VDDANA"; |
||||
regulator-min-microvolt = <3300000>; |
||||
regulator-max-microvolt = <3300000>; |
||||
regulator-always-on; |
||||
}; |
||||
|
||||
vddfuse_reg: LDO_REG2 { |
||||
regulator-name = "FUSE_2V5"; |
||||
regulator-min-microvolt = <2500000>; |
||||
regulator-max-microvolt = <2500000>; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
nand0: nand@60000000 { |
||||
nand-bus-width = <8>; |
||||
nand-ecc-mode = "hw"; |
||||
atmel,has-pmecc; |
||||
atmel,pmecc-cap = <4>; |
||||
atmel,pmecc-sector-size = <512>; |
||||
nand-on-flash-bbt; |
||||
status = "okay"; |
||||
|
||||
at91bootstrap@0 { |
||||
label = "at91bootstrap"; |
||||
reg = <0x0 0x40000>; |
||||
}; |
||||
|
||||
bootloader@40000 { |
||||
label = "bootloader"; |
||||
reg = <0x40000 0x80000>; |
||||
}; |
||||
|
||||
bootloaderenv@c0000 { |
||||
label = "bootloader env"; |
||||
reg = <0xc0000 0xc0000>; |
||||
}; |
||||
|
||||
dtb@180000 { |
||||
label = "device tree"; |
||||
reg = <0x180000 0x80000>; |
||||
}; |
||||
|
||||
kernel@200000 { |
||||
label = "kernel"; |
||||
reg = <0x200000 0x600000>; |
||||
}; |
||||
|
||||
rootfs@800000 { |
||||
label = "rootfs"; |
||||
reg = <0x800000 0x0f800000>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
leds { |
||||
compatible = "gpio-leds"; |
||||
|
||||
d2 { |
||||
label = "d2"; |
||||
gpios = <&pioE 25 GPIO_ACTIVE_LOW>; /* PE25, conflicts with A25, RXD2 */ |
||||
linux,default-trigger = "heartbeat"; |
||||
}; |
||||
}; |
||||
}; |
@ -0,0 +1,41 @@ |
||||
/* |
||||
* sama5d3dm.dtsi - Device Tree file for SAMA5 display module |
||||
* |
||||
* Copyright (C) 2013 Atmel, |
||||
* 2013 Ludovic Desroches <ludovic.desroches@atmel.com> |
||||
* |
||||
* Licensed under GPLv2 or later. |
||||
*/ |
||||
|
||||
/ { |
||||
ahb { |
||||
apb { |
||||
i2c1: i2c@f0018000 { |
||||
qt1070: keyboard@1b { |
||||
compatible = "qt1070"; |
||||
reg = <0x1b>; |
||||
interrupt-parent = <&pioE>; |
||||
interrupts = <31 0x0>; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_qt1070_irq>; |
||||
wakeup-source; |
||||
}; |
||||
}; |
||||
|
||||
adc0: adc@f8018000 { |
||||
atmel,adc-ts-wires = <4>; |
||||
atmel,adc-ts-pressure-threshold = <10000>; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
pinctrl@fffff200 { |
||||
board { |
||||
pinctrl_qt1070_irq: qt1070_irq { |
||||
atmel,pins = |
||||
<AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PE31 GPIO with pull up deglith */ |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
@ -0,0 +1,234 @@ |
||||
/* |
||||
* sama5d3xmb.dts - Device Tree file for SAMA5D3x mother board |
||||
* |
||||
* Copyright (C) 2013 Atmel, |
||||
* 2013 Ludovic Desroches <ludovic.desroches@atmel.com> |
||||
* |
||||
* Licensed under GPLv2 or later. |
||||
*/ |
||||
#include "sama5d3xcm.dtsi" |
||||
|
||||
/ { |
||||
compatible = "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; |
||||
|
||||
chosen { |
||||
u-boot,dm-pre-reloc; |
||||
stdout-path = &dbgu; |
||||
}; |
||||
|
||||
ahb { |
||||
apb { |
||||
mmc0: mmc@f0000000 { |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>; |
||||
status = "okay"; |
||||
u-boot,dm-pre-reloc; |
||||
slot@0 { |
||||
reg = <0>; |
||||
bus-width = <4>; |
||||
cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>; |
||||
}; |
||||
}; |
||||
|
||||
spi0: spi@f0004000 { |
||||
dmas = <0>, <0>; /* Do not use DMA for spi0 */ |
||||
u-boot,dm-pre-reloc; |
||||
|
||||
spi_flash@0 { |
||||
compatible = "spi-flash"; |
||||
spi-max-frequency = <50000000>; |
||||
reg = <0>; |
||||
u-boot,dm-pre-reloc; |
||||
}; |
||||
}; |
||||
|
||||
ssc0: ssc@f0008000 { |
||||
atmel,clk-from-rk-pin; |
||||
}; |
||||
|
||||
/* |
||||
* i2c0 conflicts with ISI: |
||||
* disable it to allow the use of ISI |
||||
* can not enable audio when i2c0 disabled |
||||
*/ |
||||
i2c0: i2c@f0014000 { |
||||
wm8904: wm8904@1a { |
||||
compatible = "wlf,wm8904"; |
||||
reg = <0x1a>; |
||||
clocks = <&pck0>; |
||||
clock-names = "mclk"; |
||||
}; |
||||
}; |
||||
|
||||
i2c1: i2c@f0018000 { |
||||
ov2640: camera@0x30 { |
||||
compatible = "ovti,ov2640"; |
||||
reg = <0x30>; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>; |
||||
resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>; |
||||
pwdn-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>; |
||||
/* use pck1 for the master clock of ov2640 */ |
||||
clocks = <&pck1>; |
||||
clock-names = "xvclk"; |
||||
assigned-clocks = <&pck1>; |
||||
assigned-clock-rates = <25000000>; |
||||
|
||||
port { |
||||
ov2640_0: endpoint { |
||||
remote-endpoint = <&isi_0>; |
||||
bus-width = <8>; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
usart1: serial@f0020000 { |
||||
dmas = <0>, <0>; /* Do not use DMA for usart1 */ |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
isi: isi@f0034000 { |
||||
port { |
||||
isi_0: endpoint { |
||||
remote-endpoint = <&ov2640_0>; |
||||
bus-width = <8>; |
||||
vsync-active = <1>; |
||||
hsync-active = <1>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
mmc1: mmc@f8000000 { |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; |
||||
status = "okay"; |
||||
u-boot,dm-pre-reloc; |
||||
slot@0 { |
||||
reg = <0>; |
||||
bus-width = <4>; |
||||
cd-gpios = <&pioD 18 GPIO_ACTIVE_HIGH>; |
||||
}; |
||||
}; |
||||
|
||||
adc0: adc@f8018000 { |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = < |
||||
&pinctrl_adc0_adtrg |
||||
&pinctrl_adc0_ad0 |
||||
&pinctrl_adc0_ad1 |
||||
&pinctrl_adc0_ad2 |
||||
&pinctrl_adc0_ad3 |
||||
&pinctrl_adc0_ad4 |
||||
>; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
macb1: ethernet@f802c000 { |
||||
phy-mode = "rmii"; |
||||
|
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
phy0: ethernet-phy@1 { |
||||
/*interrupt-parent = <&pioE>;*/ |
||||
/*interrupts = <30 IRQ_TYPE_EDGE_FALLING>;*/ |
||||
reg = <1>; |
||||
}; |
||||
}; |
||||
|
||||
pinctrl@fffff200 { |
||||
board { |
||||
u-boot,dm-pre-reloc; |
||||
pinctrl_mmc0_cd: mmc0_cd { |
||||
u-boot,dm-pre-reloc; |
||||
atmel,pins = |
||||
<AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD17 GPIO with pullup deglitch */ |
||||
}; |
||||
|
||||
pinctrl_mmc1_cd: mmc1_cd { |
||||
u-boot,dm-pre-reloc; |
||||
atmel,pins = |
||||
<AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD18 GPIO with pullup deglitch */ |
||||
}; |
||||
|
||||
pinctrl_pck0_as_audio_mck: pck0_as_audio_mck { |
||||
atmel,pins = |
||||
<AT91_PIOD 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD30 periph B */ |
||||
}; |
||||
|
||||
pinctrl_pck1_as_isi_mck: pck1_as_isi_mck-0 { |
||||
atmel,pins = |
||||
<AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */ |
||||
}; |
||||
|
||||
pinctrl_sensor_reset: sensor_reset-0 { |
||||
atmel,pins = |
||||
<AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE24 gpio */ |
||||
}; |
||||
|
||||
pinctrl_sensor_power: sensor_power-0 { |
||||
atmel,pins = |
||||
<AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE29 gpio */ |
||||
}; |
||||
|
||||
pinctrl_usba_vbus: usba_vbus { |
||||
atmel,pins = |
||||
<AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PD29 GPIO with deglitch */ |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
dbgu: serial@ffffee00 { |
||||
dmas = <0>, <0>; /* Do not use DMA for dbgu */ |
||||
status = "okay"; |
||||
u-boot,dm-pre-reloc; |
||||
}; |
||||
|
||||
watchdog@fffffe40 { |
||||
status = "okay"; |
||||
}; |
||||
}; |
||||
|
||||
usb0: gadget@00500000 { |
||||
atmel,vbus-gpio = <&pioD 29 GPIO_ACTIVE_HIGH>; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_usba_vbus>; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
usb1: ohci@00600000 { |
||||
num-ports = <3>; |
||||
atmel,vbus-gpio = <&pioD 25 GPIO_ACTIVE_HIGH |
||||
&pioD 26 GPIO_ACTIVE_LOW |
||||
&pioD 27 GPIO_ACTIVE_LOW |
||||
>; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
usb2: ehci@00700000 { |
||||
status = "okay"; |
||||
}; |
||||
}; |
||||
|
||||
sound { |
||||
compatible = "atmel,asoc-wm8904"; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_pck0_as_audio_mck>; |
||||
|
||||
atmel,model = "wm8904 @ SAMA5D3EK"; |
||||
atmel,audio-routing = |
||||
"Headphone Jack", "HPOUTL", |
||||
"Headphone Jack", "HPOUTR", |
||||
"IN2L", "Line In Jack", |
||||
"IN2R", "Line In Jack", |
||||
"Mic", "MICBIAS", |
||||
"IN1L", "Mic"; |
||||
|
||||
atmel,ssc-controller = <&ssc0>; |
||||
atmel,audio-codec = <&wm8904>; |
||||
|
||||
status = "disabled"; |
||||
}; |
||||
}; |
@ -0,0 +1,236 @@ |
||||
/* |
||||
* sama5d3xmb_cmp.dts - Device Tree file for SAMA5D3x CMP mother board |
||||
* |
||||
* Copyright (C) 2016 Atmel, |
||||
* |
||||
* Licensed under GPLv2 or later. |
||||
*/ |
||||
#include "sama5d3xcm_cmp.dtsi" |
||||
|
||||
/ { |
||||
compatible = "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; |
||||
|
||||
chosen { |
||||
u-boot,dm-pre-reloc; |
||||
stdout-path = &dbgu; |
||||
}; |
||||
|
||||
ahb { |
||||
apb { |
||||
mmc0: mmc@f0000000 { |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>; |
||||
status = "okay"; |
||||
slot@0 { |
||||
reg = <0>; |
||||
bus-width = <4>; |
||||
cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>; |
||||
}; |
||||
}; |
||||
|
||||
spi0: spi@f0004000 { |
||||
dmas = <0>, <0>; /* Do not use DMA for spi0 */ |
||||
|
||||
spi_flash@0 { |
||||
compatible = "spi-flash"; |
||||
spi-max-frequency = <50000000>; |
||||
reg = <0>; |
||||
}; |
||||
}; |
||||
|
||||
ssc0: ssc@f0008000 { |
||||
atmel,clk-from-rk-pin; |
||||
}; |
||||
|
||||
/* |
||||
* i2c0 conflicts with ISI: |
||||
* disable it to allow the use of ISI |
||||
* can not enable audio when i2c0 disabled |
||||
*/ |
||||
i2c0: i2c@f0014000 { |
||||
wm8904: wm8904@1a { |
||||
compatible = "wlf,wm8904"; |
||||
reg = <0x1a>; |
||||
clocks = <&pck0>; |
||||
clock-names = "mclk"; |
||||
}; |
||||
}; |
||||
|
||||
i2c1: i2c@f0018000 { |
||||
ov2640: camera@0x30 { |
||||
compatible = "ovti,ov2640"; |
||||
reg = <0x30>; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>; |
||||
resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>; |
||||
pwdn-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>; |
||||
/* use pck1 for the master clock of ov2640 */ |
||||
clocks = <&pck1>; |
||||
clock-names = "xvclk"; |
||||
assigned-clocks = <&pck1>; |
||||
assigned-clock-rates = <25000000>; |
||||
|
||||
port { |
||||
ov2640_0: endpoint { |
||||
remote-endpoint = <&isi_0>; |
||||
bus-width = <8>; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
usart1: serial@f0020000 { |
||||
dmas = <0>, <0>; /* Do not use DMA for usart1 */ |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
isi: isi@f0034000 { |
||||
port { |
||||
isi_0: endpoint { |
||||
remote-endpoint = <&ov2640_0>; |
||||
bus-width = <8>; |
||||
vsync-active = <1>; |
||||
hsync-active = <1>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
mmc1: mmc@f8000000 { |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; |
||||
status = "okay"; |
||||
slot@0 { |
||||
reg = <0>; |
||||
bus-width = <4>; |
||||
cd-gpios = <&pioD 18 GPIO_ACTIVE_HIGH>; |
||||
}; |
||||
}; |
||||
|
||||
adc0: adc@f8018000 { |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = < |
||||
&pinctrl_adc0_adtrg |
||||
&pinctrl_adc0_ad0 |
||||
&pinctrl_adc0_ad1 |
||||
&pinctrl_adc0_ad2 |
||||
&pinctrl_adc0_ad3 |
||||
&pinctrl_adc0_ad4 |
||||
>; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
macb1: ethernet@f802c000 { |
||||
phy-mode = "rmii"; |
||||
|
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
phy0: ethernet-phy@1 { |
||||
/*interrupt-parent = <&pioE>;*/ |
||||
/*interrupts = <30 IRQ_TYPE_EDGE_FALLING>;*/ |
||||
reg = <1>; |
||||
}; |
||||
}; |
||||
|
||||
pinctrl@fffff200 { |
||||
board { |
||||
pinctrl_gpio_keys: gpio_keys { |
||||
atmel,pins = |
||||
<AT91_PIOE 27 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; |
||||
}; |
||||
|
||||
pinctrl_mmc0_cd: mmc0_cd { |
||||
atmel,pins = |
||||
<AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD17 GPIO with pullup deglitch */ |
||||
}; |
||||
|
||||
pinctrl_mmc1_cd: mmc1_cd { |
||||
atmel,pins = |
||||
<AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD18 GPIO with pullup deglitch */ |
||||
}; |
||||
|
||||
pinctrl_pck0_as_audio_mck: pck0_as_audio_mck { |
||||
atmel,pins = |
||||
<AT91_PIOD 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD30 periph B */ |
||||
}; |
||||
|
||||
pinctrl_pck1_as_isi_mck: pck1_as_isi_mck-0 { |
||||
atmel,pins = |
||||
<AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */ |
||||
}; |
||||
|
||||
pinctrl_sensor_reset: sensor_reset-0 { |
||||
atmel,pins = |
||||
<AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE24 gpio */ |
||||
}; |
||||
|
||||
pinctrl_sensor_power: sensor_power-0 { |
||||
atmel,pins = |
||||
<AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE29 gpio */ |
||||
}; |
||||
|
||||
pinctrl_usba_vbus: usba_vbus { |
||||
atmel,pins = |
||||
<AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PD29 GPIO with deglitch */ |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
dbgu: serial@ffffee00 { |
||||
dmas = <0>, <0>; /* Do not use DMA for dbgu */ |
||||
status = "okay"; |
||||
u-boot,dm-pre-reloc; |
||||
}; |
||||
|
||||
watchdog@fffffe40 { |
||||
status = "okay"; |
||||
}; |
||||
}; |
||||
|
||||
usb0: gadget@00500000 { |
||||
atmel,vbus-gpio = <&pioD 29 GPIO_ACTIVE_HIGH>; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_usba_vbus>; |
||||
status = "okay"; |
||||
}; |
||||
}; |
||||
|
||||
sound { |
||||
compatible = "atmel,asoc-wm8904"; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_pck0_as_audio_mck>; |
||||
|
||||
atmel,model = "wm8904 @ SAMA5D3EK"; |
||||
atmel,audio-routing = |
||||
"Headphone Jack", "HPOUTL", |
||||
"Headphone Jack", "HPOUTR", |
||||
"IN2L", "Line In Jack", |
||||
"IN2R", "Line In Jack", |
||||
"Mic", "MICBIAS", |
||||
"IN1L", "Mic"; |
||||
|
||||
atmel,ssc-controller = <&ssc0>; |
||||
atmel,audio-codec = <&wm8904>; |
||||
|
||||
status = "disabled"; |
||||
}; |
||||
|
||||
/* Conflict with LCD pins */ |
||||
gpio_keys { |
||||
compatible = "gpio-keys"; |
||||
status = "okay"; |
||||
|
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_gpio_keys>; |
||||
|
||||
pb_user1 { |
||||
label = "pb_user1"; |
||||
gpios = <&pioE 27 GPIO_ACTIVE_HIGH>; |
||||
linux,code = <0x100>; |
||||
gpio-key,wakeup; |
||||
}; |
||||
}; |
||||
}; |
Loading…
Reference in new issue