fsl/usb: Workaround for USB erratum-A007075

Put a delay of 5 millisecond after reset so that ULPI phy
gets enough time to come out of reset. Erratum A007075 applies
to following SOCs and their variants, if any
        P1010 rev 1.0
        B4860 rev 1.0, 2.0
        P4080 rev 2.0, 3.0

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

arch/powerpc/cpu/mpc85xx/cmd_errata.c

@@ -268,6 +268,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #ifdef CONFIG_SYS_FSL_ERRATUM_A005125
 	puts("Work-around for Erratum A005125 enabled\n");
 #endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A007075
+	if (has_erratum_a007075())
+		puts("Work-around for Erratum A007075 enabled\n");
+#endif
 #ifdef CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 	if ((SVR_SOC_VER(svr) == SVR_8548 && IS_SVR_REV(svr, 3, 1)) ||
 	    (SVR_REV(svr) <= CONFIG_SYS_FSL_A004447_SVR_REV))

arch/powerpc/include/asm/config_mpc85xx.h

@@ -154,6 +154,7 @@
 #define CONFIG_SYS_FSL_ERRATUM_IFC_A003399
 #define CONFIG_SYS_FSL_ERRATUM_A005125
 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
+#define CONFIG_SYS_FSL_ERRATUM_A007075
 #define CONFIG_SYS_FSL_ERRATUM_A006261
 #define CONFIG_SYS_FSL_A004447_SVR_REV	0x10
 #define CONFIG_ESDHC_HC_BLK_ADDR
@@ -478,6 +479,7 @@
 #define CONFIG_SYS_P4080_ERRATUM_PCIE_A003
 #define CONFIG_SYS_FSL_ERRATUM_A005812
 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
+#define CONFIG_SYS_FSL_ERRATUM_A007075
 #define CONFIG_SYS_FSL_A004447_SVR_REV	0x20
 
 #elif defined(CONFIG_PPC_P5020) /* also supports P5010 */
@@ -674,6 +676,7 @@
 #define CONFIG_SYS_FSL_ERRATUM_A005871
 #define CONFIG_SYS_FSL_ERRATUM_A006379
 #define CONFIG_SYS_FSL_ERRATUM_A006593
+#define CONFIG_SYS_FSL_ERRATUM_A007075
 #define CONFIG_SYS_FSL_ERRATUM_A006475
 #define CONFIG_SYS_FSL_ERRATUM_A006384
 #define CONFIG_SYS_CCSRBAR_DEFAULT	0xfe000000

arch/powerpc/include/asm/fsl_errata.h

@@ -60,4 +60,20 @@ static inline bool has_erratum_a006261(void)
 }
 #endif
 
+static inline bool has_erratum_a007075(void)
+{
+	u32 svr = get_svr();
+	u32 soc = SVR_SOC_VER(svr);
+
+	switch (soc) {
+	case SVR_B4860:
+	case SVR_B4420:
+		return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+	case SVR_P1010:
+		return IS_SVR_REV(svr, 1, 0);
+	case SVR_P4080:
+		return IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 3, 0);
+	}
+	return false;
+}
 #endif

drivers/usb/host/ehci-fsl.c

@@ -14,6 +14,7 @@
 #include <asm/io.h>
 #include <usb/ehci-fsl.h>
 #include <hwconfig.h>
+#include <asm/fsl_errata.h>
 
 #include "ehci.h"
 
@@ -47,6 +48,15 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 
 	usb_phy[0] = '\0';
 #endif
+	if (has_erratum_a007075()) {
+		/*
+		 * A 5ms delay is needed after applying soft-reset to the
+		 * controller to let external ULPI phy come out of reset.
+		 * This delay needs to be added before re-initializing
+		 * the controller after soft-resetting completes
+		 */
+		mdelay(5);
+	}
 	memset(current_usb_controller, '\0', 5);
 	snprintf(current_usb_controller, 4, "usb%d", index+1);