From b189a83a08d8e2690ab71fa50303c76fe259f007 Mon Sep 17 00:00:00 2001
From: Chander Kashyap <chander.kashyap@linaro.org>
Date: Tue, 25 Dec 2012 20:13:38 +0000
Subject: [PATCH 01/46] EXYNOS: EXYNOS4X12: Populate Exynos4x12 register
 addresses

This patch populates base addresses of Exynos4x12 registers.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/include/asm/arch-exynos/cpu.h | 48 +++++++++++++++++++++++++++++-----
 1 file changed, 42 insertions(+), 6 deletions(-)

diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h
index f06af2e..eb34422 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -27,7 +27,7 @@
 #define EXYNOS_CPU_NAME			"Exynos"
 #define EXYNOS4_ADDR_BASE		0x10000000
 
-/* EXYNOS4 */
+/* EXYNOS4 Common*/
 #define EXYNOS4_I2C_SPACING		0x10000
 
 #define EXYNOS4_GPIO_PART3_BASE		0x03860000
@@ -63,7 +63,40 @@
 #define EXYNOS4_DP_BASE			DEVICE_NOT_AVAILABLE
 #define EXYNOS4_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
 
-/* EXYNOS5 */
+/* EXYNOS4X12 */
+#define EXYNOS4X12_GPIO_PART3_BASE	0x03860000
+#define EXYNOS4X12_PRO_ID		0x10000000
+#define EXYNOS4X12_SYSREG_BASE		0x10010000
+#define EXYNOS4X12_POWER_BASE		0x10020000
+#define EXYNOS4X12_SWRESET		0x10020400
+#define EXYNOS4X12_USBPHY_CONTROL	0x10020704
+#define EXYNOS4X12_CLOCK_BASE		0x10030000
+#define EXYNOS4X12_SYSTIMER_BASE	0x10050000
+#define EXYNOS4X12_WATCHDOG_BASE	0x10060000
+#define EXYNOS4X12_DMC0_BASE		0x10600000
+#define EXYNOS4X12_DMC1_BASE		0x10610000
+#define EXYNOS4X12_GPIO_PART4_BASE	0x106E0000
+#define EXYNOS4X12_GPIO_PART2_BASE	0x11000000
+#define EXYNOS4X12_GPIO_PART1_BASE	0x11400000
+#define EXYNOS4X12_FIMD_BASE		0x11C00000
+#define EXYNOS4X12_MIPI_DSIM_BASE	0x11C80000
+#define EXYNOS4X12_USBOTG_BASE		0x12480000
+#define EXYNOS4X12_MMC_BASE		0x12510000
+#define EXYNOS4X12_SROMC_BASE		0x12570000
+#define EXYNOS4X12_USB_HOST_EHCI_BASE	0x12580000
+#define EXYNOS4X12_USBPHY_BASE		0x125B0000
+#define EXYNOS4X12_UART_BASE		0x13800000
+#define EXYNOS4X12_I2C_BASE		0x13860000
+#define EXYNOS4X12_PWMTIMER_BASE	0x139D0000
+
+#define EXYNOS4X12_ADC_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_DP_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_MODEM_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_I2S_BASE            DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_SPI_BASE            DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_SPI_ISP_BASE                DEVICE_NOT_AVAILABLE
+
+/* EXYNOS5 Common*/
 #define EXYNOS5_I2C_SPACING		0x10000
 
 #define EXYNOS5_GPIO_PART4_BASE		0x03860000
@@ -154,17 +187,20 @@ static inline int proid_is_##type(void)			\
 }
 
 IS_EXYNOS_TYPE(exynos4210, 0x4210)
+IS_EXYNOS_TYPE(exynos4412, 0x4412)
 IS_EXYNOS_TYPE(exynos5250, 0x5250)
 
 #define SAMSUNG_BASE(device, base)				\
 static inline unsigned int samsung_get_base_##device(void)	\
 {								\
-	if (cpu_is_exynos4())					\
+	if (cpu_is_exynos4()) {					\
+		if (proid_is_exynos4412())			\
+			return EXYNOS4X12_##base;		\
 		return EXYNOS4_##base;				\
-	else if (cpu_is_exynos5())				\
+	} else if (cpu_is_exynos5()) {				\
 		return EXYNOS5_##base;				\
-	else							\
-		return 0;					\
+	}							\
+	return 0;						\
 }
 
 SAMSUNG_BASE(adc, ADC_BASE)

From 07235ef8a377937f3ddc71b2bd259658c8c40c6b Mon Sep 17 00:00:00 2001
From: Chander Kashyap <chander.kashyap@linaro.org>
Date: Tue, 25 Dec 2012 20:13:40 +0000
Subject: [PATCH 02/46] EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12

This patch adds clock structure for Exynos4x12.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/include/asm/arch-exynos/clock.h | 276 +++++++++++++++++++++++++++++++
 1 file changed, 276 insertions(+)

diff --git a/arch/arm/include/asm/arch-exynos/clock.h b/arch/arm/include/asm/arch-exynos/clock.h
index ff6781a..9b56b4e 100644
--- a/arch/arm/include/asm/arch-exynos/clock.h
+++ b/arch/arm/include/asm/arch-exynos/clock.h
@@ -251,6 +251,282 @@ struct exynos4_clock {
 	unsigned int	div_iem_l1;
 };
 
+struct exynos4x12_clock {
+	unsigned char	res1[0x4200];
+	unsigned int	src_leftbus;
+	unsigned char	res2[0x1fc];
+	unsigned int	mux_stat_leftbus;
+	unsigned char	res3[0xfc];
+	unsigned int	div_leftbus;
+	unsigned char	res4[0xfc];
+	unsigned int	div_stat_leftbus;
+	unsigned char	res5[0x1fc];
+	unsigned int	gate_ip_leftbus;
+	unsigned char	res6[0x12c];
+	unsigned int	gate_ip_image;
+	unsigned char	res7[0xcc];
+	unsigned int	clkout_leftbus;
+	unsigned int	clkout_leftbus_div_stat;
+	unsigned char	res8[0x37f8];
+	unsigned int	src_rightbus;
+	unsigned char	res9[0x1fc];
+	unsigned int	mux_stat_rightbus;
+	unsigned char	res10[0xfc];
+	unsigned int	div_rightbus;
+	unsigned char	res11[0xfc];
+	unsigned int	div_stat_rightbus;
+	unsigned char	res12[0x1fc];
+	unsigned int	gate_ip_rightbus;
+	unsigned char	res13[0x15c];
+	unsigned int	gate_ip_perir;
+	unsigned char	res14[0x9c];
+	unsigned int	clkout_rightbus;
+	unsigned int	clkout_rightbus_div_stat;
+	unsigned char	res15[0x3608];
+	unsigned int	epll_lock;
+	unsigned char	res16[0xc];
+	unsigned int	vpll_lock;
+	unsigned char	res17[0xec];
+	unsigned int	epll_con0;
+	unsigned int	epll_con1;
+	unsigned int	epll_con2;
+	unsigned char	res18[0x4];
+	unsigned int	vpll_con0;
+	unsigned int	vpll_con1;
+	unsigned int	vpll_con2;
+	unsigned char	res19[0xe4];
+	unsigned int	src_top0;
+	unsigned int	src_top1;
+	unsigned char	res20[0x8];
+	unsigned int	src_cam;
+	unsigned int	src_tv;
+	unsigned int	src_mfc;
+	unsigned int	src_g3d;
+	unsigned char	res21[0x4];
+	unsigned int	src_lcd;
+	unsigned int	src_isp;
+	unsigned int	src_maudio;
+	unsigned int	src_fsys;
+	unsigned char	res22[0xc];
+	unsigned int	src_peril0;
+	unsigned int	src_peril1;
+	unsigned int	src_cam1;
+	unsigned char	res23[0xb4];
+	unsigned int	src_mask_top;
+	unsigned char	res24[0xc];
+	unsigned int	src_mask_cam;
+	unsigned int	src_mask_tv;
+	unsigned char	res25[0xc];
+	unsigned int	src_mask_lcd;
+	unsigned int	src_mask_isp;
+	unsigned int	src_mask_maudio;
+	unsigned int	src_mask_fsys;
+	unsigned char	res26[0xc];
+	unsigned int	src_mask_peril0;
+	unsigned int	src_mask_peril1;
+	unsigned char	res27[0xb8];
+	unsigned int	mux_stat_top0;
+	unsigned int	mux_stat_top1;
+	unsigned char	res28[0x10];
+	unsigned int	mux_stat_mfc;
+	unsigned int	mux_stat_g3d;
+	unsigned char	res29[0x28];
+	unsigned int	mux_stat_cam1;
+	unsigned char	res30[0xb4];
+	unsigned int	div_top;
+	unsigned char	res31[0xc];
+	unsigned int	div_cam;
+	unsigned int	div_tv;
+	unsigned int	div_mfc;
+	unsigned int	div_g3d;
+	unsigned char	res32[0x4];
+	unsigned int	div_lcd;
+	unsigned int	div_isp;
+	unsigned int	div_maudio;
+	unsigned int	div_fsys0;
+	unsigned int	div_fsys1;
+	unsigned int	div_fsys2;
+	unsigned int	div_fsys3;
+	unsigned int	div_peril0;
+	unsigned int	div_peril1;
+	unsigned int	div_peril2;
+	unsigned int	div_peril3;
+	unsigned int	div_peril4;
+	unsigned int	div_peril5;
+	unsigned int	div_cam1;
+	unsigned char	res33[0x14];
+	unsigned int	div2_ratio;
+	unsigned char	res34[0x8c];
+	unsigned int	div_stat_top;
+	unsigned char	res35[0xc];
+	unsigned int	div_stat_cam;
+	unsigned int	div_stat_tv;
+	unsigned int	div_stat_mfc;
+	unsigned int	div_stat_g3d;
+	unsigned char	res36[0x4];
+	unsigned int	div_stat_lcd;
+	unsigned int	div_stat_isp;
+	unsigned int	div_stat_maudio;
+	unsigned int	div_stat_fsys0;
+	unsigned int	div_stat_fsys1;
+	unsigned int	div_stat_fsys2;
+	unsigned int	div_stat_fsys3;
+	unsigned int	div_stat_peril0;
+	unsigned int	div_stat_peril1;
+	unsigned int	div_stat_peril2;
+	unsigned int	div_stat_peril3;
+	unsigned int	div_stat_peril4;
+	unsigned int	div_stat_peril5;
+	unsigned int	div_stat_cam1;
+	unsigned char	res37[0x14];
+	unsigned int	div2_stat;
+	unsigned char	res38[0x29c];
+	unsigned int	gate_ip_cam;
+	unsigned int	gate_ip_tv;
+	unsigned int	gate_ip_mfc;
+	unsigned int	gate_ip_g3d;
+	unsigned char	res39[0x4];
+	unsigned int	gate_ip_lcd;
+	unsigned int	gate_ip_isp;
+	unsigned char	res40[0x4];
+	unsigned int	gate_ip_fsys;
+	unsigned char	res41[0x8];
+	unsigned int	gate_ip_gps;
+	unsigned int	gate_ip_peril;
+	unsigned char	res42[0xc];
+	unsigned char	res43[0x4];
+	unsigned char	res44[0xc];
+	unsigned int	gate_block;
+	unsigned char	res45[0x8c];
+	unsigned int	clkout_cmu_top;
+	unsigned int	clkout_cmu_top_div_stat;
+	unsigned char	res46[0x3600];
+	unsigned int	mpll_lock;
+	unsigned char	res47[0xfc];
+	unsigned int	mpll_con0;
+	unsigned int	mpll_con1;
+	unsigned char	res48[0xf0];
+	unsigned int	src_dmc;
+	unsigned char	res49[0xfc];
+	unsigned int	src_mask_dmc;
+	unsigned char	res50[0xfc];
+	unsigned int	mux_stat_dmc;
+	unsigned char	res51[0xfc];
+	unsigned int	div_dmc0;
+	unsigned int	div_dmc1;
+	unsigned char	res52[0xf8];
+	unsigned int	div_stat_dmc0;
+	unsigned int	div_stat_dmc1;
+	unsigned char	res53[0xf8];
+	unsigned int	gate_bus_dmc0;
+	unsigned int	gate_bus_dmc1;
+	unsigned char	res54[0x1f8];
+	unsigned int	gate_ip_dmc0;
+	unsigned int	gate_ip_dmc1;
+	unsigned char	res55[0xf8];
+	unsigned int	clkout_cmu_dmc;
+	unsigned int	clkout_cmu_dmc_div_stat;
+	unsigned char	res56[0x5f8];
+	unsigned int	dcgidx_map0;
+	unsigned int	dcgidx_map1;
+	unsigned int	dcgidx_map2;
+	unsigned char	res57[0x14];
+	unsigned int	dcgperf_map0;
+	unsigned int	dcgperf_map1;
+	unsigned char	res58[0x18];
+	unsigned int	dvcidx_map;
+	unsigned char	res59[0x1c];
+	unsigned int	freq_cpu;
+	unsigned int	freq_dpm;
+	unsigned char	res60[0x18];
+	unsigned int	dvsemclk_en;
+	unsigned int	maxperf;
+	unsigned char	res61[0x8];
+	unsigned int	dmc_freq_ctrl;
+	unsigned int	dmc_pause_ctrl;
+	unsigned int	dddrphy_lock_ctrl;
+	unsigned int	c2c_state;
+	unsigned char	res62[0x2f60];
+	unsigned int	apll_lock;
+	unsigned char	res63[0x8];
+	unsigned char	res64[0xf4];
+	unsigned int	apll_con0;
+	unsigned int	apll_con1;
+	unsigned char	res65[0xf8];
+	unsigned int	src_cpu;
+	unsigned char	res66[0x1fc];
+	unsigned int	mux_stat_cpu;
+	unsigned char	res67[0xfc];
+	unsigned int	div_cpu0;
+	unsigned int	div_cpu1;
+	unsigned char	res68[0xf8];
+	unsigned int	div_stat_cpu0;
+	unsigned int	div_stat_cpu1;
+	unsigned char	res69[0x2f8];
+	unsigned int	clk_gate_ip_cpu;
+	unsigned char	res70[0xfc];
+	unsigned int	clkout_cmu_cpu;
+	unsigned int	clkout_cmu_cpu_div_stat;
+	unsigned char	res71[0x5f8];
+	unsigned int	armclk_stopctrl;
+	unsigned int	atclk_stopctrl;
+	unsigned char	res72[0x10];
+	unsigned char	res73[0x8];
+	unsigned int	pwr_ctrl;
+	unsigned int	pwr_ctrl2;
+	unsigned char	res74[0xd8];
+	unsigned int	apll_con0_l8;
+	unsigned int	apll_con0_l7;
+	unsigned int	apll_con0_l6;
+	unsigned int	apll_con0_l5;
+	unsigned int	apll_con0_l4;
+	unsigned int	apll_con0_l3;
+	unsigned int	apll_con0_l2;
+	unsigned int	apll_con0_l1;
+	unsigned int	iem_control;
+	unsigned char	res75[0xdc];
+	unsigned int	apll_con1_l8;
+	unsigned int	apll_con1_l7;
+	unsigned int	apll_con1_l6;
+	unsigned int	apll_con1_l5;
+	unsigned int	apll_con1_l4;
+	unsigned int	apll_con1_l3;
+	unsigned int	apll_con1_l2;
+	unsigned int	apll_con1_l1;
+	unsigned char	res76[0xe0];
+	unsigned int	div_iem_l8;
+	unsigned int	div_iem_l7;
+	unsigned int	div_iem_l6;
+	unsigned int	div_iem_l5;
+	unsigned int	div_iem_l4;
+	unsigned int	div_iem_l3;
+	unsigned int	div_iem_l2;
+	unsigned int	div_iem_l1;
+	unsigned char	res77[0xe0];
+	unsigned int	l2_status;
+	unsigned char	res78[0xc];
+	unsigned int	cpu_status;
+	unsigned char	res79[0xc];
+	unsigned int	ptm_status;
+	unsigned char	res80[0x2edc];
+	unsigned int	div_isp0;
+	unsigned int	div_isp1;
+	unsigned char	res81[0xf8];
+	unsigned int	div_stat_isp0;
+	unsigned int	div_stat_isp1;
+	unsigned char	res82[0x3f8];
+	unsigned int	gate_ip_isp0;
+	unsigned int	gate_ip_isp1;
+	unsigned char	res83[0x1f8];
+	unsigned int	clkout_cmu_isp;
+	unsigned int	clkout_cmu_ispd_div_stat;
+	unsigned char	res84[0xf8];
+	unsigned int	cmu_isp_spar0;
+	unsigned int	cmu_isp_spar1;
+	unsigned int	cmu_isp_spar2;
+	unsigned int	cmu_isp_spar3;
+};
+
 struct exynos5_clock {
 	unsigned int	apll_lock;
 	unsigned char	res1[0xfc];

From fa442bbb3f87ce42c1078901b5e77d5af9a9cf38 Mon Sep 17 00:00:00 2001
From: Chander Kashyap <chander.kashyap@linaro.org>
Date: Tue, 25 Dec 2012 20:13:42 +0000
Subject: [PATCH 03/46] EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12

This patch adds gpio structure for Exynos4x12.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/include/asm/arch-exynos/gpio.h | 85 +++++++++++++++++++++++++++++++++
 1 file changed, 85 insertions(+)

diff --git a/arch/arm/include/asm/arch-exynos/gpio.h b/arch/arm/include/asm/arch-exynos/gpio.h
index 4db8fd6..cfe1024 100644
--- a/arch/arm/include/asm/arch-exynos/gpio.h
+++ b/arch/arm/include/asm/arch-exynos/gpio.h
@@ -79,6 +79,67 @@ struct exynos4_gpio_part3 {
 	struct s5p_gpio_bank z;
 };
 
+struct exynos4x12_gpio_part1 {
+	struct s5p_gpio_bank a0;
+	struct s5p_gpio_bank a1;
+	struct s5p_gpio_bank b;
+	struct s5p_gpio_bank c0;
+	struct s5p_gpio_bank c1;
+	struct s5p_gpio_bank d0;
+	struct s5p_gpio_bank d1;
+	struct s5p_gpio_bank res1[0x5];
+	struct s5p_gpio_bank f0;
+	struct s5p_gpio_bank f1;
+	struct s5p_gpio_bank f2;
+	struct s5p_gpio_bank f3;
+	struct s5p_gpio_bank res2[0x2];
+	struct s5p_gpio_bank j0;
+	struct s5p_gpio_bank j1;
+};
+
+struct exynos4x12_gpio_part2 {
+	struct s5p_gpio_bank res1[0x2];
+	struct s5p_gpio_bank k0;
+	struct s5p_gpio_bank k1;
+	struct s5p_gpio_bank k2;
+	struct s5p_gpio_bank k3;
+	struct s5p_gpio_bank l0;
+	struct s5p_gpio_bank l1;
+	struct s5p_gpio_bank l2;
+	struct s5p_gpio_bank y0;
+	struct s5p_gpio_bank y1;
+	struct s5p_gpio_bank y2;
+	struct s5p_gpio_bank y3;
+	struct s5p_gpio_bank y4;
+	struct s5p_gpio_bank y5;
+	struct s5p_gpio_bank y6;
+	struct s5p_gpio_bank res2[0x3];
+	struct s5p_gpio_bank m0;
+	struct s5p_gpio_bank m1;
+	struct s5p_gpio_bank m2;
+	struct s5p_gpio_bank m3;
+	struct s5p_gpio_bank m4;
+	struct s5p_gpio_bank res3[0x48];
+	struct s5p_gpio_bank x0;
+	struct s5p_gpio_bank x1;
+	struct s5p_gpio_bank x2;
+	struct s5p_gpio_bank x3;
+};
+
+struct exynos4x12_gpio_part3 {
+	struct s5p_gpio_bank z;
+};
+
+struct exynos4x12_gpio_part4 {
+	struct s5p_gpio_bank v0;
+	struct s5p_gpio_bank v1;
+	struct s5p_gpio_bank res1[0x1];
+	struct s5p_gpio_bank v2;
+	struct s5p_gpio_bank v3;
+	struct s5p_gpio_bank res2[0x1];
+	struct s5p_gpio_bank v4;
+};
+
 struct exynos5_gpio_part1 {
 	struct s5p_gpio_bank a0;
 	struct s5p_gpio_bank a1;
@@ -163,6 +224,30 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
 	    - EXYNOS4_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \
 	  * GPIO_PER_BANK) + pin) + EXYNOS4_GPIO_PART1_MAX)
 
+#define exynos4x12_gpio_part1_get_nr(bank, pin) \
+	((((((unsigned int) &(((struct exynos4x12_gpio_part1 *) \
+			       EXYNOS4X12_GPIO_PART1_BASE)->bank)) \
+	    - EXYNOS4X12_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \
+	  * GPIO_PER_BANK) + pin)
+
+#define EXYNOS4X12_GPIO_PART1_MAX ((sizeof(struct exynos4x12_gpio_part1) \
+			    / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK)
+
+#define exynos4x12_gpio_part2_get_nr(bank, pin) \
+	(((((((unsigned int) &(((struct exynos4x12_gpio_part2 *) \
+				EXYNOS4X12_GPIO_PART2_BASE)->bank)) \
+	    - EXYNOS4X12_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \
+	  * GPIO_PER_BANK) + pin) + EXYNOS4X12_GPIO_PART1_MAX)
+
+#define EXYNOS4X12_GPIO_PART2_MAX ((sizeof(struct exynos4x12_gpio_part2) \
+			    / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK)
+
+#define exynos4x12_gpio_part3_get_nr(bank, pin) \
+	(((((((unsigned int) &(((struct exynos4x12_gpio_part3 *) \
+				EXYNOS4X12_GPIO_PART3_BASE)->bank)) \
+	    - EXYNOS4X12_GPIO_PART3_BASE) / sizeof(struct s5p_gpio_bank)) \
+	  * GPIO_PER_BANK) + pin) + EXYNOS4X12_GPIO_PART2_MAX)
+
 #define exynos5_gpio_part1_get_nr(bank, pin) \
 	((((((unsigned int) &(((struct exynos5_gpio_part1 *) \
 			       EXYNOS5_GPIO_PART1_BASE)->bank)) \

From 1b652071d0accb06ef8464e594d2f4c7963518f2 Mon Sep 17 00:00:00 2001
From: Hatim RV <hatim.rv@samsung.com>
Date: Tue, 11 Dec 2012 00:52:45 +0000
Subject: [PATCH 04/46] EXYNOS5: FDT: add initial dts file for EXYNOS5250,
 SMDK5250

This patch adds initial dts file for EXYNOS5250 SoC. This dts
file currently include only ethernet devices and properties. More
devices to be added in subsequent patches.
Also add the dts file for SMDK5250 board which uses the EXYNOS5250
dts file.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/dts/exynos5250.dtsi              | 31 +++++++++++++++++++++++++++++++
 board/samsung/dts/exynos5250-smdk5250.dts | 29 +++++++++++++++++++++++++++++
 2 files changed, 60 insertions(+)
 create mode 100644 arch/arm/dts/exynos5250.dtsi
 create mode 100644 board/samsung/dts/exynos5250-smdk5250.dts

diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
new file mode 100644
index 0000000..fa4d498
--- /dev/null
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -0,0 +1,31 @@
+/*
+ * SAMSUNG EXYNOS5250 SoC device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
+ * EXYNOS5250 based board files can include this file and provide
+ * values for board specfic bindings.
+ *
+ * Note: This file does not include device nodes for all the controllers in
+ * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
+ * additional nodes can be added to this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/include/ "skeleton.dtsi"
+
+/ {
+	compatible = "samsung,exynos5250";
+
+	sromc@12250000 {
+		compatible = "samsung,exynos-sromc";
+		reg = <0x12250000 0x20>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+};
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts b/board/samsung/dts/exynos5250-smdk5250.dts
new file mode 100644
index 0000000..b6fbb67
--- /dev/null
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -0,0 +1,29 @@
+/*
+ * SAMSUNG SMDK5250 board device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ ARCH_CPU_DTS
+
+/ {
+	model = "SAMSUNG SMDK5250 board based on EXYNOS5250";
+	compatible = "samsung,smdk5250", "samsung,exynos5250";
+
+	sromc@12250000 {
+		bank = <1>;
+		srom-timing = <1 9 12 1 6 1 1>;
+		width = <2>;
+		lan@5000000 {
+			compatible = "smsc,lan9215", "smsc,lan";
+			reg = <0x5000000 0x100>;
+			phy-mode = "mii";
+		};
+	};
+};

From cc9fe33a3654ab6dffed92631dc26076c427f822 Mon Sep 17 00:00:00 2001
From: Hatim RV <hatim.rv@samsung.com>
Date: Tue, 11 Dec 2012 00:52:46 +0000
Subject: [PATCH 05/46] fdt: exynos5: Add DT node definition for SROM and
 SMSC9215

Add the compatibility string and constant for the ethernet driver
so the device tree parsing code can recognize it.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 include/fdtdec.h | 2 ++
 lib/fdtdec.c     | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index 70d0e97..12587f9 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -70,6 +70,8 @@ enum fdt_compat_id {
 	COMPAT_NVIDIA_TEGRA20_NAND,	/* Tegra2 NAND controller */
 	COMPAT_NVIDIA_TEGRA20_PWM,	/* Tegra 2 PWM controller */
 	COMPAT_NVIDIA_TEGRA20_DC,	/* Tegra 2 Display controller */
+	COMPAT_SMSC_LAN9215,		/* SMSC 10/100 Ethernet LAN9215 */
+	COMPAT_SAMSUNG_EXYNOS5_SROMC,	/* Exynos5 SROMC */
 
 	COMPAT_COUNT,
 };
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 6dba438..adebd79 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -45,6 +45,8 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
 	COMPAT(NVIDIA_TEGRA20_PWM, "nvidia,tegra20-pwm"),
 	COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"),
+	COMPAT(SMSC_LAN9215, "smsc,lan9215"),
+	COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)

From 3ea93948cfaedc8e3d7d7804774be65174d2b56e Mon Sep 17 00:00:00 2001
From: Hatim RV <hatim.rv@samsung.com>
Date: Tue, 11 Dec 2012 00:52:47 +0000
Subject: [PATCH 06/46] exynos5: Add DT based driver for SMC911X ethernet

Add device tree based ethernet driver for SMC911X controller on
SMDK5250 boards.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/include/asm/arch-exynos/sromc.h |  18 +++++
 board/samsung/smdk5250/smdk5250.c        | 115 +++++++++++++++++++++++--------
 2 files changed, 103 insertions(+), 30 deletions(-)

diff --git a/arch/arm/include/asm/arch-exynos/sromc.h b/arch/arm/include/asm/arch-exynos/sromc.h
index f616bcb..dc6aae2 100644
--- a/arch/arm/include/asm/arch-exynos/sromc.h
+++ b/arch/arm/include/asm/arch-exynos/sromc.h
@@ -48,4 +48,22 @@ struct s5p_sromc {
 /* Configure the Band Width and Bank Control Regs for required SROMC Bank */
 void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf);
 
+enum {
+	FDT_SROM_PMC,
+	FDT_SROM_TACP,
+	FDT_SROM_TAH,
+	FDT_SROM_TCOH,
+	FDT_SROM_TACC,
+	FDT_SROM_TCOS,
+	FDT_SROM_TACS,
+
+	FDT_SROM_TIMING_COUNT,
+};
+
+struct fdt_sromc {
+	u8 bank;	/* srom bank number */
+	u8 width;	/* bus width in bytes */
+	unsigned int timing[FDT_SROM_TIMING_COUNT]; /* timing parameters */
+};
+
 #endif /* __ASM_ARCH_SROMC_H_ */
diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c
index 9c926d6..268b42c 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -21,6 +21,7 @@
  */
 
 #include <common.h>
+#include <fdtdec.h>
 #include <asm/io.h>
 #include <i2c.h>
 #include <netdev.h>
@@ -34,34 +35,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_SMC911X
-static int smc9115_pre_init(void)
-{
-	u32 smc_bw_conf, smc_bc_conf;
-	int err;
-
-	/* Ethernet needs data bus width of 16 bits */
-	smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK)
-			| SROMC_BYTE_ENABLE(CONFIG_ENV_SROM_BANK);
-
-	smc_bc_conf = SROMC_BC_TACS(0x01) | SROMC_BC_TCOS(0x01)
-			| SROMC_BC_TACC(0x06) | SROMC_BC_TCOH(0x01)
-			| SROMC_BC_TAH(0x0C)  | SROMC_BC_TACP(0x09)
-			| SROMC_BC_PMC(0x01);
-
-	/* Select and configure the SROMC bank */
-	err = exynos_pinmux_config(PERIPH_ID_SROMC,
-				CONFIG_ENV_SROM_BANK | PINMUX_FLAG_16BIT);
-	if (err) {
-		debug("SROMC not configured\n");
-		return err;
-	}
-
-	s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
-	return 0;
-}
-#endif
-
 int board_init(void)
 {
 	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
@@ -122,12 +95,94 @@ void dram_init_banksize(void)
 							PHYS_SDRAM_8_SIZE);
 }
 
+#ifdef CONFIG_OF_CONTROL
+static int decode_sromc(const void *blob, struct fdt_sromc *config)
+{
+	int err;
+	int node;
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
+	if (node < 0) {
+		debug("Could not find SROMC node\n");
+		return node;
+	}
+
+	config->bank = fdtdec_get_int(blob, node, "bank", 0);
+	config->width = fdtdec_get_int(blob, node, "width", 2);
+
+	err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
+			FDT_SROM_TIMING_COUNT);
+	if (err < 0) {
+		debug("Could not decode SROMC configuration\n");
+		return -FDT_ERR_NOTFOUND;
+	}
+
+	return 0;
+}
+#endif
+
 int board_eth_init(bd_t *bis)
 {
 #ifdef CONFIG_SMC911X
-	if (smc9115_pre_init())
+	u32 smc_bw_conf, smc_bc_conf;
+	struct fdt_sromc config;
+	fdt_addr_t base_addr;
+	int node;
+
+#ifdef CONFIG_OF_CONTROL
+	node = decode_sromc(gd->fdt_blob, &config);
+	if (node < 0) {
+		debug("%s: Could not find sromc configuration\n", __func__);
+		return 0;
+	}
+	node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
+	if (node < 0) {
+		debug("%s: Could not find lan9215 configuration\n", __func__);
+		return 0;
+	}
+
+	/* We now have a node, so any problems from now on are errors */
+	base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
+	if (base_addr == FDT_ADDR_T_NONE) {
+		debug("%s: Could not find lan9215 address\n", __func__);
 		return -1;
-	return smc911x_initialize(0, CONFIG_SMC911X_BASE);
+	}
+#else
+	/* Non-FDT configuration - bank number and timing parameters*/
+	config.bank = CONFIG_ENV_SROM_BANK;
+	config.width = 2;
+
+	config.timing[FDT_SROM_TACS] = 0x01;
+	config.timing[FDT_SROM_TCOS] = 0x01;
+	config.timing[FDT_SROM_TACC] = 0x06;
+	config.timing[FDT_SROM_TCOH] = 0x01;
+	config.timing[FDT_SROM_TAH] = 0x0C;
+	config.timing[FDT_SROM_TACP] = 0x09;
+	config.timing[FDT_SROM_PMC] = 0x01;
+	base_addr = CONFIG_SMC911X_BASE;
+#endif
+
+	/* Ethernet needs data bus width of 16 bits */
+	if (config.width != 2) {
+		debug("%s: Unsupported bus width %d\n", __func__,
+			config.width);
+		return -1;
+	}
+	smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
+			| SROMC_BYTE_ENABLE(config.bank);
+
+	smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS])   |\
+			SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |\
+			SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |\
+			SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |\
+			SROMC_BC_TAH(config.timing[FDT_SROM_TAH])   |\
+			SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |\
+			SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
+
+	/* Select and configure the SROMC bank */
+	exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
+	s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
+	return smc911x_initialize(0, base_addr);
 #endif
 	return 0;
 }

From 540b5af281aea3a07165463dc80fd02e3e849f1a Mon Sep 17 00:00:00 2001
From: Hatim RV <hatim.rv@samsung.com>
Date: Tue, 11 Dec 2012 00:52:48 +0000
Subject: [PATCH 07/46] exynos5: config: Rename the smdk5250.h to
 exynos5250-dt.h

Create a common configuration file for all exynos5250 based boards.
Going forward we will be using DT based driver discovery for all the boards
based on Exynos5. The different boards added will have there own config.h files
which internally will include this file and specify their specific DT files.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 include/configs/{smdk5250.h => exynos5250-dt.h} | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)
 rename include/configs/{smdk5250.h => exynos5250-dt.h} (97%)

diff --git a/include/configs/smdk5250.h b/include/configs/exynos5250-dt.h
similarity index 97%
rename from include/configs/smdk5250.h
rename to include/configs/exynos5250-dt.h
index 75c25c0..59182f4 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/exynos5250-dt.h
@@ -1,7 +1,7 @@
 /*
- * Copyright (C) 2011 Samsung Electronics
+ * Copyright (C) 2012 Samsung Electronics
  *
- * Configuration settings for the SAMSUNG SMDK5250 (EXYNOS5250) board.
+ * Configuration settings for the SAMSUNG EXYNOS5250 board.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -37,6 +37,11 @@
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
+/* Enable fdt support for Exynos5250 */
+#define CONFIG_ARCH_DEVICE_TREE		exynos5250
+#define CONFIG_OF_CONTROL
+#define CONFIG_OF_SEPARATE
+
 /* Keep L2 Cache Disabled */
 #define CONFIG_SYS_DCACHE_OFF
 

From f1cbca2be56e53f4cb7d613de13bb311c1d79730 Mon Sep 17 00:00:00 2001
From: Hatim RV <hatim.rv@samsung.com>
Date: Tue, 11 Dec 2012 00:52:49 +0000
Subject: [PATCH 08/46] SMDK5250: config: Add configuration file for SMDK5250
 board

Add the configuration file for exynos5250 based SMDK5250 board.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 include/configs/smdk5250.h | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 include/configs/smdk5250.h

diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
new file mode 100644
index 0000000..81f83a8
--- /dev/null
+++ b/include/configs/smdk5250.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * Configuration settings for the SAMSUNG SMDK5250 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_SMDK_H
+#define __CONFIG_SMDK_H
+
+#include <configs/exynos5250-dt.h>
+
+#undef CONFIG_DEFAULT_DEVICE_TREE
+#define CONFIG_DEFAULT_DEVICE_TREE	exynos5250-smdk5250
+
+#endif	/* __CONFIG_SMDK_H */

From a527757316524b2ef36af79cb78679195fa6592e Mon Sep 17 00:00:00 2001
From: Chander Kashyap <chander.kashyap@linaro.org>
Date: Sun, 7 Oct 2012 01:43:17 +0000
Subject: [PATCH 09/46] EXYNOS: EXYNOS4X12: extract Exynos4x12 IPs clock
 frequency

Adds functions to extract clock frequency of Exynos4x12 IPs.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/cpu/armv7/exynos/clock.c | 163 ++++++++++++++++++++++++++++++++++++--
 1 file changed, 158 insertions(+), 5 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c
index 7459979..ae6d7fe 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -112,6 +112,36 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
 	return exynos_get_pll_clk(pllreg, r, k);
 }
 
+/* exynos4x12: return pll clock frequency */
+static unsigned long exynos4x12_get_pll_clk(int pllreg)
+{
+	struct exynos4x12_clock *clk =
+		(struct exynos4x12_clock *)samsung_get_base_clock();
+	unsigned long r, k = 0;
+
+	switch (pllreg) {
+	case APLL:
+		r = readl(&clk->apll_con0);
+		break;
+	case MPLL:
+		r = readl(&clk->mpll_con0);
+		break;
+	case EPLL:
+		r = readl(&clk->epll_con0);
+		k = readl(&clk->epll_con1);
+		break;
+	case VPLL:
+		r = readl(&clk->vpll_con0);
+		k = readl(&clk->vpll_con1);
+		break;
+	default:
+		printf("Unsupported PLL (%d)\n", pllreg);
+		return 0;
+	}
+
+	return exynos_get_pll_clk(pllreg, r, k);
+}
+
 /* exynos5: return pll clock frequency */
 static unsigned long exynos5_get_pll_clk(int pllreg)
 {
@@ -193,6 +223,28 @@ static unsigned long exynos4_get_arm_clk(void)
 	return armclk;
 }
 
+/* exynos4x12: return ARM clock frequency */
+static unsigned long exynos4x12_get_arm_clk(void)
+{
+	struct exynos4x12_clock *clk =
+		(struct exynos4x12_clock *)samsung_get_base_clock();
+	unsigned long div;
+	unsigned long armclk;
+	unsigned int core_ratio;
+	unsigned int core2_ratio;
+
+	div = readl(&clk->div_cpu0);
+
+	/* CORE_RATIO: [2:0], CORE2_RATIO: [30:28] */
+	core_ratio = (div >> 0) & 0x7;
+	core2_ratio = (div >> 28) & 0x7;
+
+	armclk = get_pll_clk(APLL) / (core_ratio + 1);
+	armclk /= (core2_ratio + 1);
+
+	return armclk;
+}
+
 /* exynos5: return ARM clock frequency */
 static unsigned long exynos5_get_arm_clk(void)
 {
@@ -258,6 +310,20 @@ static unsigned long exynos4_get_pwm_clk(void)
 	return pclk;
 }
 
+/* exynos4x12: return pwm clock frequency */
+static unsigned long exynos4x12_get_pwm_clk(void)
+{
+	unsigned long pclk, sclk;
+	unsigned int ratio;
+
+	sclk = get_pll_clk(MPLL);
+	ratio = 8;
+
+	pclk = sclk / (ratio + 1);
+
+	return pclk;
+}
+
 /* exynos5: return pwm clock frequency */
 static unsigned long exynos5_get_pwm_clk(void)
 {
@@ -326,6 +392,51 @@ static unsigned long exynos4_get_uart_clk(int dev_index)
 	return uclk;
 }
 
+/* exynos4x12: return uart clock frequency */
+static unsigned long exynos4x12_get_uart_clk(int dev_index)
+{
+	struct exynos4x12_clock *clk =
+		(struct exynos4x12_clock *)samsung_get_base_clock();
+	unsigned long uclk, sclk;
+	unsigned int sel;
+	unsigned int ratio;
+
+	/*
+	 * CLK_SRC_PERIL0
+	 * UART0_SEL [3:0]
+	 * UART1_SEL [7:4]
+	 * UART2_SEL [8:11]
+	 * UART3_SEL [12:15]
+	 * UART4_SEL [16:19]
+	 */
+	sel = readl(&clk->src_peril0);
+	sel = (sel >> (dev_index << 2)) & 0xf;
+
+	if (sel == 0x6)
+		sclk = get_pll_clk(MPLL);
+	else if (sel == 0x7)
+		sclk = get_pll_clk(EPLL);
+	else if (sel == 0x8)
+		sclk = get_pll_clk(VPLL);
+	else
+		return 0;
+
+	/*
+	 * CLK_DIV_PERIL0
+	 * UART0_RATIO [3:0]
+	 * UART1_RATIO [7:4]
+	 * UART2_RATIO [8:11]
+	 * UART3_RATIO [12:15]
+	 * UART4_RATIO [16:19]
+	 */
+	ratio = readl(&clk->div_peril0);
+	ratio = (ratio >> (dev_index << 2)) & 0xf;
+
+	uclk = sclk / (ratio + 1);
+
+	return uclk;
+}
+
 /* exynos5: return uart clock frequency */
 static unsigned long exynos5_get_uart_clk(int dev_index)
 {
@@ -400,6 +511,33 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int div)
 	writel(val, addr);
 }
 
+/* exynos4x12: set the mmc clock */
+static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div)
+{
+	struct exynos4x12_clock *clk =
+		(struct exynos4x12_clock *)samsung_get_base_clock();
+	unsigned int addr;
+	unsigned int val;
+
+	/*
+	 * CLK_DIV_FSYS1
+	 * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
+	 * CLK_DIV_FSYS2
+	 * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
+	 */
+	if (dev_index < 2) {
+		addr = (unsigned int)&clk->div_fsys1;
+	} else {
+		addr = (unsigned int)&clk->div_fsys2;
+		dev_index -= 2;
+	}
+
+	val = readl(addr);
+	val &= ~(0xff << ((dev_index << 4) + 8));
+	val |= (div & 0xff) << ((dev_index << 4) + 8);
+	writel(val, addr);
+}
+
 /* exynos5: set the mmc clock */
 static void exynos5_set_mmc_clk(int dev_index, unsigned int div)
 {
@@ -940,16 +1078,22 @@ unsigned long get_pll_clk(int pllreg)
 {
 	if (cpu_is_exynos5())
 		return exynos5_get_pll_clk(pllreg);
-	else
+	else {
+		if (proid_is_exynos4412())
+			return exynos4x12_get_pll_clk(pllreg);
 		return exynos4_get_pll_clk(pllreg);
+	}
 }
 
 unsigned long get_arm_clk(void)
 {
 	if (cpu_is_exynos5())
 		return exynos5_get_arm_clk();
-	else
+	else {
+		if (proid_is_exynos4412())
+			return exynos4x12_get_arm_clk();
 		return exynos4_get_arm_clk();
+	}
 }
 
 unsigned long get_i2c_clk(void)
@@ -968,24 +1112,33 @@ unsigned long get_pwm_clk(void)
 {
 	if (cpu_is_exynos5())
 		return exynos5_get_pwm_clk();
-	else
+	else {
+		if (proid_is_exynos4412())
+			return exynos4x12_get_pwm_clk();
 		return exynos4_get_pwm_clk();
+	}
 }
 
 unsigned long get_uart_clk(int dev_index)
 {
 	if (cpu_is_exynos5())
 		return exynos5_get_uart_clk(dev_index);
-	else
+	else {
+		if (proid_is_exynos4412())
+			return exynos4x12_get_uart_clk(dev_index);
 		return exynos4_get_uart_clk(dev_index);
+	}
 }
 
 void set_mmc_clk(int dev_index, unsigned int div)
 {
 	if (cpu_is_exynos5())
 		exynos5_set_mmc_clk(dev_index, div);
-	else
+	else {
+		if (proid_is_exynos4412())
+			exynos4x12_set_mmc_clk(dev_index, div);
 		exynos4_set_mmc_clk(dev_index, div);
+	}
 }
 
 unsigned long get_lcd_clk(void)

From 35777e222627c07b8f6aeffe36d71da3bda3e6d8 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C5=81ukasz=20Majewski?= <l.majewski@samsung.com>
Date: Wed, 2 Jan 2013 06:06:02 +0000
Subject: [PATCH 10/46] spl:falcon:trats Update Trats default board
 configuration file to support FALCON MODE

Support for a new command (defined at envs) - spl_export generates
the ATAGS image necessary for fast boot. Afterwards, it is stored
at ext4 partition.

Generated image format:
CRC [4B] SIZE [4B] PAYLOAD(ATAGS/DT) [SIZE]

Remarks:
- CRC is calculated only for PAYLOAD
- SIZE is the size of PAYLOAD

It is important to adjust ${splsize} when large image is generated.
It is defined as hex, since ext4 related commands expect it.

The ${spladdr} environment variable corresponds to
CONFIG_SYS_SPL_ARGS_ADDR

Additionally definitions for DFU have been refactored and support for
EFI has been added as well.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 board/samsung/trats/trats.c |  2 +-
 include/configs/trats.h     | 45 +++++++++++++++++++++++++++++++++++----------
 2 files changed, 36 insertions(+), 11 deletions(-)

diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 4724029..88d193d 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -67,7 +67,7 @@ struct s3c_plat_otg_data s5pc210_otg_data;
 
 int board_init(void)
 {
-	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+	gd->bd->bi_boot_params = CONFIG_SYS_SPL_ARGS_ADDR;
 
 	check_hw_revision();
 	printf("HW Revision:\t0x%x\n", board_rev);
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 6efee5c..63745ac 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -99,6 +99,7 @@
 #define CONFIG_CMD_MMC
 #define CONFIG_CMD_DFU
 #define CONFIG_CMD_GPT
+#define CONFIG_CMD_SETEXPR
 
 /* FAT */
 #define CONFIG_CMD_FAT
@@ -144,9 +145,8 @@
 	"name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
 
 #define CONFIG_DFU_ALT \
-	"dfu_alt_info=" \
 	"u-boot mmc 80 400;" \
-	"uImage fat 0 2\0" \
+	"uImage ext4 0 2\0" \
 
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_SYS_CONSOLE_INFO_QUIET
@@ -165,20 +165,20 @@
 		"mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
 	"lpj=lpj=3981312\0" \
 	"nfsboot=" \
-		"set bootargs root=/dev/nfs rw " \
+		"setenv bootargs root=/dev/nfs rw " \
 		"nfsroot=${nfsroot},nolock,tcp " \
 		"ip=${ipaddr}:${serverip}:${gatewayip}:" \
 		"${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
 		"; run bootk\0" \
 	"ramfsboot=" \
-		"set bootargs root=/dev/ram0 rw rootfstype=ext2 " \
+		"setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
 		"${console} ${meminfo} " \
 		"initrd=0x43000000,8M ramdisk=8192\0" \
 	"mmcboot=" \
-		"set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
+		"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
 		"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
 		"run loaduimage; bootm 0x40007FC0\0" \
-	"bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
+	"bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
 	"boottrace=setenv opts initcall_debug; run bootcmd\0" \
 	"mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
 	"verify=n\0" \
@@ -187,13 +187,31 @@
 	"meminfo=crashkernel=32M@0x50000000\0" \
 	"nfsroot=/nfsroot/arm\0" \
 	"bootblock=" CONFIG_BOOTBLOCK "\0" \
-	"loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
+	"loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
 	"mmcdev=0\0" \
 	"mmcbootpart=2\0" \
-	"mmcrootpart=3\0" \
+	"mmcrootpart=5\0" \
 	"opts=always_resume=1\0" \
 	"partitions=" PARTS_DEFAULT \
-	CONFIG_DFU_ALT \
+	"dfu_alt_info=" CONFIG_DFU_ALT \
+	"spladdr=0x40000100\0" \
+	"splsize=0x200\0" \
+	"splfile=falcon.bin\0" \
+	"spl_export=" \
+		   "setexpr spl_imgsize ${splsize} + 8 ;" \
+		   "setexpr spl_imgaddr ${spladdr} - 8 ;" \
+		   "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
+		   "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
+		   "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
+		   "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
+		   "spl export atags 0x40007FC0;" \
+		   "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
+		   "mw.l ${spl_addr_tmp} ${splsize};" \
+		   "ext4write mmc ${mmcdev}:${mmcbootpart}" \
+		   " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
+		   "setenv spl_imgsize;" \
+		   "setenv spl_imgaddr;" \
+		   "setenv spl_addr_tmp;\0"
 
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
@@ -234,6 +252,14 @@
 #define CONFIG_ENV_OFFSET		((32 - 4) << 10) /* 32KiB - 4KiB */
 
 #define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+
+/* EXT4 */
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_EXT4_WRITE
+/* Falcon mode definitions */
+#define CONFIG_CMD_SPL
+#define CONFIG_SYS_SPL_ARGS_ADDR        PHYS_SDRAM_1 + 0x100
 
 /* GPT */
 #define CONFIG_EFI_PARTITION
@@ -242,7 +268,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_CACHELINE_SIZE       32
 
-
 #define CONFIG_SOFT_I2C
 #define CONFIG_SOFT_I2C_READ_REPEATED_START
 #define CONFIG_SYS_I2C_INIT_BOARD

From 7a84e1fa223c2416f697c4fac5490bdddcf09a41 Mon Sep 17 00:00:00 2001
From: Piotr Wilczek <p.wilczek@samsung.com>
Date: Wed, 2 Jan 2013 21:31:00 +0000
Subject: [PATCH 11/46] arm:exynos4:pinmux: Modify the gpio function for mmc

This patch add pinmux settings for Exynos4 for mmc0 and mmc2

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/cpu/armv7/exynos/pinmux.c | 45 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
index 20a4b84..ee58dac 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -370,6 +370,43 @@ static void exynos4_i2c_config(int peripheral, int flags)
 	}
 }
 
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+	struct exynos4_gpio_part2 *gpio2 =
+		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+	struct s5p_gpio_bank *bank, *bank_ext;
+	int i;
+
+	switch (peripheral) {
+	case PERIPH_ID_SDMMC0:
+		bank = &gpio2->k0;
+		bank_ext = &gpio2->k1;
+		break;
+	case PERIPH_ID_SDMMC2:
+		bank = &gpio2->k2;
+		bank_ext = &gpio2->k3;
+		break;
+	default:
+		return -1;
+	}
+	for (i = 0; i < 7; i++) {
+		if (i == 2)
+			continue;
+		s5p_gpio_cfg_pin(bank, i,  GPIO_FUNC(0x2));
+		s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+		s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+	}
+	if (flags & PINMUX_FLAG_8BIT_MODE) {
+		for (i = 3; i < 7; i++) {
+			s5p_gpio_cfg_pin(bank_ext, i,  GPIO_FUNC(0x3));
+			s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
+			s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+		}
+	}
+
+	return 0;
+}
+
 static int exynos4_pinmux_config(int peripheral, int flags)
 {
 	switch (peripheral) {
@@ -383,6 +420,14 @@ static int exynos4_pinmux_config(int peripheral, int flags)
 	case PERIPH_ID_I2C7:
 		exynos4_i2c_config(peripheral, flags);
 		break;
+	case PERIPH_ID_SDMMC0:
+	case PERIPH_ID_SDMMC2:
+		return exynos4_mmc_config(peripheral, flags);
+	case PERIPH_ID_SDMMC1:
+	case PERIPH_ID_SDMMC3:
+	case PERIPH_ID_SDMMC4:
+		printf("SDMMC device %d not implemented\n", peripheral);
+		return -1;
 	default:
 		debug("%s: invalid peripheral %d", __func__, peripheral);
 		return -1;

From c2425b66c3b9fdbb3b3c4addeb7c26f04962f8fe Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:08 +0000
Subject: [PATCH 12/46] EXYNOS5: FDT: Add I2C device node data

Add I2C device node data for exynos

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/dts/exynos5250.dtsi | 64 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)

diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index fa4d498..7a50b2e 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -28,4 +28,68 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 	};
+
+	i2c@12c60000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,s3c2440-i2c";
+		reg = <0x12C60000 0x100>;
+		interrupts = <0 56 0>;
+	};
+
+	i2c@12c70000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,s3c2440-i2c";
+		reg = <0x12C70000 0x100>;
+		interrupts = <0 57 0>;
+	};
+
+	i2c@12c80000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,s3c2440-i2c";
+		reg = <0x12C80000 0x100>;
+		interrupts = <0 58 0>;
+	};
+
+	i2c@12c90000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,s3c2440-i2c";
+		reg = <0x12C90000 0x100>;
+		interrupts = <0 59 0>;
+	};
+
+	i2c@12ca0000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,s3c2440-i2c";
+		reg = <0x12CA0000 0x100>;
+		interrupts = <0 60 0>;
+	};
+
+	i2c@12cb0000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,s3c2440-i2c";
+		reg = <0x12CB0000 0x100>;
+		interrupts = <0 61 0>;
+	};
+
+	i2c@12cc0000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,s3c2440-i2c";
+		reg = <0x12CC0000 0x100>;
+		interrupts = <0 62 0>;
+	};
+
+	i2c@12cd0000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,s3c2440-i2c";
+		reg = <0x12CD0000 0x100>;
+		interrupts = <0 63 0>;
+	};
 };

From 961a54ce1b6a115a12c3d11a777fd8c98a184c3b Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:09 +0000
Subject: [PATCH 13/46] EXYNOS5 : FDT: Add Aliases for I2C device

This patch adds aliases for I2C.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 board/samsung/dts/exynos5250-smdk5250.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/board/samsung/dts/exynos5250-smdk5250.dts b/board/samsung/dts/exynos5250-smdk5250.dts
index b6fbb67..0f971c0 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -16,6 +16,17 @@
 	model = "SAMSUNG SMDK5250 board based on EXYNOS5250";
 	compatible = "samsung,smdk5250", "samsung,exynos5250";
 
+	aliases {
+		i2c0 = "/i2c@12c60000";
+		i2c1 = "/i2c@12c70000";
+		i2c2 = "/i2c@12c80000";
+		i2c3 = "/i2c@12c90000";
+		i2c4 = "/i2c@12ca0000";
+		i2c5 = "/i2c@12cb0000";
+		i2c6 = "/i2c@12cc0000";
+		i2c7 = "/i2c@12cd0000";
+	};
+
 	sromc@12250000 {
 		bank = <1>;
 		srom-timing = <1 9 12 1 6 1 1>;

From c34253d1fc83e4cf231af77c667827a51c3f28cb Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:10 +0000
Subject: [PATCH 14/46] FDT: Add compatible string for I2C

Add required compatible information for I2C driver.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 include/fdtdec.h | 1 +
 lib/fdtdec.c     | 1 +
 2 files changed, 2 insertions(+)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index 12587f9..934438c 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -72,6 +72,7 @@ enum fdt_compat_id {
 	COMPAT_NVIDIA_TEGRA20_DC,	/* Tegra 2 Display controller */
 	COMPAT_SMSC_LAN9215,		/* SMSC 10/100 Ethernet LAN9215 */
 	COMPAT_SAMSUNG_EXYNOS5_SROMC,	/* Exynos5 SROMC */
+	COMPAT_SAMSUNG_S3C2440_I2C,	/* Exynos I2C Controller */
 
 	COMPAT_COUNT,
 };
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index adebd79..b73ed8b 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -47,6 +47,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"),
 	COMPAT(SMSC_LAN9215, "smsc,lan9215"),
 	COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
+	COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)

From d055911887583e36e550900506c80fbd73c89a58 Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:11 +0000
Subject: [PATCH 15/46] EXYNOS5: FDT : Decode peripheral id

Api is added to decode peripheral id based on the interrupt number
of the peripheral.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/cpu/armv7/exynos/pinmux.c        | 29 +++++++++++++++++++++++++++
 arch/arm/include/asm/arch-exynos/periph.h | 33 +++++++++++++++++++------------
 arch/arm/include/asm/arch-exynos/pinmux.h |  8 ++++++++
 3 files changed, 57 insertions(+), 13 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
index ee58dac..bd499b4 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -22,6 +22,7 @@
  */
 
 #include <common.h>
+#include <fdtdec.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/sromc.h>
@@ -447,3 +448,31 @@ int exynos_pinmux_config(int peripheral, int flags)
 		return -1;
 	}
 }
+
+#ifdef CONFIG_OF_CONTROL
+static int exynos5_pinmux_decode_periph_id(const void *blob, int node)
+{
+	int err;
+	u32 cell[3];
+
+	err = fdtdec_get_int_array(blob, node, "interrupts", cell,
+					ARRAY_SIZE(cell));
+	if (err)
+		return PERIPH_ID_NONE;
+
+	/* check for invalid peripheral id */
+	if ((PERIPH_ID_SDMMC4 > cell[1]) || (cell[1] < PERIPH_ID_UART0))
+		return cell[1];
+
+	debug(" invalid peripheral id\n");
+	return PERIPH_ID_NONE;
+}
+
+int pinmux_decode_periph_id(const void *blob, int node)
+{
+	if (cpu_is_exynos5())
+		return  exynos5_pinmux_decode_periph_id(blob, node);
+	else
+		return PERIPH_ID_NONE;
+}
+#endif
diff --git a/arch/arm/include/asm/arch-exynos/periph.h b/arch/arm/include/asm/arch-exynos/periph.h
index 13abd2d..89bcdfc 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -25,12 +25,17 @@
 #define __ASM_ARM_ARCH_PERIPH_H
 
 /*
- * Peripherals requiring clock/pinmux configuration. List will
+ * Peripherals required for pinmux configuration. List will
  * grow with support for more devices getting added.
+ * Numbering based on interrupt table.
  *
  */
 enum periph_id {
-	PERIPH_ID_I2C0,
+	PERIPH_ID_UART0 = 51,
+	PERIPH_ID_UART1,
+	PERIPH_ID_UART2,
+	PERIPH_ID_UART3,
+	PERIPH_ID_I2C0 = 56,
 	PERIPH_ID_I2C1,
 	PERIPH_ID_I2C2,
 	PERIPH_ID_I2C3,
@@ -38,22 +43,24 @@ enum periph_id {
 	PERIPH_ID_I2C5,
 	PERIPH_ID_I2C6,
 	PERIPH_ID_I2C7,
-	PERIPH_ID_I2S1,
-	PERIPH_ID_SDMMC0,
+	PERIPH_ID_SPI0 = 68,
+	PERIPH_ID_SPI1,
+	PERIPH_ID_SPI2,
+	PERIPH_ID_SDMMC0 = 75,
 	PERIPH_ID_SDMMC1,
 	PERIPH_ID_SDMMC2,
 	PERIPH_ID_SDMMC3,
-	PERIPH_ID_SDMMC4,
-	PERIPH_ID_SROMC,
-	PERIPH_ID_SPI0,
-	PERIPH_ID_SPI1,
-	PERIPH_ID_SPI2,
+	PERIPH_ID_I2S1 = 99,
+
+	/* Since following peripherals do
+	 * not have shared peripheral interrupts (SPIs)
+	 * they are numbered arbitiraly after the maximum
+	 * SPIs Exynos has (128)
+	 */
+	PERIPH_ID_SROMC = 128,
 	PERIPH_ID_SPI3,
 	PERIPH_ID_SPI4,
-	PERIPH_ID_UART0,
-	PERIPH_ID_UART1,
-	PERIPH_ID_UART2,
-	PERIPH_ID_UART3,
+	PERIPH_ID_SDMMC4,
 
 	PERIPH_ID_COUNT,
 	PERIPH_ID_NONE = -1,
diff --git a/arch/arm/include/asm/arch-exynos/pinmux.h b/arch/arm/include/asm/arch-exynos/pinmux.h
index 10ea736..014eebc 100644
--- a/arch/arm/include/asm/arch-exynos/pinmux.h
+++ b/arch/arm/include/asm/arch-exynos/pinmux.h
@@ -55,4 +55,12 @@ enum {
  */
 int exynos_pinmux_config(int peripheral, int flags);
 
+/**
+ * Decode the peripheral id using the interrpt numbers.
+ *
+ * @param blob  Device tree blob
+ * @param node  FDT I2C node to find
+ * @return peripheral id if ok, PERIPH_ID_NONE on error
+ */
+int pinmux_decode_periph_id(const void *blob, int node);
 #endif

From a9d2ae7014d9e66dde6dd4a344308449508e4a22 Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:12 +0000
Subject: [PATCH 16/46] I2C: Driver changes for FDT support

Functions added to get the I2C bus number and reset I2C bus using
FDT node.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 drivers/i2c/s3c24x0_i2c.c | 83 ++++++++++++++++++++++++++++++++++++++++++++++-
 drivers/i2c/s3c24x0_i2c.h |  8 +++++
 include/i2c.h             | 26 +++++++++++++++
 3 files changed, 116 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 90d297a..7ec01ec 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -27,9 +27,11 @@
  */
 
 #include <common.h>
+#include <fdtdec.h>
 #if (defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
 #include <asm/arch/clk.h>
 #include <asm/arch/cpu.h>
+#include <asm/arch/pinmux.h>
 #else
 #include <asm/arch/s3c24x0_cpu.h>
 #endif
@@ -60,7 +62,14 @@
 #define I2C_TIMEOUT 1		/* 1 second */
 
 
-static unsigned int g_current_bus;	/* Stores Current I2C Bus */
+/*
+ * For SPL boot some boards need i2c before SDRAM is initialised so force
+ * variables to live in SRAM
+ */
+static unsigned int g_current_bus __attribute__((section(".data")));
+static struct s3c24x0_i2c_bus i2c_bus[CONFIG_MAX_I2C_NUM]
+			__attribute__((section(".data")));
+static int i2c_busses __attribute__((section(".data")));
 
 #if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
 static int GetI2CSDA(void)
@@ -512,4 +521,76 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 		(i2c, I2C_WRITE, chip << 1, &xaddr[4 - alen], alen, buffer,
 		 len) != 0);
 }
+
+#ifdef CONFIG_OF_CONTROL
+void board_i2c_init(const void *blob)
+{
+	int node_list[CONFIG_MAX_I2C_NUM];
+	int count, i;
+
+	count = fdtdec_find_aliases_for_id(blob, "i2c",
+		COMPAT_SAMSUNG_S3C2440_I2C, node_list,
+		CONFIG_MAX_I2C_NUM);
+
+	for (i = 0; i < count; i++) {
+		struct s3c24x0_i2c_bus *bus;
+		int node = node_list[i];
+
+		if (node <= 0)
+			continue;
+		bus = &i2c_bus[i];
+		bus->regs = (struct s3c24x0_i2c *)
+			fdtdec_get_addr(blob, node, "reg");
+		bus->id = pinmux_decode_periph_id(blob, node);
+		bus->node = node;
+		bus->bus_num = i2c_busses++;
+		exynos_pinmux_config(bus->id, 0);
+	}
+}
+
+static struct s3c24x0_i2c_bus *get_bus(unsigned int bus_idx)
+{
+	if (bus_idx < i2c_busses)
+		return &i2c_bus[bus_idx];
+
+	debug("Undefined bus: %d\n", bus_idx);
+	return NULL;
+}
+
+int i2c_get_bus_num_fdt(int node)
+{
+	int i;
+
+	for (i = 0; i < i2c_busses; i++) {
+		if (node == i2c_bus[i].node)
+			return i;
+	}
+
+	debug("%s: Can't find any matched I2C bus\n", __func__);
+	return -1;
+}
+
+int i2c_reset_port_fdt(const void *blob, int node)
+{
+	struct s3c24x0_i2c_bus *i2c;
+	int bus;
+
+	bus = i2c_get_bus_num_fdt(node);
+	if (bus < 0) {
+		debug("could not get bus for node %d\n", node);
+		return -1;
+	}
+
+	i2c = get_bus(bus);
+	if (!i2c) {
+		debug("get_bus() failed for node node %d\n", node);
+		return -1;
+	}
+
+	i2c_ch_init(i2c->regs, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+
+	return 0;
+}
+#endif
+
 #endif /* CONFIG_HARD_I2C */
diff --git a/drivers/i2c/s3c24x0_i2c.h b/drivers/i2c/s3c24x0_i2c.h
index 2dd4b06..1243bf1 100644
--- a/drivers/i2c/s3c24x0_i2c.h
+++ b/drivers/i2c/s3c24x0_i2c.h
@@ -30,4 +30,12 @@ struct s3c24x0_i2c {
 	u32	iicds;
 	u32	iiclc;
 };
+
+struct s3c24x0_i2c_bus {
+	int node;	/* device tree node */
+	int bus_num;	/* i2c bus number */
+	struct s3c24x0_i2c *regs;
+	enum periph_id id;
+};
+
 #endif /* _S3C24X0_I2C_H */
diff --git a/include/i2c.h b/include/i2c.h
index 16f099d..c60d075 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -262,4 +262,30 @@ extern int get_multi_scl_pin(void);
 extern int get_multi_sda_pin(void);
 extern int multi_i2c_init(void);
 #endif
+
+/**
+ * Get FDT values for i2c bus.
+ *
+ * @param blob  Device tree blbo
+ * @return the number of I2C bus
+ */
+void board_i2c_init(const void *blob);
+
+/**
+ * Find the I2C bus number by given a FDT I2C node.
+ *
+ * @param blob  Device tree blbo
+ * @param node  FDT I2C node to find
+ * @return the number of I2C bus (zero based), or -1 on error
+ */
+int i2c_get_bus_num_fdt(int node);
+
+/**
+ * Reset the I2C bus represented by the given a FDT I2C node.
+ *
+ * @param blob  Device tree blbo
+ * @param node  FDT I2C node to find
+ * @return 0 if port was reset, -1 if not found
+ */
+int i2c_reset_port_fdt(const void *blob, int node);
 #endif	/* _I2C_H_ */

From a0f816b6bbf4c0caad9736ccf0859f4df94cce57 Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:13 +0000
Subject: [PATCH 17/46] SMDK5250: Initialise I2C using FDT

This patch initialises I2C using FDT.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 board/samsung/smdk5250/smdk5250.c | 20 +-------------------
 1 file changed, 1 insertion(+), 19 deletions(-)

diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c
index 268b42c..73c3ec0 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -243,24 +243,6 @@ static int board_uart_init(void)
 	return 0;
 }
 
-#ifdef CONFIG_SYS_I2C_INIT_BOARD
-static int board_i2c_init(void)
-{
-	int i, err;
-
-	for (i = 0; i < CONFIG_MAX_I2C_NUM; i++) {
-		err = exynos_pinmux_config((PERIPH_ID_I2C0 + i),
-						PINMUX_FLAG_NONE);
-		if (err) {
-			debug("I2C%d not configured\n", (PERIPH_ID_I2C0 + i));
-			return err;
-		}
-	}
-	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-	return 0;
-}
-#endif
-
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 int board_early_init_f(void)
 {
@@ -271,7 +253,7 @@ int board_early_init_f(void)
 		return err;
 	}
 #ifdef CONFIG_SYS_I2C_INIT_BOARD
-	err = board_i2c_init();
+	board_i2c_init(gd->fdt_blob);
 #endif
 	return err;
 }

From f0b16191184e3ada6bda5b3c74302f815b719592 Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:14 +0000
Subject: [PATCH 18/46] EXYNOS5: FDT: Add sound device node data

Add sound device node data for exynos

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/dts/exynos5250.dtsi              |  5 +++++
 doc/device-tree-bindings/exynos/sound.txt | 27 +++++++++++++++++++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 doc/device-tree-bindings/exynos/sound.txt

diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 7a50b2e..dc13f29 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -92,4 +92,9 @@
 		reg = <0x12CD0000 0x100>;
 		interrupts = <0 63 0>;
 	};
+
+	sound@12d60000 {
+		compatible = "samsung,exynos-sound";
+		reg = <0x12d60000 0x20>;
+	};
 };
diff --git a/doc/device-tree-bindings/exynos/sound.txt b/doc/device-tree-bindings/exynos/sound.txt
new file mode 100644
index 0000000..98d1798
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/sound.txt
@@ -0,0 +1,27 @@
+Exynos Sound Subsystem
+
+The device node for sound subsytem which contains codec and i2s block
+that is a part of Exynos5250
+
+Required properties :
+ - compatible : Should be "samsung,exynos-sound" for sound
+ - samsung,i2s-epll-clock-frequency : epll clock output frequency in Hz
+ - samsung,i2s-sampling-rate : sampling rate, default is 48000
+ - samsung,i2s-bits-per-sample : sample width, defalut is 16 bit
+ - samsung,i2s-channels : nummber of channels, default is 2
+ - samsung,i2s-lr-clk-framesize : lr clock frame size
+ - samsung,i2s-bit-clk-framesize : bit clock frame size
+ - samsung,codec-type : sound codec type
+
+Example:
+
+sound@12d60000 {
+	compatible = "samsung,exynos-sound"
+	samsung,i2s-epll-clock-frequency = <192000000>;
+	samsung,i2s-sampling-rate = <48000>;
+	samsung,i2s-bits-per-sample = <16>;
+	samsung,i2s-channels = <2>;
+	samsung,i2s-lr-clk-framesize = <256>;
+	samsung,i2s-bit-clk-framesize = <32>;
+	samsung,codec-type = "wm8994";
+};

From d1e8d2cad0be2f624d1d39b85c45eec7252017cd Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:15 +0000
Subject: [PATCH 19/46] EXYNOS5: FDT: Add sound and codec device node

Adds sound and codec device node parameters

Signed-off-by: R. Chandrasekar <rcsekar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 board/samsung/dts/exynos5250-smdk5250.dts | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/board/samsung/dts/exynos5250-smdk5250.dts b/board/samsung/dts/exynos5250-smdk5250.dts
index 0f971c0..14f73d8 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -37,4 +37,21 @@
 			phy-mode = "mii";
 		};
 	};
+
+	sound@12d60000 {
+		samsung,i2s-epll-clock-frequency = <192000000>;
+		samsung,i2s-sampling-rate = <48000>;
+		samsung,i2s-bits-per-sample = <16>;
+		samsung,i2s-channels = <2>;
+		samsung,i2s-lr-clk-framesize = <256>;
+		samsung,i2s-bit-clk-framesize = <32>;
+		samsung,codec-type = "wm8994";
+	};
+
+	i2c@12c70000 {
+		soundcodec@1a {
+			reg = <0x1a>;
+			compatible = "wolfson,wm8994-codec";
+		};
+	};
 };

From 72dbff12a73291fb68d217e534eaed98d69ff5c5 Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:16 +0000
Subject: [PATCH 20/46] EXYNOS5: FDT: Add compatible strings for sound

Add required compatible information for sound driver.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 include/fdtdec.h | 2 ++
 lib/fdtdec.c     | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index 934438c..bb1bc2a 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -73,6 +73,8 @@ enum fdt_compat_id {
 	COMPAT_SMSC_LAN9215,		/* SMSC 10/100 Ethernet LAN9215 */
 	COMPAT_SAMSUNG_EXYNOS5_SROMC,	/* Exynos5 SROMC */
 	COMPAT_SAMSUNG_S3C2440_I2C,	/* Exynos I2C Controller */
+	COMPAT_SAMSUNG_EXYNOS5_SOUND,	/* Exynos Sound */
+	COMPAT_WOLFSON_WM8994_CODEC,	/* Wolfson WM8994 Sound Codec */
 
 	COMPAT_COUNT,
 };
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index b73ed8b..3e159a1 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -48,6 +48,8 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(SMSC_LAN9215, "smsc,lan9215"),
 	COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
 	COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
+	COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
+	COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)

From f482310c6def17ba975a041077f89d984be54b68 Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:17 +0000
Subject: [PATCH 21/46] Sound: Add FDT support to driver

This patch adds FDT support to the sound driver.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 drivers/sound/sound.c | 171 ++++++++++++++++++++++++++++++--------------------
 include/sound.h       |   4 +-
 2 files changed, 104 insertions(+), 71 deletions(-)

diff --git a/drivers/sound/sound.c b/drivers/sound/sound.c
index 4c74534..fa8432d 100644
--- a/drivers/sound/sound.c
+++ b/drivers/sound/sound.c
@@ -24,111 +24,159 @@
 #include <malloc.h>
 #include <common.h>
 #include <asm/io.h>
+#include <libfdt.h>
+#include <fdtdec.h>
 #include <i2c.h>
 #include <i2s.h>
 #include <sound.h>
-#include "wm8994.h"
 #include <asm/arch/sound.h>
+#include "wm8994.h"
 
 /* defines */
 #define SOUND_400_HZ 400
 #define SOUND_BITS_IN_BYTE 8
 
 static struct i2stx_info g_i2stx_pri;
-static struct sound_codec_info g_codec_info;
 
 /*
- * get_sound_fdt_values gets fdt values for i2s parameters
+ * get_sound_i2s_values gets values for i2s parameters
  *
  * @param i2stx_info	i2s transmitter transfer param structure
- * @param blob		FDT blob
- */
-static void get_sound_i2s_values(struct i2stx_info *i2s)
-{
-	i2s->base_address = samsung_get_base_i2s();
-	i2s->audio_pll_clk = I2S_PLL_CLK;
-	i2s->samplingrate = I2S_SAMPLING_RATE;
-	i2s->bitspersample = I2S_BITS_PER_SAMPLE;
-	i2s->channels = I2S_CHANNELS;
-	i2s->rfs = I2S_RFS;
-	i2s->bfs = I2S_BFS;
-}
-
-/*
- * Gets fdt values for wm8994 config parameters
- *
- * @param pcodec_info	codec information structure
- * @param blob		FDT blob
- * @return		int value, 0 for success
+ * @param blob		FDT blob if enabled else NULL
  */
-static int get_sound_wm8994_values(struct sound_codec_info *pcodec_info)
+static int get_sound_i2s_values(struct i2stx_info *i2s, const void *blob)
 {
+#ifdef CONFIG_OF_CONTROL
+	int node;
 	int error = 0;
+	int base;
 
-	switch (AUDIO_COMPAT) {
-	case AUDIO_COMPAT_SPI:
-		debug("%s: Support not added for SPI interface\n", __func__);
+	node = fdtdec_next_compatible(blob, 0,
+					COMPAT_SAMSUNG_EXYNOS5_SOUND);
+	if (node <= 0) {
+		debug("EXYNOS_SOUND: No node for sound in device tree\n");
 		return -1;
-		break;
-	case AUDIO_COMPAT_I2C:
-		pcodec_info->i2c_bus = AUDIO_I2C_BUS;
-		pcodec_info->i2c_dev_addr = AUDIO_I2C_REG;
-		debug("i2c dev addr = %d\n", pcodec_info->i2c_dev_addr);
-		break;
-	default:
-		debug("%s: Unknown compat id %d\n", __func__, AUDIO_COMPAT);
+	}
+
+	/*
+	 * Get the pre-defined sound specific values from FDT.
+	 * All of these are expected to be correct otherwise
+	 * wrong register values in i2s setup parameters
+	 * may result in no sound play.
+	 */
+	base = fdtdec_get_addr(blob, node, "reg");
+	if (base == FDT_ADDR_T_NONE) {
+		debug("%s: Missing  i2s base\n", __func__);
 		return -1;
 	}
+	i2s->base_address = base;
 
+	i2s->audio_pll_clk = fdtdec_get_int(blob,
+				node, "samsung,i2s-epll-clock-frequency", -1);
+	error |= i2s->audio_pll_clk;
+	debug("audio_pll_clk = %d\n", i2s->audio_pll_clk);
+	i2s->samplingrate = fdtdec_get_int(blob,
+				node, "samsung,i2s-sampling-rate", -1);
+	error |= i2s->samplingrate;
+	debug("samplingrate = %d\n", i2s->samplingrate);
+	i2s->bitspersample = fdtdec_get_int(blob,
+				node, "samsung,i2s-bits-per-sample", -1);
+	error |= i2s->bitspersample;
+	debug("bitspersample = %d\n", i2s->bitspersample);
+	i2s->channels = fdtdec_get_int(blob,
+			node, "samsung,i2s-channels", -1);
+	error |= i2s->channels;
+	debug("channels = %d\n", i2s->channels);
+	i2s->rfs = fdtdec_get_int(blob,
+				node, "samsung,i2s-lr-clk-framesize", -1);
+	error |= i2s->rfs;
+	debug("rfs = %d\n", i2s->rfs);
+	i2s->bfs = fdtdec_get_int(blob,
+				node, "samsung,i2s-bit-clk-framesize", -1);
+	error |= i2s->bfs;
+	debug("bfs = %d\n", i2s->bfs);
 	if (error == -1) {
-		debug("fail to get wm8994 codec node properties\n");
+		debug("fail to get sound i2s node properties\n");
 		return -1;
 	}
-
+#else
+	i2s->base_address = samsung_get_base_i2s();
+	i2s->audio_pll_clk = I2S_PLL_CLK;
+	i2s->samplingrate = I2S_SAMPLING_RATE;
+	i2s->bitspersample = I2S_BITS_PER_SAMPLE;
+	i2s->channels = I2S_CHANNELS;
+	i2s->rfs = I2S_RFS;
+	i2s->bfs = I2S_BFS;
+#endif
 	return 0;
 }
 
 /*
- * Gets fdt values for codec config parameters
+ * Init codec
  *
- * @param pcodec_info	codec information structure
- * @param blob		FDT blob
- * @return		int value, 0 for success
+ * @param blob          FDT blob
+ * @param pi2s_tx	i2s parameters required by codec
+ * @return              int value, 0 for success
  */
-static int get_sound_codec_values(struct sound_codec_info *pcodec_info)
+static int codec_init(const void *blob, struct i2stx_info *pi2s_tx)
 {
-	int error = 0;
+	int ret;
 	const char *codectype;
+#ifdef CONFIG_OF_CONTROL
+	int node;
 
-	codectype =  AUDIO_CODEC;
+	/* Get the node from FDT for sound */
+	node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SOUND);
+	if (node <= 0) {
+		debug("EXYNOS_SOUND: No node for sound in device tree\n");
+		debug("node = %d\n", node);
+		return -1;
+	}
 
+	/*
+	 * Get the pre-defined sound codec specific values from FDT.
+	 * All of these are expected to be correct otherwise sound
+	 * can not be played
+	 */
+	codectype = fdt_getprop(blob, node, "samsung,codec-type", NULL);
+	debug("device = %s\n", codectype);
+#else
+	codectype =  AUDIO_CODEC;
+#endif
 	if (!strcmp(codectype, "wm8994")) {
-		pcodec_info->codec_type = CODEC_WM_8994;
-		error = get_sound_wm8994_values(pcodec_info);
+		/* Check the codec type and initialise the same */
+		ret = wm8994_init(blob, WM8994_AIF2,
+			pi2s_tx->samplingrate,
+			(pi2s_tx->samplingrate * (pi2s_tx->rfs)),
+			pi2s_tx->bitspersample, pi2s_tx->channels);
 	} else {
-		error = -1;
+		debug("%s: Unknown code type %s\n", __func__,
+		      codectype);
+		return -1;
 	}
-
-	if (error == -1) {
-		debug("fail to get sound codec node properties\n");
+	if (ret) {
+		debug("%s: Codec init failed\n", __func__);
 		return -1;
 	}
 
 	return 0;
 }
 
-int sound_init(void)
+int sound_init(const void *blob)
 {
 	int ret;
 	struct i2stx_info *pi2s_tx = &g_i2stx_pri;
-	struct sound_codec_info *pcodec_info = &g_codec_info;
 
 	/* Get the I2S Values */
-	get_sound_i2s_values(pi2s_tx);
+	if (get_sound_i2s_values(pi2s_tx, blob) < 0) {
+		debug(" FDT I2S values failed\n");
+		return -1;
+	}
 
-	/* Get the codec Values */
-	if (get_sound_codec_values(pcodec_info) < 0)
+	if (codec_init(blob, pi2s_tx) < 0) {
+		debug(" Codec init failed\n");
 		return -1;
+	}
 
 	ret = i2s_tx_init(pi2s_tx);
 	if (ret) {
@@ -137,21 +185,6 @@ int sound_init(void)
 		return ret;
 	}
 
-	/* Check the codec type and initialise the same */
-	if (pcodec_info->codec_type == CODEC_WM_8994) {
-		ret = wm8994_init(pcodec_info, WM8994_AIF2,
-			pi2s_tx->samplingrate,
-			(pi2s_tx->samplingrate * (pi2s_tx->rfs)),
-			pi2s_tx->bitspersample, pi2s_tx->channels);
-	} else {
-		debug("%s: Unknown code type %d\n", __func__,
-		      pcodec_info->codec_type);
-		return -1;
-	}
-	if (ret) {
-		debug("%s: Codec init failed\n", __func__);
-		return -1;
-	}
 
 	return ret;
 }
diff --git a/include/sound.h b/include/sound.h
index ea0b115..d73839d 100644
--- a/include/sound.h
+++ b/include/sound.h
@@ -46,10 +46,10 @@ struct sound_codec_info {
 
 /*
  * Initialises audio sub system
- *
+ * @param blob	Pointer of device tree node or NULL if none.
  * @return	int value 0 for success, -1 for error
  */
-int sound_init(void);
+int sound_init(const void *blob);
 
 /*
  * plays the pcm data buffer in pcm_data.h through i2s1 to make the

From 6647c7ac8ed6ae8b5bda86df0671aea9ee3bc761 Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:18 +0000
Subject: [PATCH 22/46] Sound: WM8994: Add FDT support to codec

This patch adds FDT support to the codec.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 drivers/sound/wm8994.c | 74 ++++++++++++++++++++++++++++++++++++++++++++++++--
 drivers/sound/wm8994.h |  6 ++--
 2 files changed, 74 insertions(+), 6 deletions(-)

diff --git a/drivers/sound/wm8994.c b/drivers/sound/wm8994.c
index 293903a..3b673b4 100644
--- a/drivers/sound/wm8994.c
+++ b/drivers/sound/wm8994.c
@@ -26,9 +26,11 @@
 #include <asm/io.h>
 #include <common.h>
 #include <div64.h>
+#include <fdtdec.h>
 #include <i2c.h>
 #include <i2s.h>
 #include <sound.h>
+#include <asm/arch/sound.h>
 #include "wm8994.h"
 #include "wm8994_registers.h"
 
@@ -77,6 +79,7 @@ static int bclk_divs[] = {
 
 static struct wm8994_priv g_wm8994_info;
 static unsigned char g_wm8994_i2c_dev_addr;
+static struct sound_codec_info g_codec_info;
 
 /*
  * Initialise I2C for wm 8994
@@ -747,13 +750,80 @@ err:
 	return -1;
 }
 
+/*
+ * Gets fdt values for wm8994 config parameters
+ *
+ * @param pcodec_info	codec information structure
+ * @param blob		FDT blob
+ * @return		int value, 0 for success
+ */
+static int get_codec_values(struct sound_codec_info *pcodec_info,
+			const void *blob)
+{
+	int error = 0;
+#ifdef CONFIG_OF_CONTROL
+	enum fdt_compat_id compat;
+	int node;
+	int parent;
+
+	/* Get the node from FDT for codec */
+	node = fdtdec_next_compatible(blob, 0, COMPAT_WOLFSON_WM8994_CODEC);
+	if (node <= 0) {
+		debug("EXYNOS_SOUND: No node for codec in device tree\n");
+		debug("node = %d\n", node);
+		return -1;
+	}
+
+	parent = fdt_parent_offset(blob, node);
+	if (parent < 0) {
+		debug("%s: Cannot find node parent\n", __func__);
+		return -1;
+	}
+
+	compat = fdtdec_lookup(blob, parent);
+	switch (compat) {
+	case COMPAT_SAMSUNG_S3C2440_I2C:
+		pcodec_info->i2c_bus = i2c_get_bus_num_fdt(parent);
+		error |= pcodec_info->i2c_bus;
+		debug("i2c bus = %d\n", pcodec_info->i2c_bus);
+		pcodec_info->i2c_dev_addr = fdtdec_get_int(blob, node,
+							"reg", 0);
+		error |= pcodec_info->i2c_dev_addr;
+		debug("i2c dev addr = %d\n", pcodec_info->i2c_dev_addr);
+		break;
+	default:
+		debug("%s: Unknown compat id %d\n", __func__, compat);
+		return -1;
+	}
+#else
+	pcodec_info->i2c_bus = AUDIO_I2C_BUS;
+	pcodec_info->i2c_dev_addr = AUDIO_I2C_REG;
+	debug("i2c dev addr = %d\n", pcodec_info->i2c_dev_addr);
+#endif
+
+	pcodec_info->codec_type = CODEC_WM_8994;
+
+	if (error == -1) {
+		debug("fail to get wm8994 codec node properties\n");
+		return -1;
+	}
+
+	return 0;
+}
+
 /*wm8994 Device Initialisation */
-int wm8994_init(struct sound_codec_info *pcodec_info,
-			enum en_audio_interface aif_id,
+int wm8994_init(const void *blob, enum en_audio_interface aif_id,
 			int sampling_rate, int mclk_freq,
 			int bits_per_sample, unsigned int channels)
 {
 	int ret = 0;
+	struct sound_codec_info *pcodec_info = &g_codec_info;
+
+	/* Get the codec Values */
+	if (get_codec_values(pcodec_info, blob) < 0) {
+		debug("FDT Codec values failed\n");
+		return -1;
+	}
 
 	/* shift the device address by 1 for 7 bit addressing */
 	g_wm8994_i2c_dev_addr = pcodec_info->i2c_dev_addr;
diff --git a/drivers/sound/wm8994.h b/drivers/sound/wm8994.h
index a8f0de1..a1e8335 100644
--- a/drivers/sound/wm8994.h
+++ b/drivers/sound/wm8994.h
@@ -69,8 +69,7 @@ enum wm8994_type {
 /*
  * intialise wm8994 sound codec device for the given configuration
  *
- * @param pcodec_info		pointer value of the sound codec info structure
- *				parsed from device tree
+ * @param blob			FDT node for codec values
  * @param aif_id		enum value of codec interface port in which
  *				soc i2s is connected
  * @param sampling_rate		Sampling rate ranges between from 8khz to 96khz
@@ -80,8 +79,7 @@ enum wm8994_type {
  *
  * @returns -1 for error  and 0  Success.
  */
-int wm8994_init(struct sound_codec_info *pcodec_info,
-			enum en_audio_interface aif_id,
+int wm8994_init(const void *blob, enum en_audio_interface aif_id,
 			int sampling_rate, int mclk_freq,
 			int bits_per_sample, unsigned int channels);
 #endif /*__WM8994_H__ */

From 2b8a0533449c8c868636def683c04282a89a85cb Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:19 +0000
Subject: [PATCH 23/46] Sound: Add FDT support to CMD.

This patch adds FDT support to sound init in CMD.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 common/cmd_sound.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/cmd_sound.c b/common/cmd_sound.c
index 459d1eb..cfca9dd 100644
--- a/common/cmd_sound.c
+++ b/common/cmd_sound.c
@@ -33,7 +33,7 @@ static int do_init(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 {
 	int ret;
 
-	ret = sound_init();
+	ret = sound_init(gd->fdt_blob);
 	if (ret) {
 		printf("Initialise Audio driver failed\n");
 		return CMD_RET_FAILURE;

From 5d50659dbfb9407eaac51c19a9984027a11c10b7 Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:20 +0000
Subject: [PATCH 24/46] EXYNOS5: FDT: Add compatible strings for SPI

Add required compatible information for SPI driver.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 include/fdtdec.h | 1 +
 lib/fdtdec.c     | 1 +
 2 files changed, 2 insertions(+)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index bb1bc2a..ce10bf4 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -75,6 +75,7 @@ enum fdt_compat_id {
 	COMPAT_SAMSUNG_S3C2440_I2C,	/* Exynos I2C Controller */
 	COMPAT_SAMSUNG_EXYNOS5_SOUND,	/* Exynos Sound */
 	COMPAT_WOLFSON_WM8994_CODEC,	/* Wolfson WM8994 Sound Codec */
+	COMPAT_SAMSUNG_EXYNOS_SPI,	/* Exynos SPI */
 
 	COMPAT_COUNT,
 };
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 3e159a1..aa75710 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -50,6 +50,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
 	COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
 	COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
+	COMPAT(SAMSUNG_EXYNOS_SPI, "samsung,exynos-spi"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)

From 2f26975df50ab661cef574dfac29b109a20ac26a Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:21 +0000
Subject: [PATCH 25/46] EXYNOS5 : FDT: Add Aliases for SPI device

This patch adds aliases for SPI.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 board/samsung/dts/exynos5250-smdk5250.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/board/samsung/dts/exynos5250-smdk5250.dts b/board/samsung/dts/exynos5250-smdk5250.dts
index 14f73d8..a8e62da 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -25,6 +25,11 @@
 		i2c5 = "/i2c@12cb0000";
 		i2c6 = "/i2c@12cc0000";
 		i2c7 = "/i2c@12cd0000";
+		spi0 = "/spi@12d20000";
+		spi1 = "/spi@12d30000";
+		spi2 = "/spi@12d40000";
+		spi3 = "/spi@131a0000";
+		spi4 = "/spi@131b0000";
 	};
 
 	sromc@12250000 {

From cb9b23cda9f03fcb179ba5ba23f5fd44bb9b7d7c Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:22 +0000
Subject: [PATCH 26/46] EXYNOS5: FDT: Add SPI device node data

Add SPI device node data for exynos.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/dts/exynos5250.dtsi                | 41 +++++++++++++++++++++++++++++
 doc/device-tree-bindings/exynos/isp-spi.txt | 22 ++++++++++++++++
 2 files changed, 63 insertions(+)
 create mode 100644 doc/device-tree-bindings/exynos/isp-spi.txt

diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index dc13f29..1008797 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -97,4 +97,45 @@
 		compatible = "samsung,exynos-sound";
 		reg = <0x12d60000 0x20>;
 	};
+
+	spi@12d20000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos-spi";
+		reg = <0x12d20000 0x30>;
+		interrupts = <0 68 0>;
+	};
+
+	spi@12d30000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos-spi";
+		reg = <0x12d30000 0x30>;
+		interrupts = <0 69 0>;
+	};
+
+	spi@12d40000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos-spi";
+		reg = <0x12d40000 0x30>;
+		clock-frequency = <50000000>;
+		interrupts = <0 70 0>;
+        };
+
+	spi@131a0000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos-spi";
+		reg = <0x131a0000 0x30>;
+		interrupts = <0 129 0>;
+	};
+
+	spi@131b0000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos-spi";
+		reg = <0x131b0000 0x30>;
+		interrupts = <0 130 0>;
+	};
 };
diff --git a/doc/device-tree-bindings/exynos/isp-spi.txt b/doc/device-tree-bindings/exynos/isp-spi.txt
new file mode 100644
index 0000000..b8086e8
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/isp-spi.txt
@@ -0,0 +1,22 @@
+Exynos ISP SPI Subsystem
+
+The device node for ISP SPI subsytem.
+Since Peripheral id in EXYNOS is decoded based on Interrupts, currently
+ISP SPI have no individual interrupts hence we add ad dummy interrupt node
+which will have a value beyond the maximum number of interrupts exynos5 can
+support.
+
+Required properties :
+ - compatible : Should be "samsung,exynos-spi" for spi.
+ - reg : Base adrress of the the subsystem.
+ - interrupts : A value which is beyond the maximum number of interrupts
+exynos5 can support.
+
+Example:
+spi@131a0000 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	compatible = "samsung,exynos-spi";
+	reg = <0x131a0000 0x30>;
+	interrupts = <0 129 0>;
+};

From 4d3acb9df35787e50cc6ea4be10d45352c99657c Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Wed, 26 Dec 2012 20:03:23 +0000
Subject: [PATCH 27/46] SPI: EXYNOS: Add FDT support to driver.

This patch adds FDT support to the SPI driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 drivers/spi/exynos_spi.c | 96 +++++++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 90 insertions(+), 6 deletions(-)

diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c
index 3e6c18f..be60ada 100644
--- a/drivers/spi/exynos_spi.c
+++ b/drivers/spi/exynos_spi.c
@@ -20,6 +20,7 @@
 #include <common.h>
 #include <malloc.h>
 #include <spi.h>
+#include <fdtdec.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cpu.h>
@@ -28,16 +29,20 @@
 #include <asm/arch-exynos/spi.h>
 #include <asm/io.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* Information about each SPI controller */
 struct spi_bus {
 	enum periph_id periph_id;
 	s32 frequency;		/* Default clock frequency, -1 for none */
 	struct exynos_spi *regs;
 	int inited;		/* 1 if this bus is ready for use */
+	int node;
 };
 
 /* A list of spi buses that we know about */
 static struct spi_bus spi_bus[EXYNOS5_SPI_NUM_CONTROLLERS];
+static unsigned int bus_count;
 
 struct exynos_spi_slave {
 	struct spi_slave slave;
@@ -50,7 +55,7 @@ struct exynos_spi_slave {
 
 static struct spi_bus *spi_get_bus(unsigned dev_index)
 {
-	if (dev_index < EXYNOS5_SPI_NUM_CONTROLLERS)
+	if (dev_index < bus_count)
 		return &spi_bus[dev_index];
 	debug("%s: invalid bus %d", __func__, dev_index);
 
@@ -347,21 +352,100 @@ static inline struct exynos_spi *get_spi_base(int dev_index)
 					(dev_index - 3);
 }
 
+/*
+ * Read the SPI config from the device tree node.
+ *
+ * @param blob  FDT blob to read from
+ * @param node  Node offset to read from
+ * @param bus   SPI bus structure to fill with information
+ * @return 0 if ok, or -FDT_ERR_NOTFOUND if something was missing
+ */
+static int spi_get_config(const void *blob, int node, struct spi_bus *bus)
+{
+	bus->node = node;
+	bus->regs = (struct exynos_spi *)fdtdec_get_addr(blob, node, "reg");
+	bus->periph_id = pinmux_decode_periph_id(blob, node);
+
+	if (bus->periph_id == PERIPH_ID_NONE) {
+		debug("%s: Invalid peripheral ID %d\n", __func__,
+			bus->periph_id);
+		return -FDT_ERR_NOTFOUND;
+	}
+
+	/* Use 500KHz as a suitable default */
+	bus->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
+					500000);
+
+	return 0;
+}
+
+/*
+ * Process a list of nodes, adding them to our list of SPI ports.
+ *
+ * @param blob          fdt blob
+ * @param node_list     list of nodes to process (any <=0 are ignored)
+ * @param count         number of nodes to process
+ * @param is_dvc        1 if these are DVC ports, 0 if standard I2C
+ * @return 0 if ok, -1 on error
+ */
+static int process_nodes(const void *blob, int node_list[], int count)
+{
+	int i;
+
+	/* build the i2c_controllers[] for each controller */
+	for (i = 0; i < count; i++) {
+		int node = node_list[i];
+		struct spi_bus *bus;
+
+		if (node <= 0)
+			continue;
+
+		bus = &spi_bus[i];
+		if (spi_get_config(blob, node, bus)) {
+			printf("exynos spi_init: failed to decode bus %d\n",
+				i);
+			return -1;
+		}
+
+		debug("spi: controller bus %d at %p, periph_id %d\n",
+		      i, bus->regs, bus->periph_id);
+		bus->inited = 1;
+		bus_count++;
+	}
+
+	return 0;
+}
+
 /* Sadly there is no error return from this function */
 void spi_init(void)
 {
-	int i;
+	int count;
+
+#ifdef CONFIG_OF_CONTROL
+	int node_list[EXYNOS5_SPI_NUM_CONTROLLERS];
+	const void *blob = gd->fdt_blob;
+
+	count = fdtdec_find_aliases_for_id(blob, "spi",
+			COMPAT_SAMSUNG_EXYNOS_SPI, node_list,
+			EXYNOS5_SPI_NUM_CONTROLLERS);
+	if (process_nodes(blob, node_list, count))
+		return;
+
+#else
 	struct spi_bus *bus;
 
-	for (i = 0; i < EXYNOS5_SPI_NUM_CONTROLLERS; i++) {
-		bus = &spi_bus[i];
-		bus->regs = get_spi_base(i);
-		bus->periph_id = PERIPH_ID_SPI0 + i;
+	for (count = 0; count < EXYNOS5_SPI_NUM_CONTROLLERS; count++) {
+		bus = &spi_bus[count];
+		bus->regs = get_spi_base(count);
+		bus->periph_id = PERIPH_ID_SPI0 + count;
 
 		/* Although Exynos5 supports upto 50Mhz speed,
 		 * we are setting it to 10Mhz for safe side
 		 */
 		bus->frequency = 10000000;
 		bus->inited = 1;
+		bus->node = 0;
+		bus_count = EXYNOS5_SPI_NUM_CONTROLLERS;
 	}
+#endif
 }

From e18bf1f9f2d2afa688e30e3f73d52de6a5edf4c1 Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Mon, 7 Jan 2013 23:35:03 +0000
Subject: [PATCH 28/46] EHCI: Exynos: Add fdt support

Adding fdt support to ehci-exynos in order to parse
register base addresses from the device node.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 drivers/usb/host/ehci-exynos.c | 92 ++++++++++++++++++++++++++++++++++++++----
 1 file changed, 85 insertions(+), 7 deletions(-)

diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index 9f0ed06..3ca4c5c 100644
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -21,13 +21,71 @@
  */
 
 #include <common.h>
+#include <fdtdec.h>
+#include <libfdt.h>
+#include <malloc.h>
 #include <usb.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/ehci.h>
 #include <asm/arch/system.h>
 #include <asm/arch/power.h>
+#include <asm-generic/errno.h>
+#include <linux/compat.h>
 #include "ehci.h"
 
+/* Declare global data pointer */
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * Contains pointers to register base addresses
+ * for the usb controller.
+ */
+struct exynos_ehci {
+	struct exynos_usb_phy *usb;
+	unsigned int *hcd;
+};
+
+static int exynos_usb_parse_dt(const void *blob, struct exynos_ehci *exynos)
+{
+	unsigned int node;
+	int depth;
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS_EHCI);
+	if (node <= 0) {
+		debug("EHCI: Can't get device node for ehci\n");
+		return -ENODEV;
+	}
+
+	/*
+	 * Get the base address for EHCI controller from the device node
+	 */
+	exynos->hcd = (unsigned int *)fdtdec_get_addr(blob, node, "reg");
+	if (exynos->hcd == NULL) {
+		debug("Can't get the EHCI register address\n");
+		return -ENXIO;
+	}
+
+	depth = 0;
+	node = fdtdec_next_compatible_subnode(blob, node,
+					COMPAT_SAMSUNG_EXYNOS_USB_PHY, &depth);
+	if (node <= 0) {
+		debug("EHCI: Can't get device node for usb-phy controller\n");
+		return -ENODEV;
+	}
+
+	/*
+	 * Get the base address for usbphy from the device node
+	 */
+	exynos->usb = (struct exynos_usb_phy *)fdtdec_get_addr(blob, node,
+								"reg");
+	if (exynos->usb == NULL) {
+		debug("Can't get the usbphy register address\n");
+		return -ENXIO;
+	}
+
+	return 0;
+}
+
 /* Setup the EHCI host controller. */
 static void setup_usb_phy(struct exynos_usb_phy *usb)
 {
@@ -86,12 +144,20 @@ static void reset_usb_phy(struct exynos_usb_phy *usb)
  */
 int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 {
-	struct exynos_usb_phy *usb;
+	struct exynos_ehci *exynos = NULL;
+
+	exynos = (struct exynos_ehci *)
+			kzalloc(sizeof(struct exynos_ehci), GFP_KERNEL);
+	if (!exynos) {
+		debug("failed to allocate exynos ehci context\n");
+		return -ENOMEM;
+	}
 
-	usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy();
-	setup_usb_phy(usb);
+	exynos_usb_parse_dt(gd->fdt_blob, exynos);
 
-	*hccr = (struct ehci_hccr *)samsung_get_base_usb_ehci();
+	setup_usb_phy(exynos->usb);
+
+	*hccr = (struct ehci_hccr *)(exynos->hcd);
 	*hcor = (struct ehci_hcor *)((uint32_t) *hccr
 				+ HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
 
@@ -99,6 +165,8 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 		(uint32_t)*hccr, (uint32_t)*hcor,
 		(uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
 
+	kfree(exynos);
+
 	return 0;
 }
 
@@ -108,10 +176,20 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
  */
 int ehci_hcd_stop(int index)
 {
-	struct exynos_usb_phy *usb;
+	struct exynos_ehci *exynos = NULL;
+
+	exynos = (struct exynos_ehci *)
+			kzalloc(sizeof(struct exynos_ehci), GFP_KERNEL);
+	if (!exynos) {
+		debug("failed to allocate exynos ehci context\n");
+		return -ENOMEM;
+	}
+
+	exynos_usb_parse_dt(gd->fdt_blob, exynos);
+
+	reset_usb_phy(exynos->usb);
 
-	usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy();
-	reset_usb_phy(usb);
+	kfree(exynos);
 
 	return 0;
 }

From 69c6f976a13cf787815bab52cfffa69792fecfa9 Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Mon, 7 Jan 2013 23:35:04 +0000
Subject: [PATCH 29/46] EXYNOS5: Add device node for USB.

This patch adds the device node required for USB

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/dts/exynos5250.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 1008797..ed8c8dd 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -138,4 +138,17 @@
 		reg = <0x131b0000 0x30>;
 		interrupts = <0 130 0>;
 	};
+
+	ehci@12110000 {
+		compatible = "samsung,exynos-ehci";
+		reg = <0x12110000 0x100>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		phy {
+			compatible = "samsung,exynos-usb-phy";
+			reg = <0x12130000 0x100>;
+		};
+	};
+
 };

From 6abd1620beeb96f64c85f4fac8336fcb523b912e Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Mon, 7 Jan 2013 23:35:05 +0000
Subject: [PATCH 30/46] EXYNOS5: FDT: Add compatible strings for USB

Add required compatible information for USB

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 include/fdtdec.h | 2 ++
 lib/fdtdec.c     | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index ce10bf4..0d3417b 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -76,6 +76,8 @@ enum fdt_compat_id {
 	COMPAT_SAMSUNG_EXYNOS5_SOUND,	/* Exynos Sound */
 	COMPAT_WOLFSON_WM8994_CODEC,	/* Wolfson WM8994 Sound Codec */
 	COMPAT_SAMSUNG_EXYNOS_SPI,	/* Exynos SPI */
+	COMPAT_SAMSUNG_EXYNOS_EHCI,	/* Exynos EHCI controller */
+	COMPAT_SAMSUNG_EXYNOS_USB_PHY,	/* Exynos phy controller for usb2.0 */
 
 	COMPAT_COUNT,
 };
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index aa75710..4416670 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -51,6 +51,8 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
 	COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
 	COMPAT(SAMSUNG_EXYNOS_SPI, "samsung,exynos-spi"),
+	COMPAT(SAMSUNG_EXYNOS_EHCI, "samsung,exynos-ehci"),
+	COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)

From 9a0c4f9b870da77b1768470bc37d12251e0a438e Mon Sep 17 00:00:00 2001
From: Vivek Gautam <gautam.vivek@samsung.com>
Date: Mon, 7 Jan 2013 23:37:18 +0000
Subject: [PATCH 31/46] SMDK5250: Enable VBus for USB 2.0 controller

This patch enables Vbus required for USB 2.0 controller.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 board/samsung/smdk5250/smdk5250.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c
index 73c3ec0..d80f75d 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -35,12 +35,31 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_USB_EHCI_EXYNOS
+int board_usb_vbus_init(void)
+{
+	struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *)
+						samsung_get_base_gpio_part1();
+
+	/* Enable VBUS power switch */
+	s5p_gpio_direction_output(&gpio1->x2, 6, 1);
+
+	/* VBUS turn ON time */
+	mdelay(3);
+
+	return 0;
+}
+#endif
+
 int board_init(void)
 {
 	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
 #ifdef CONFIG_EXYNOS_SPI
 	spi_init();
 #endif
+#ifdef CONFIG_USB_EHCI_EXYNOS
+	board_usb_vbus_init();
+#endif
 	return 0;
 }
 

From c6d647e3094b4123c9c6e27765221762753f00be Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C5=81ukasz=20Majewski?= <l.majewski@samsung.com>
Date: Tue, 8 Jan 2013 03:48:40 +0000
Subject: [PATCH 32/46] video:cache:fix: Enable dcache flush at LCD subsystem
 for Exynos based boards

lcd_set_flush_dcache(1) function is called from exynos_fb.c configuration file
to enable lcd_sync function.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 drivers/video/exynos_fb.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index d9a3f9a..aac74a3 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -63,6 +63,9 @@ static void exynos_lcd_init_mem(void *lcdbase, vidinfo_t *vid)
 static void exynos_lcd_init(vidinfo_t *vid)
 {
 	exynos_fimd_lcd_init(vid);
+
+	/* Enable flushing after LCD writes if requested */
+	lcd_set_flush_dcache(1);
 }
 
 static void draw_logo(void)

From cd577e2b58a9d6c1655f2ffbad4a39eec505f357 Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Tue, 8 Jan 2013 21:03:38 +0000
Subject: [PATCH 33/46] EXYNOS5: FDT: Add compatible strings for PMIC

Add required compatible information for PMIC

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 include/fdtdec.h | 1 +
 lib/fdtdec.c     | 1 +
 2 files changed, 2 insertions(+)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index 0d3417b..f77d195 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -78,6 +78,7 @@ enum fdt_compat_id {
 	COMPAT_SAMSUNG_EXYNOS_SPI,	/* Exynos SPI */
 	COMPAT_SAMSUNG_EXYNOS_EHCI,	/* Exynos EHCI controller */
 	COMPAT_SAMSUNG_EXYNOS_USB_PHY,	/* Exynos phy controller for usb2.0 */
+	COMPAT_MAXIM_MAX77686_PMIC,	/* MAX77686 PMIC */
 
 	COMPAT_COUNT,
 };
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 4416670..16921e1 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -53,6 +53,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(SAMSUNG_EXYNOS_SPI, "samsung,exynos-spi"),
 	COMPAT(SAMSUNG_EXYNOS_EHCI, "samsung,exynos-ehci"),
 	COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
+	COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686_pmic"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)

From e00be0d30b40e83056de1e1bef245484d7d5b93e Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Tue, 8 Jan 2013 21:03:39 +0000
Subject: [PATCH 34/46] EXYNOS5: Add device node for PMIC

Add device node for MAX77686

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 board/samsung/dts/exynos5250-smdk5250.dts | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/board/samsung/dts/exynos5250-smdk5250.dts b/board/samsung/dts/exynos5250-smdk5250.dts
index a8e62da..cbfab6f 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -59,4 +59,11 @@
 			compatible = "wolfson,wm8994-codec";
 		};
 	};
+
+	i2c@12c60000 {
+		pmic@9 {
+			reg = <0x9>;
+			compatible = "maxim,max77686_pmic";
+		};
+	};
 };

From 4050f0700f1822e6cb0095128192c15be5e750ee Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Tue, 8 Jan 2013 21:03:40 +0000
Subject: [PATCH 35/46] PMIC: MAX77686: Add FDT Support

This patch adds fdt support to MAX77686.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 drivers/power/pmic/pmic_max77686.c | 37 ++++++++++++++++++++++++++++++++++---
 1 file changed, 34 insertions(+), 3 deletions(-)

diff --git a/drivers/power/pmic/pmic_max77686.c b/drivers/power/pmic/pmic_max77686.c
index fce0183..7fcb4c0 100644
--- a/drivers/power/pmic/pmic_max77686.c
+++ b/drivers/power/pmic/pmic_max77686.c
@@ -22,10 +22,14 @@
  */
 
 #include <common.h>
+#include <fdtdec.h>
+#include <i2c.h>
 #include <power/pmic.h>
 #include <power/max77686_pmic.h>
 #include <errno.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int pmic_init(unsigned char bus)
 {
 	static const char name[] = "MAX77686_PMIC";
@@ -36,13 +40,40 @@ int pmic_init(unsigned char bus)
 		return -ENOMEM;
 	}
 
-	puts("Board PMIC init\n");
+#ifdef CONFIG_OF_CONTROL
+	const void *blob = gd->fdt_blob;
+	int node, parent;
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_MAXIM_MAX77686_PMIC);
+	if (node < 0) {
+		debug("PMIC: No node for PMIC Chip in device tree\n");
+		debug("node = %d\n", node);
+		return -1;
+	}
+
+	parent = fdt_parent_offset(blob, node);
+	if (parent < 0) {
+		debug("%s: Cannot find node parent\n", __func__);
+		return -1;
+	}
+
+	p->bus = i2c_get_bus_num_fdt(parent);
+	if (p->bus < 0) {
+		debug("%s: Cannot find I2C bus\n", __func__);
+		return -1;
+	}
+	p->hw.i2c.addr = fdtdec_get_int(blob, node, "reg", 9);
+#else
+	p->bus = bus;
+	p->hw.i2c.addr = MAX77686_I2C_ADDR;
+#endif
+
 	p->name = name;
 	p->interface = PMIC_I2C;
 	p->number_of_regs = PMIC_NUM_OF_REGS;
-	p->hw.i2c.addr = MAX77686_I2C_ADDR;
 	p->hw.i2c.tx_num = 1;
-	p->bus = bus;
+
+	puts("Board PMIC init\n");
 
 	return 0;
 }

From 9b572852c0547365b186651d27b3df5dcbe82be2 Mon Sep 17 00:00:00 2001
From: Ajay Kumar <ajaykumar.rs@samsung.com>
Date: Tue, 8 Jan 2013 20:42:26 +0000
Subject: [PATCH 36/46] EXYNOS5: Add support for FIMD and DP

Add panel_info structure required by LCD driver
and DP panel platdata for SMDK5250.
Add GPIO configuration for LCD.
Enable FIMD and DP support on SMDK5250.
DP Panel size: 2560x1600.
We use 16BPP resolution to get LCD console.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chomium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/include/asm/arch-exynos/dp_info.h |  2 +
 board/samsung/smdk5250/smdk5250.c          | 97 ++++++++++++++++++++++++++++++
 include/configs/exynos5250-dt.h            |  8 +++
 3 files changed, 107 insertions(+)

diff --git a/arch/arm/include/asm/arch-exynos/dp_info.h b/arch/arm/include/asm/arch-exynos/dp_info.h
index 3569498..102b709 100644
--- a/arch/arm/include/asm/arch-exynos/dp_info.h
+++ b/arch/arm/include/asm/arch-exynos/dp_info.h
@@ -211,4 +211,6 @@ unsigned int exynos_init_dp(void)
 }
 #endif
 
+void exynos_set_dp_platform_data(struct exynos_dp_platform_data *pd);
+
 #endif /* _DP_INFO_H */
diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c
index d80f75d..9c4bf9b 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -24,13 +24,16 @@
 #include <fdtdec.h>
 #include <asm/io.h>
 #include <i2c.h>
+#include <lcd.h>
 #include <netdev.h>
 #include <spi.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/pinmux.h>
+#include <asm/arch/power.h>
 #include <asm/arch/sromc.h>
+#include <asm/arch/dp_info.h>
 #include <power/pmic.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -277,3 +280,97 @@ int board_early_init_f(void)
 	return err;
 }
 #endif
+
+void cfg_lcd_gpio(void)
+{
+	struct exynos5_gpio_part1 *gpio1 =
+		(struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+
+	/* For Backlight */
+	s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT);
+	s5p_gpio_set_value(&gpio1->b2, 0, 1);
+
+	/* LCD power on */
+	s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT);
+	s5p_gpio_set_value(&gpio1->x1, 5, 1);
+
+	/* Set Hotplug detect for DP */
+	s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3));
+}
+
+vidinfo_t panel_info = {
+	.vl_freq	= 60,
+	.vl_col		= 2560,
+	.vl_row		= 1600,
+	.vl_width	= 2560,
+	.vl_height	= 1600,
+	.vl_clkp	= CONFIG_SYS_LOW,
+	.vl_hsp		= CONFIG_SYS_LOW,
+	.vl_vsp		= CONFIG_SYS_LOW,
+	.vl_dp		= CONFIG_SYS_LOW,
+	.vl_bpix	= 4,	/* LCD_BPP = 2^4, for output conosle on LCD */
+
+	/* wDP panel timing infomation */
+	.vl_hspw	= 32,
+	.vl_hbpd	= 80,
+	.vl_hfpd	= 48,
+
+	.vl_vspw	= 6,
+	.vl_vbpd	= 37,
+	.vl_vfpd	= 3,
+	.vl_cmd_allow_len = 0xf,
+
+	.win_id		= 3,
+	.cfg_gpio	= cfg_lcd_gpio,
+	.backlight_on	= NULL,
+	.lcd_power_on	= NULL,
+	.reset_lcd	= NULL,
+	.dual_lcd_enabled = 0,
+
+	.init_delay	= 0,
+	.power_on_delay = 0,
+	.reset_delay	= 0,
+	.interface_mode = FIMD_RGB_INTERFACE,
+	.dp_enabled	= 1,
+};
+
+static struct edp_device_info edp_info = {
+	.disp_info = {
+		.h_res = 2560,
+		.h_sync_width = 32,
+		.h_back_porch = 80,
+		.h_front_porch = 48,
+		.v_res = 1600,
+		.v_sync_width  = 6,
+		.v_back_porch = 37,
+		.v_front_porch = 3,
+		.v_sync_rate = 60,
+	},
+	.lt_info = {
+		.lt_status = DP_LT_NONE,
+	},
+	.video_info = {
+		.master_mode = 0,
+		.bist_mode = DP_DISABLE,
+		.bist_pattern = NO_PATTERN,
+		.h_sync_polarity = 0,
+		.v_sync_polarity = 0,
+		.interlaced = 0,
+		.color_space = COLOR_RGB,
+		.dynamic_range = VESA,
+		.ycbcr_coeff = COLOR_YCBCR601,
+		.color_depth = COLOR_8,
+	},
+};
+
+static struct exynos_dp_platform_data dp_platform_data = {
+	.phy_enable	= set_dp_phy_ctrl,
+	.edp_dev_info	= &edp_info,
+};
+
+void init_panel_info(vidinfo_t *vid)
+{
+	vid->rgb_mode   = MODE_RGB_P,
+
+	exynos_set_dp_platform_data(&dp_platform_data);
+}
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 59182f4..07bca1d 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -297,4 +297,12 @@
 #define CONFIG_SHA1
 #define CONFIG_SHA256
 
+/* Display */
+#define CONFIG_LCD
+#define CONFIG_EXYNOS_FB
+#define CONFIG_EXYNOS_DP
+#define LCD_XRES			2560
+#define LCD_YRES			1600
+#define LCD_BPP			LCD_COLOR16
+
 #endif	/* __CONFIG_H */

From 1673f199d917e0649098e0cb7ef5b375b96bd6cb Mon Sep 17 00:00:00 2001
From: Ajay Kumar <ajaykumar.rs@samsung.com>
Date: Tue, 8 Jan 2013 20:42:23 +0000
Subject: [PATCH 37/46] EXYNOS5: Change parent clock of FIMD to MPLL

With VPLL as source clock to FIMD,
Exynos DP Initializaton was failing sometimes with unstable clock.
Changing FIMD source to MPLL resolves this issue.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/cpu/armv7/exynos/clock.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c
index ae6d7fe..abc3272 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -741,7 +741,7 @@ void exynos5_set_lcd_clk(void)
 	 */
 	cfg = readl(&clk->src_disp1_0);
 	cfg &= ~(0xf);
-	cfg |= 0x8;
+	cfg |= 0x6;
 	writel(cfg, &clk->src_disp1_0);
 
 	/*

From 7b4bd121b6a6aae0b0afd5540e2459187e9ec5ec Mon Sep 17 00:00:00 2001
From: Ajay Kumar <ajaykumar.rs@samsung.com>
Date: Tue, 8 Jan 2013 20:42:24 +0000
Subject: [PATCH 38/46] EXYNOS: Add dummy definition to fix compilation
 dependency on CONFIG_EXYNOS_MIPI_DSIM

When only DP is used, we need not enable CONFIG_EXYNOS_MIPI_DSIM.
But if we do not select CONFIG_EXYNOS_MIPI_DSIM, exynos_fb.c throws
error saying exynos_mipi_dsi_init() not defined. So, we add
dummy definition for exynos_mipi_dsi_init when CONFIG_EXYNOS_MIPI_DSIM
is not defined.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/include/asm/arch-exynos/mipi_dsim.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/include/asm/arch-exynos/mipi_dsim.h b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
index 9a7cbeb..c1c9a35 100644
--- a/arch/arm/include/asm/arch-exynos/mipi_dsim.h
+++ b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
@@ -358,7 +358,14 @@ struct mipi_dsim_lcd_driver {
 	void	(*mipi_display_on)(struct mipi_dsim_device *dsim_dev);
 };
 
+#ifdef CONFIG_EXYNOS_MIPI_DSIM
 int exynos_mipi_dsi_init(void);
+#else
+static inline int exynos_mipi_dsi_init(void)
+{
+	return 0;
+}
+#endif
 
 /*
  * register mipi_dsim_lcd_driver object defined by lcd panel driver

From 61b59e2749451d86e73139a81f9f8995e2f4a932 Mon Sep 17 00:00:00 2001
From: Ajay Kumar <ajaykumar.rs@samsung.com>
Date: Tue, 8 Jan 2013 20:42:25 +0000
Subject: [PATCH 39/46] video: Modify exynos_fimd driver to support LCD console

Currently, exynos FIMD driver is being used to support only TIZEN LOGOs.
In order to get LCD console, we need to enable half word swap feature
of FIMD and use 16 BPP.
LCD console and proprietary Logo cannot be used simultaneously.
We use "logo_on" field inside vidinfo_t structure to decide whether
user wants Logo or Console.
Define CONFIG_CMD_BMP and make logo_on = 1 to get Logo on screen.
Use logo_on = 0 to get output console on LCD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 drivers/video/exynos_fb.c   |  2 ++
 drivers/video/exynos_fimd.c | 12 ++++++++----
 2 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index aac74a3..183bca0 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -88,7 +88,9 @@ static void draw_logo(void)
 	}
 
 	addr = panel_info.logo_addr;
+#ifdef CONFIG_CMD_BMP
 	bmp_display(addr, x, y);
+#endif
 }
 
 static void lcd_panel_on(vidinfo_t *vid)
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index 06eae2e..2efe6a6 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -88,14 +88,18 @@ static void exynos_fimd_set_par(unsigned int win_id)
 	/* DATAPATH is DMA */
 	cfg |= EXYNOS_WINCON_DATAPATH_DMA;
 
-	/* bpp is 32 */
-	cfg |= EXYNOS_WINCON_WSWP_ENABLE;
+	if (pvid->logo_on) /* To get proprietary LOGO */
+		cfg |= EXYNOS_WINCON_WSWP_ENABLE;
+	else /* To get output console on LCD */
+		cfg |= EXYNOS_WINCON_HAWSWP_ENABLE;
 
 	/* dma burst is 16 */
 	cfg |= EXYNOS_WINCON_BURSTLEN_16WORD;
 
-	/* pixel format is unpacked RGB888 */
-	cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888;
+	if (pvid->logo_on) /* To get proprietary LOGO */
+		cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888;
+	else /* To get output console on LCD */
+		cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565;
 
 	writel(cfg, (unsigned int)&fimd_ctrl->wincon0 +
 			EXYNOS_WINCON(win_id));

From c39e969e8e30800d3bf3b50f51997026aef0f01d Mon Sep 17 00:00:00 2001
From: Jaehoon Chung <jh80.chung@samsung.com>
Date: Thu, 27 Dec 2012 22:30:32 +0000
Subject: [PATCH 40/46] Exynos: clock: support get_mmc_clk for exynos

To get exactly clock value for mmc, support the get_mmc_clk() like
set_mmc_clk().

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/cpu/armv7/exynos/clock.c      | 102 +++++++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-exynos/clk.h |   1 +
 2 files changed, 103 insertions(+)

diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c
index abc3272..031af09 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -484,6 +484,100 @@ static unsigned long exynos5_get_uart_clk(int dev_index)
 	return uclk;
 }
 
+static unsigned long exynos4_get_mmc_clk(int dev_index)
+{
+	struct exynos4_clock *clk =
+		(struct exynos4_clock *)samsung_get_base_clock();
+	unsigned long uclk, sclk;
+	unsigned int sel, ratio, pre_ratio;
+	int shift;
+
+	sel = readl(&clk->src_fsys);
+	sel = (sel >> (dev_index << 2)) & 0xf;
+
+	if (sel == 0x6)
+		sclk = get_pll_clk(MPLL);
+	else if (sel == 0x7)
+		sclk = get_pll_clk(EPLL);
+	else if (sel == 0x8)
+		sclk = get_pll_clk(VPLL);
+	else
+		return 0;
+
+	switch (dev_index) {
+	case 0:
+	case 1:
+		ratio = readl(&clk->div_fsys1);
+		pre_ratio = readl(&clk->div_fsys1);
+		break;
+	case 2:
+	case 3:
+		ratio = readl(&clk->div_fsys2);
+		pre_ratio = readl(&clk->div_fsys2);
+		break;
+	case 4:
+		ratio = readl(&clk->div_fsys3);
+		pre_ratio = readl(&clk->div_fsys3);
+		break;
+	default:
+		return 0;
+	}
+
+	if (dev_index == 1 || dev_index == 3)
+		shift = 16;
+
+	ratio = (ratio >> shift) & 0xf;
+	pre_ratio = (pre_ratio >> (shift + 8)) & 0xff;
+	uclk = (sclk / (ratio + 1)) / (pre_ratio + 1);
+
+	return uclk;
+}
+
+static unsigned long exynos5_get_mmc_clk(int dev_index)
+{
+	struct exynos5_clock *clk =
+		(struct exynos5_clock *)samsung_get_base_clock();
+	unsigned long uclk, sclk;
+	unsigned int sel, ratio, pre_ratio;
+	int shift;
+
+	sel = readl(&clk->src_fsys);
+	sel = (sel >> (dev_index << 2)) & 0xf;
+
+	if (sel == 0x6)
+		sclk = get_pll_clk(MPLL);
+	else if (sel == 0x7)
+		sclk = get_pll_clk(EPLL);
+	else if (sel == 0x8)
+		sclk = get_pll_clk(VPLL);
+	else
+		return 0;
+
+	switch (dev_index) {
+	case 0:
+	case 1:
+		ratio = readl(&clk->div_fsys1);
+		pre_ratio = readl(&clk->div_fsys1);
+		break;
+	case 2:
+	case 3:
+		ratio = readl(&clk->div_fsys2);
+		pre_ratio = readl(&clk->div_fsys2);
+		break;
+	default:
+		return 0;
+	}
+
+	if (dev_index == 1 || dev_index == 3)
+		shift = 16;
+
+	ratio = (ratio >> shift) & 0xf;
+	pre_ratio = (pre_ratio >> (shift + 8)) & 0xff;
+	uclk = (sclk / (ratio + 1)) / (pre_ratio + 1);
+
+	return uclk;
+}
+
 /* exynos4: set the mmc clock */
 static void exynos4_set_mmc_clk(int dev_index, unsigned int div)
 {
@@ -1130,6 +1224,14 @@ unsigned long get_uart_clk(int dev_index)
 	}
 }
 
+unsigned long get_mmc_clk(int dev_index)
+{
+	if (cpu_is_exynos5())
+		return exynos5_get_mmc_clk(dev_index);
+	else
+		return exynos4_get_mmc_clk(dev_index);
+}
+
 void set_mmc_clk(int dev_index, unsigned int div)
 {
 	if (cpu_is_exynos5())
diff --git a/arch/arm/include/asm/arch-exynos/clk.h b/arch/arm/include/asm/arch-exynos/clk.h
index cd12323..1935b0b 100644
--- a/arch/arm/include/asm/arch-exynos/clk.h
+++ b/arch/arm/include/asm/arch-exynos/clk.h
@@ -34,6 +34,7 @@ unsigned long get_arm_clk(void);
 unsigned long get_i2c_clk(void);
 unsigned long get_pwm_clk(void);
 unsigned long get_uart_clk(int dev_index);
+unsigned long get_mmc_clk(int dev_index);
 void set_mmc_clk(int dev_index, unsigned int div);
 unsigned long get_lcd_clk(void);
 void set_lcd_clk(void);

From 5374d386f88d8efc8caf311e20c81602d1db9ece Mon Sep 17 00:00:00 2001
From: Jaehoon Chung <jh80.chung@samsung.com>
Date: Thu, 27 Dec 2012 22:30:33 +0000
Subject: [PATCH 41/46] Exynos: clock: add CLK_DIV_FSYS3 at set_mmc_clk

Mobile storage is used the CLK_DIV_FSYS3 value.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 arch/arm/cpu/armv7/exynos/clock.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c
index 031af09..956427c 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -591,9 +591,14 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int div)
 	 * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
 	 * CLK_DIV_FSYS2
 	 * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
+	 * CLK_DIV_FSYS3
+	 * MMC4_PRE_RATIO [15:8]
 	 */
 	if (dev_index < 2) {
 		addr = (unsigned int)&clk->div_fsys1;
+	}  else if (dev_index == 4) {
+		addr = (unsigned int)&clk->div_fsys3;
+		dev_index -= 4;
 	} else {
 		addr = (unsigned int)&clk->div_fsys2;
 		dev_index -= 2;

From 99e516295f4fae7bc0a1d7efaf3106c5ddd43fad Mon Sep 17 00:00:00 2001
From: Ajay Kumar <ajaykumar.rs@samsung.com>
Date: Thu, 10 Jan 2013 21:06:10 +0000
Subject: [PATCH 42/46] EXYNOS5: Make all display related code dependent on
 CONFIG_LCD

u-boot compilation fails for smdk5250 when we deselect CONFIG_LCD
from the main config file.

Following error was observed:
drivers/video/libvideo.o: In function `exynos_lcd_init':
/home/ajay/u-boot-samsung/drivers/video/exynos_fb.c:68: undefined reference to `lcd_set_flush_dcache'

This is because exynos video drivers have dependency on CONFIG_LCD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 board/samsung/smdk5250/smdk5250.c | 2 ++
 include/configs/exynos5250-dt.h   | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c
index 9c4bf9b..7a5f132 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -281,6 +281,7 @@ int board_early_init_f(void)
 }
 #endif
 
+#ifdef CONFIG_LCD
 void cfg_lcd_gpio(void)
 {
 	struct exynos5_gpio_part1 *gpio1 =
@@ -374,3 +375,4 @@ void init_panel_info(vidinfo_t *vid)
 
 	exynos_set_dp_platform_data(&dp_platform_data);
 }
+#endif
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 07bca1d..298bae9 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -299,10 +299,12 @@
 
 /* Display */
 #define CONFIG_LCD
+#ifdef CONFIG_LCD
 #define CONFIG_EXYNOS_FB
 #define CONFIG_EXYNOS_DP
 #define LCD_XRES			2560
 #define LCD_YRES			1600
 #define LCD_BPP			LCD_COLOR16
+#endif
 
 #endif	/* __CONFIG_H */

From a2468dedef569863e1243e802fbe3aa7565e1de1 Mon Sep 17 00:00:00 2001
From: Ajay Kumar <ajaykumar.rs@samsung.com>
Date: Thu, 10 Jan 2013 21:06:11 +0000
Subject: [PATCH 43/46] EXYNOS5: Enable console multiplexing in u-boot

We enable console multiplexing and use both serial and LCD for stdout/stderr.
Initially, u-boot output console is observed via serial port.
If you also have a DP panel connected onto your SMDK5250 board,
you can switch to LCD console by typing "setenv stdout lcd".
You can always switch back to serial using "setenv stdout serial".
You can switch error console(stderr) as well, using similar commands.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 include/configs/exynos5250-dt.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 298bae9..cabd2f2 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -77,6 +77,17 @@
 #define CONFIG_BAUDRATE			115200
 #define EXYNOS5_DEFAULT_UART_OFFSET	0x010000
 
+/* Console configuration */
+#define CONFIG_CONSOLE_MUX
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define EXYNOS_DEVICE_SETTINGS \
+		"stdin=serial\0" \
+		"stdout=serial,lcd\0" \
+		"stderr=serial,lcd\0"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	EXYNOS_DEVICE_SETTINGS
+
 #define TZPC_BASE_OFFSET		0x10000
 
 /* SD/MMC configuration */

From d04df3c6adf7b025d4f68d4f558975d3beb32544 Mon Sep 17 00:00:00 2001
From: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Date: Sun, 13 Jan 2013 19:49:36 +0000
Subject: [PATCH 44/46] I2C: S3C24X0: Resolve build error for VCMA9

This patch resolves the following build errors for I2C driver in
VCMA9:

In file included from s3c24x0_i2c.c:40:0:
s3c24x0_i2c.h:38:17: error: field 'id' has incomplete type
s3c24x0_i2c.c:70:39: error: 'CONFIG_MAX_I2C_NUM' undeclared here (not
in a function) s3c24x0_i2c.c:70:31: warning: 'i2c_bus' defined but
not used [-Wunused-variable] s3c24x0_i2c.c:72:12: warning:
'i2c_busses' defined but not used [-Wunused-variable]

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 drivers/i2c/s3c24x0_i2c.c | 4 +++-
 drivers/i2c/s3c24x0_i2c.h | 3 +--
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 7ec01ec..769a2ba 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -67,9 +67,11 @@
  * variables to live in SRAM
  */
 static unsigned int g_current_bus __attribute__((section(".data")));
+#ifdef CONFIG_OF_CONTROL
+static int i2c_busses __attribute__((section(".data")));
 static struct s3c24x0_i2c_bus i2c_bus[CONFIG_MAX_I2C_NUM]
 			__attribute__((section(".data")));
-static int i2c_busses __attribute__((section(".data")));
+#endif
 
 #if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
 static int GetI2CSDA(void)
diff --git a/drivers/i2c/s3c24x0_i2c.h b/drivers/i2c/s3c24x0_i2c.h
index 1243bf1..a56d749 100644
--- a/drivers/i2c/s3c24x0_i2c.h
+++ b/drivers/i2c/s3c24x0_i2c.h
@@ -35,7 +35,6 @@ struct s3c24x0_i2c_bus {
 	int node;	/* device tree node */
 	int bus_num;	/* i2c bus number */
 	struct s3c24x0_i2c *regs;
-	enum periph_id id;
+	int id;
 };
-
 #endif /* _S3C24X0_I2C_H */

From 02a58b934036dfaa74afb61d383771eda444642b Mon Sep 17 00:00:00 2001
From: Ajay Kumar <ajaykumar.rs@samsung.com>
Date: Sun, 13 Jan 2013 23:32:15 +0000
Subject: [PATCH 45/46] video: exynos_dp: Remove unused variable disp_info

Remove unused variable disp_info to fix the following compilation warning:
exynos_dp.c: In function 'exynos_init_dp':
exynos_dp.c:860:23: warning: variable 'disp_info' set but not used
[-Wunused-but-set-variable]

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 drivers/video/exynos_dp.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/video/exynos_dp.c b/drivers/video/exynos_dp.c
index 53e4101..d72fa56 100644
--- a/drivers/video/exynos_dp.c
+++ b/drivers/video/exynos_dp.c
@@ -857,7 +857,6 @@ unsigned int exynos_init_dp(void)
 {
 	unsigned int ret;
 	struct edp_device_info *edp_info;
-	struct edp_disp_info disp_info;
 
 	edp_info = kzalloc(sizeof(struct edp_device_info), GFP_KERNEL);
 	if (!edp_info) {
@@ -870,7 +869,6 @@ unsigned int exynos_init_dp(void)
 		debug("failed to get edp_info data.\n");
 		return -EFAULT;
 	}
-	disp_info = edp_info->disp_info;
 
 	exynos_dp_disp_info(&edp_info->disp_info);
 

From e4660e0b7363cdc86519f4af2143b841592a7ffd Mon Sep 17 00:00:00 2001
From: Ajay Kumar <ajaykumar.rs@samsung.com>
Date: Sun, 13 Jan 2013 23:32:16 +0000
Subject: [PATCH 46/46] video: exynos_fb: Make a call to draw_logo only when
 CONFIG_CMD_BMP is selected

Previously, the call to draw_logo() was happening irrespective
of whether we have selected logo or LCD console.
With this patch we call draw_logo() only when CONFIG_CMD_BMP is selected.

This would even fix the following compilation warning:
exynos_fb.c: In function 'draw_logo':
exynos_fb.c:74:8: warning: variable 'addr' set but not used
[-Wunused-but-set-variable]
exynos_fb.c:73:9: warning: variable 'y' set but not used
[-Wunused-but-set-variable]
exynos_fb.c:73:6: warning: variable 'x' set but not used
[-Wunused-but-set-variable]

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---
 drivers/video/exynos_fb.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index 183bca0..ee0ed06 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -68,6 +68,7 @@ static void exynos_lcd_init(vidinfo_t *vid)
 	lcd_set_flush_dcache(1);
 }
 
+#ifdef CONFIG_CMD_BMP
 static void draw_logo(void)
 {
 	int x, y;
@@ -88,10 +89,9 @@ static void draw_logo(void)
 	}
 
 	addr = panel_info.logo_addr;
-#ifdef CONFIG_CMD_BMP
 	bmp_display(addr, x, y);
-#endif
 }
+#endif
 
 static void lcd_panel_on(vidinfo_t *vid)
 {
@@ -150,7 +150,9 @@ void lcd_enable(void)
 	if (panel_info.logo_on) {
 		memset(lcd_base, 0, panel_width * panel_height *
 				(NBITS(panel_info.vl_bpix) >> 3));
+#ifdef CONFIG_CMD_BMP
 		draw_logo();
+#endif
 	}
 
 	lcd_panel_on(&panel_info);