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Merge branch 'rmobile' of git://www.denx.de/git/u-boot-sh

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master
Tom Rini 10 years ago
parent 625509ab0e 9cb8d9d2e0
commit 11ada9225a
12 changed files with 78 additions and 21 deletions
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  1. 5
      arch/arm/cpu/armv7/rmobile/Kconfig
  2. 11
      arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S
  3. 2
      arch/arm/include/asm/arch-rmobile/rcar-base.h
  4. 7
      board/renesas/alt/alt.c
  5. 6
      board/renesas/alt/qos.c
  6. 1
      board/renesas/koelsch/koelsch.c
  7. 7
      board/renesas/koelsch/qos.c
  8. 6
      board/renesas/lager/lager.c
  9. 7
      board/renesas/lager/qos.c
  10. 21
      include/configs/alt.h
  11. 14
      include/configs/koelsch.h
  12. 12
      include/configs/lager.h

5
arch/arm/cpu/armv7/rmobile/Kconfig
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@ -23,6 +23,11 @@ endchoice
config SYS_SOC
default "rmobile"
config RMOBILE_EXTRAM_BOOT
bool "Enable boot from RAM"
depends on TARGET_ALT || TARGET_KOELSCH || TARGET_LAGER
default n
source "board/atmark-techno/armadillo-800eva/Kconfig"
source "board/renesas/koelsch/Kconfig"
source "board/renesas/lager/Kconfig"

11
arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S
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@ -60,17 +60,10 @@ do_lowlevel_init:
cmp r1, #3 /* has already been set up */
bicne r0, r0, #0xe7
orrne r0, r0, #0x83 /* L2CTLR[7:6] + L2CTLR[2:0] */
ldr r2, =0xFF000044 /* PRR */
ldr r1, [r2]
and r1, r1, #0x7F00
lsrs r1, r1, #8
cmp r1, #0x45 /* 0x45 is ID of r8a7790 */
bne L2CTLR_5_SKIP
#if defined(CONFIG_R8A7790)
orrne r0, r0, #0x20 /* L2CTLR[5] */
L2CTLR_5_SKIP:
#endif
mcrne p15, 1, r0, c9, c0, 2
_exit_init_l2_a15:
ldr r3, =(CONFIG_SYS_INIT_SP_ADDR)
sub sp, r3, #4

2
arch/arm/include/asm/arch-rmobile/rcar-base.h
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@ -385,6 +385,8 @@
#define PLL0CR 0xE61500D8
#define PLL0_STC_MASK 0x7F000000
#define PLL0_STC_BIT 24
#define PLLECR 0xE61500D0
#define PLL0ST 0x100
#ifndef __ASSEMBLY__
#include <asm/types.h>

7
board/renesas/alt/alt.c
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@ -43,7 +43,7 @@ void s_init(void)
#define MSTPSR7 0xE61501C4
#define SMSTPCR7 0xE615014C
#define SCIF0_MSTP719 (1 << 19)
#define SCIF2_MSTP719 (1 << 19)
#define MSTPSR8 0xE61509A0
#define SMSTPCR8 0xE6150990
@ -63,8 +63,8 @@ int board_early_init_f(void)
/* TMU */
mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
/* SCIF0 */
mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP719);
/* SCIF2 */
mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF2_MSTP719);
/* ETHER */
mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHER_MSTP813);
@ -140,7 +140,6 @@ int board_eth_init(bd_t *bis)
int dram_init(void)
{
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
return 0;

6
board/renesas/alt/qos.c
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@ -13,6 +13,7 @@
#include <asm/io.h>
#include <asm/arch/rmobile.h>
#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
/* QoS version 0.11 */
enum {
@ -942,3 +943,8 @@ void qos_init(void)
writel(0x00000001, &axi_qos->qosthres2);
writel(0x00000001, &axi_qos->qosqon);
}
#else /* CONFIG_RMOBILE_EXTRAM_BOOT */
void qos_init(void)
{
}
#endif /* CONFIG_RMOBILE_EXTRAM_BOOT */

1
board/renesas/koelsch/koelsch.c
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@ -150,7 +150,6 @@ int board_eth_init(bd_t *bis)
int dram_init(void)
{
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
return 0;

7
board/renesas/koelsch/qos.c
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@ -14,7 +14,7 @@
#include <asm/arch/rmobile.h>
/* QoS version 0.240 for ES1 and version 0.334 for ES2 */
#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
enum {
DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
@ -1304,3 +1304,8 @@ void qos_init(void)
writel(0x00000001, &axi_qos->qosthres2);
writel(0x00000001, &axi_qos->qosqon);
}
#else /* CONFIG_RMOBILE_EXTRAM_BOOT */
void qos_init(void)
{
}
#endif /* CONFIG_RMOBILE_EXTRAM_BOOT */

6
board/renesas/lager/lager.c
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@ -36,9 +36,14 @@ void s_init(void)
/* CPU frequency setting. Set to 1.4GHz */
if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
u32 stat = 0;
u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1)
<< PLL0_STC_BIT;
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
do {
stat = readl(PLLECR) & PLL0ST;
} while (stat == 0x0);
}
/* QoS(Quality-of-Service) Init */
@ -160,7 +165,6 @@ int board_phy_config(struct phy_device *phydev)
int dram_init(void)
{
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
return 0;

7
board/renesas/lager/qos.c
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@ -13,7 +13,7 @@
#include <asm/arch/rmobile.h>
/* QoS version 0.955 for ES1 and version 0.963 for ES2 */
#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
enum {
DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
@ -2381,3 +2381,8 @@ void qos_init(void)
else
qos_init_es1();
}
#else /* CONFIG_RMOBILE_EXTRAM_BOOT */
void qos_init(void)
{
}
#endif /* CONFIG_RMOBILE_EXTRAM_BOOT */

21
include/configs/alt.h
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@ -31,10 +31,17 @@
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NFS
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_USB
#define CONFIG_CMD_FAT
#define CONFIG_FAT_WRITE
#define CONFIG_CMD_SF
#define CONFIG_CMD_SPI
#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
#define CONFIG_SYS_TEXT_BASE 0x70000000
#else
#define CONFIG_SYS_TEXT_BASE 0xE6304000
#endif
#define CONFIG_SYS_THUMB_BUILD
#define CONFIG_SYS_GENERIC_BOARD
@ -59,7 +66,11 @@
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_TMU_TIMER
#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
#define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC
#else
#define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC
#endif
#define STACK_AREA_SIZE 0xC000
#define LOW_LEVEL_MERAM_STACK \
(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
@ -162,4 +173,14 @@
#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
/* Filesystems */
#define CONFIG_DOS_PARTITION
#define CONFIG_SUPPORT_VFAT
/* USB */
#define CONFIG_USB_STORAGE
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_RMOBILE
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#endif /* __ALT_H */

14
include/configs/koelsch.h
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@ -38,7 +38,12 @@
#define CONFIG_FAT_WRITE
#define CONFIG_EXT4_WRITE
#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
#define CONFIG_SYS_TEXT_BASE 0x70000000
#else
#define CONFIG_SYS_TEXT_BASE 0xE6304000
#endif
#define CONFIG_SYS_THUMB_BUILD
#define CONFIG_SYS_GENERIC_BOARD
@ -69,8 +74,13 @@
#define CONFIG_TMU_TIMER
/* STACK */
#define CONFIG_SYS_INIT_SP_ADDR 0xE633fffc
#define STACK_AREA_SIZE 0xC000
#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
#define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC
#else
#define CONFIG_SYS_INIT_SP_ADDR 0xE633fffC
#endif
#define STACK_AREA_SIZE 0xC000
#define LOW_LEVEL_MERAM_STACK \
(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)

12
include/configs/lager.h
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@ -39,7 +39,11 @@
#define CONFIG_FAT_WRITE
#define CONFIG_EXT4_WRITE
#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
#define CONFIG_SYS_TEXT_BASE 0xB0000000
#else
#define CONFIG_SYS_TEXT_BASE 0xE8080000
#endif
#define CONFIG_SYS_THUMB_BUILD
#define CONFIG_SYS_GENERIC_BOARD
@ -70,8 +74,12 @@
#define CONFIG_TMU_TIMER
/* STACK */
#define CONFIG_SYS_INIT_SP_ADDR 0xE827fffc
#define STACK_AREA_SIZE 0xC000
#if defined(CONFIGF_RMOBILE_EXTRAM_BOOT)
#define CONFIG_SYS_INIT_SP_ADDR 0xB003FFFC
#else
#define CONFIG_SYS_INIT_SP_ADDR 0xE827FFFC
#endif
#define STACK_AREA_SIZE 0xC000
#define LOW_LEVEL_MERAM_STACK \
(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)

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