wdenk
23 years ago
parent
6534c9c248
commit
13f9bf148f
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/************************************************
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* NAME : s3c2400.h |
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* Version : 3.7.2002 |
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* |
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* Based on 24x.h for the Samsung Development Board |
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************************************************/ |
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#ifndef __S3C2400_H__ |
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#define __S3C2400_H__ |
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/* Memory control */ |
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#define rBWSCON (*(volatile unsigned *)0x14000000) |
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#define rBANKCON0 (*(volatile unsigned *)0x14000004) |
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#define rBANKCON1 (*(volatile unsigned *)0x14000008) |
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#define rBANKCON2 (*(volatile unsigned *)0x1400000C) |
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#define rBANKCON3 (*(volatile unsigned *)0x14000010) |
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#define rBANKCON4 (*(volatile unsigned *)0x14000014) |
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#define rBANKCON5 (*(volatile unsigned *)0x14000018) |
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#define rBANKCON6 (*(volatile unsigned *)0x1400001C) |
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#define rBANKCON7 (*(volatile unsigned *)0x14000020) |
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#define rREFRESH (*(volatile unsigned *)0x14000024) |
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#define rBANKSIZE (*(volatile unsigned *)0x14000028) |
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#define rMRSRB6 (*(volatile unsigned *)0x1400002C) |
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#define rMRSRB7 (*(volatile unsigned *)0x14000030) |
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/* INTERRUPT */ |
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#define rSRCPND (*(volatile unsigned *)0x14400000) |
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#define rINTMOD (*(volatile unsigned *)0x14400004) |
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#define rINTMSK (*(volatile unsigned *)0x14400008) |
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#define rPRIORITY (*(volatile unsigned *)0x1440000C) |
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#define rINTPND (*(volatile unsigned *)0x14400010) |
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#define rINTOFFSET (*(volatile unsigned *)0x14400014) |
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/* DMA */ |
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#define rDISRC0 (*(volatile unsigned *)0x14600000) |
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#define rDIDST0 (*(volatile unsigned *)0x14600004) |
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#define rDCON0 (*(volatile unsigned *)0x14600008) |
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#define rDSTAT0 (*(volatile unsigned *)0x1460000C) |
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#define rDCSRC0 (*(volatile unsigned *)0x14600010) |
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#define rDCDST0 (*(volatile unsigned *)0x14600014) |
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#define rDMASKTRIG0 (*(volatile unsigned *)0x14600018) |
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#define rDISRC1 (*(volatile unsigned *)0x14600020) |
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#define rDIDST1 (*(volatile unsigned *)0x14600024) |
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#define rDCON1 (*(volatile unsigned *)0x14600028) |
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#define rDSTAT1 (*(volatile unsigned *)0x1460002C) |
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#define rDCSRC1 (*(volatile unsigned *)0x14600030) |
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#define rDCDST1 (*(volatile unsigned *)0x14600034) |
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#define rDMASKTRIG1 (*(volatile unsigned *)0x14600038) |
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#define rDISRC2 (*(volatile unsigned *)0x14600040) |
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#define rDIDST2 (*(volatile unsigned *)0x14600044) |
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#define rDCON2 (*(volatile unsigned *)0x14600048) |
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#define rDSTAT2 (*(volatile unsigned *)0x1460004C) |
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#define rDCSRC2 (*(volatile unsigned *)0x14600050) |
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#define rDCDST2 (*(volatile unsigned *)0x14600054) |
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#define rDMASKTRIG2 (*(volatile unsigned *)0x14600058) |
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#define rDISRC3 (*(volatile unsigned *)0x14600060) |
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#define rDIDST3 (*(volatile unsigned *)0x14600064) |
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#define rDCON3 (*(volatile unsigned *)0x14600068) |
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#define rDSTAT3 (*(volatile unsigned *)0x1460006C) |
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#define rDCSRC3 (*(volatile unsigned *)0x14600070) |
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#define rDCDST3 (*(volatile unsigned *)0x14600074) |
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#define rDMASKTRIG3 (*(volatile unsigned *)0x14600078) |
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/* CLOCK & POWER MANAGEMENT */ |
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#define rLOCKTIME (*(volatile unsigned *)0x14800000) |
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#define rMPLLCON (*(volatile unsigned *)0x14800004) |
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#define rUPLLCON (*(volatile unsigned *)0x14800008) |
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#define rCLKCON (*(volatile unsigned *)0x1480000C) |
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#define rCLKSLOW (*(volatile unsigned *)0x14800010) |
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#define rCLKDIVN (*(volatile unsigned *)0x14800014) |
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/* LCD CONTROLLER */ |
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#define rLCDCON1 (*(volatile unsigned *)0x14A00000) |
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#define rLCDCON2 (*(volatile unsigned *)0x14A00004) |
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#define rLCDCON3 (*(volatile unsigned *)0x14A00008) |
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#define rLCDCON4 (*(volatile unsigned *)0x14A0000C) |
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#define rLCDCON5 (*(volatile unsigned *)0x14A00010) |
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#define rLCDSADDR1 (*(volatile unsigned *)0x14A00014) |
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#define rLCDSADDR2 (*(volatile unsigned *)0x14A00018) |
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#define rLCDSADDR3 (*(volatile unsigned *)0x14A0001C) |
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#define rREDLUT (*(volatile unsigned *)0x14A00020) |
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#define rGREENLUT (*(volatile unsigned *)0x14A00024) |
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#define rBLUELUT (*(volatile unsigned *)0x14A00028) |
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#define rDP1_2 (*(volatile unsigned *)0x14A0002C) |
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#define rDP4_7 (*(volatile unsigned *)0x14A00030) |
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#define rDP3_5 (*(volatile unsigned *)0x14A00034) |
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#define rDP2_3 (*(volatile unsigned *)0x14A00038) |
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#define rDP5_7 (*(volatile unsigned *)0x14A0003c) |
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#define rDP3_4 (*(volatile unsigned *)0x14A00040) |
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#define rDP4_5 (*(volatile unsigned *)0x14A00044) |
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#define rDP6_7 (*(volatile unsigned *)0x14A00048) |
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#define rDITHMODE (*(volatile unsigned *)0x14A0004C) |
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#define rTPAL (*(volatile unsigned *)0x14A00050) |
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#define PALETTE (0x14A00400) /* SJS */ |
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/* UART */ |
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#define rULCON0 (*(volatile unsigned char *)0x15000000) |
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#define rUCON0 (*(volatile unsigned short *)0x15000004) |
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#define rUFCON0 (*(volatile unsigned char *)0x15000008) |
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#define rUMCON0 (*(volatile unsigned char *)0x1500000C) |
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#define rUTRSTAT0 (*(volatile unsigned char *)0x15000010) |
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#define rUERSTAT0 (*(volatile unsigned char *)0x15000014) |
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#define rUFSTAT0 (*(volatile unsigned short *)0x15000018) |
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#define rUMSTAT0 (*(volatile unsigned char *)0x1500001C) |
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#define rUBRDIV0 (*(volatile unsigned short *)0x15000028) |
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#define rULCON1 (*(volatile unsigned char *)0x15004000) |
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#define rUCON1 (*(volatile unsigned short *)0x15004004) |
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#define rUFCON1 (*(volatile unsigned char *)0x15004008) |
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#define rUMCON1 (*(volatile unsigned char *)0x1500400C) |
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#define rUTRSTAT1 (*(volatile unsigned char *)0x15004010) |
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#define rUERSTAT1 (*(volatile unsigned char *)0x15004014) |
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#define rUFSTAT1 (*(volatile unsigned short *)0x15004018) |
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#define rUMSTAT1 (*(volatile unsigned char *)0x1500401C) |
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#define rUBRDIV1 (*(volatile unsigned short *)0x15004028) |
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#ifdef __BIG_ENDIAN |
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#define rUTXH0 (*(volatile unsigned char *)0x15000023) |
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#define rURXH0 (*(volatile unsigned char *)0x15000027) |
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#define rUTXH1 (*(volatile unsigned char *)0x15004023) |
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#define rURXH1 (*(volatile unsigned char *)0x15004027) |
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#define WrUTXH0(ch) (*(volatile unsigned char *)0x15000023)=(unsigned char)(ch) |
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#define RdURXH0() (*(volatile unsigned char *)0x15000027) |
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#define WrUTXH1(ch) (*(volatile unsigned char *)0x15004023)=(unsigned char)(ch) |
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#define RdURXH1() (*(volatile unsigned char *)0x15004027) |
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#define UTXH0 (0x15000020+3) /* byte_access address by DMA */ |
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#define URXH0 (0x15000024+3) |
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#define UTXH1 (0x15004020+3) |
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#define URXH1 (0x15004024+3) |
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#else /* Little Endian */ |
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#define rUTXH0 (*(volatile unsigned char *)0x15000020) |
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#define rURXH0 (*(volatile unsigned char *)0x15000024) |
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#define rUTXH1 (*(volatile unsigned char *)0x15004020) |
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#define rURXH1 (*(volatile unsigned char *)0x15004024) |
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#define WrUTXH0(ch) (*(volatile unsigned char *)0x15000020)=(unsigned char)(ch) |
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#define RdURXH0() (*(volatile unsigned char *)0x15000024) |
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#define WrUTXH1(ch) (*(volatile unsigned char *)0x15004020)=(unsigned char)(ch) |
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#define RdURXH1() (*(volatile unsigned char *)0x15004024) |
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#define UTXH0 (0x15000020) /* byte_access address by DMA */ |
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#define URXH0 (0x15000024) |
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#define UTXH1 (0x15004020) |
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#define URXH1 (0x15004024) |
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#endif |
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/* PWM TIMER */ |
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#define rTCFG0 (*(volatile unsigned *)0x15100000) |
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#define rTCFG1 (*(volatile unsigned *)0x15100004) |
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#define rTCON (*(volatile unsigned *)0x15100008) |
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#define rTCNTB0 (*(volatile unsigned *)0x1510000C) |
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#define rTCMPB0 (*(volatile unsigned *)0x15100010) |
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#define rTCNTO0 (*(volatile unsigned *)0x15100014) |
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#define rTCNTB1 (*(volatile unsigned *)0x15100018) |
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#define rTCMPB1 (*(volatile unsigned *)0x1510001C) |
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#define rTCNTO1 (*(volatile unsigned *)0x15100020) |
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#define rTCNTB2 (*(volatile unsigned *)0x15100024) |
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#define rTCMPB2 (*(volatile unsigned *)0x15100028) |
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#define rTCNTO2 (*(volatile unsigned *)0x1510002C) |
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#define rTCNTB3 (*(volatile unsigned *)0x15100030) |
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#define rTCMPB3 (*(volatile unsigned *)0x15100034) |
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#define rTCNTO3 (*(volatile unsigned *)0x15100038) |
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#define rTCNTB4 (*(volatile unsigned *)0x1510003C) |
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#define rTCNTO4 (*(volatile unsigned *)0x15100040) |
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/* USB DEVICE */ |
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#define rFUNC_ADDR_REG (*(volatile unsigned *)0x15200140) |
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#define rPWR_REG (*(volatile unsigned *)0x15200144) |
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#define rINT_REG (*(volatile unsigned *)0x15200148) |
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#define rINT_MASK_REG (*(volatile unsigned *)0x1520014C) |
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#define rFRAME_NUM_REG (*(volatile unsigned *)0x15200150) |
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#define rRESUME_CON_REG (*(volatile unsigned *)0x15200154) |
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#define rEP0_CSR (*(volatile unsigned *)0x15200160) |
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#define rEP0_MAXP (*(volatile unsigned *)0x15200164) |
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#define rEP0_OUT_CNT (*(volatile unsigned *)0x15200168) |
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#define rEP0_FIFO (*(volatile unsigned *)0x1520016C) |
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#define rEP1_IN_CSR (*(volatile unsigned *)0x15200180) |
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#define rEP1_IN_MAXP (*(volatile unsigned *)0x15200184) |
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#define rEP1_FIFO (*(volatile unsigned *)0x15200188) |
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#define rEP2_IN_CSR (*(volatile unsigned *)0x15200190) |
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#define rEP2_IN_MAXP (*(volatile unsigned *)0x15200194) |
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#define rEP2_FIFO (*(volatile unsigned *)0x15200198) |
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#define rEP3_OUT_CSR (*(volatile unsigned *)0x152001A0) |
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#define rEP3_OUT_MAXP (*(volatile unsigned *)0x152001A4) |
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#define rEP3_OUT_CNT (*(volatile unsigned *)0x152001A8) |
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#define rEP3_FIFO (*(volatile unsigned *)0x152001AC) |
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#define rEP4_OUT_CSR (*(volatile unsigned *)0x152001B0) |
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#define rEP4_OUT_MAXP (*(volatile unsigned *)0x152001B4) |
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#define rEP4_OUT_CNT (*(volatile unsigned *)0x152001B8) |
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#define rEP4_FIFO (*(volatile unsigned *)0x152001BC) |
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#define rDMA_CON (*(volatile unsigned *)0x152001C0) |
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#define rDMA_UNIT (*(volatile unsigned *)0x152001C4) |
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#define rDMA_FIFO (*(volatile unsigned *)0x152001C8) |
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#define rDMA_TX (*(volatile unsigned *)0x152001CC) |
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#define rTEST_MODE (*(volatile unsigned *)0x152001F4) |
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#define rIN_CON_REG (*(volatile unsigned *)0x152001F8) |
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/* WATCH DOG TIMER */ |
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#define rWTCON (*(volatile unsigned *)0x15300000) |
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#define rWTDAT (*(volatile unsigned *)0x15300004) |
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#define rWTCNT (*(volatile unsigned *)0x15300008) |
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/* IIC */ |
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#define rIICCON (*(volatile unsigned *)0x15400000) |
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#define rIICSTAT (*(volatile unsigned *)0x15400004) |
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#define rIICADD (*(volatile unsigned *)0x15400008) |
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#define rIICDS (*(volatile unsigned *)0x1540000C) |
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/* IIS */ |
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#define rIISCON (*(volatile unsigned *)0x15508000) |
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#define rIISMOD (*(volatile unsigned *)0x15508004) |
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#define rIISPSR (*(volatile unsigned *)0x15508008) |
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#define rIISFIFCON (*(volatile unsigned *)0x1550800C) |
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#ifdef __BIG_ENDIAN |
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#define IISFIF ((volatile unsigned short *)0x15508012) |
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#else /* Little Endian */ |
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#define IISFIF ((volatile unsigned short *)0x15508010) |
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#endif |
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/* I/O PORT */ |
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#define rPACON (*(volatile unsigned *)0x15600000) |
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#define rPADAT (*(volatile unsigned *)0x15600004) |
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#define rPBCON (*(volatile unsigned *)0x15600008) |
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#define rPBDAT (*(volatile unsigned *)0x1560000C) |
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#define rPBUP (*(volatile unsigned *)0x15600010) |
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#define rPCCON (*(volatile unsigned *)0x15600014) |
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#define rPCDAT (*(volatile unsigned *)0x15600018) |
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#define rPCUP (*(volatile unsigned *)0x1560001C) |
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#define rPDCON (*(volatile unsigned *)0x15600020) |
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#define rPDDAT (*(volatile unsigned *)0x15600024) |
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#define rPDUP (*(volatile unsigned *)0x15600028) |
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#define rPECON (*(volatile unsigned *)0x1560002C) |
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#define rPEDAT (*(volatile unsigned *)0x15600030) |
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#define rPEUP (*(volatile unsigned *)0x15600034) |
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#define rPFCON (*(volatile unsigned *)0x15600038) |
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#define rPFDAT (*(volatile unsigned *)0x1560003C) |
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#define rPFUP (*(volatile unsigned *)0x15600040) |
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#define rPGCON (*(volatile unsigned *)0x15600044) |
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#define rPGDAT (*(volatile unsigned *)0x15600048) |
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#define rPGUP (*(volatile unsigned *)0x1560004C) |
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#define rOPENCR (*(volatile unsigned *)0x15600050) |
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#define rMISCCR (*(volatile unsigned *)0x15600054) |
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#define rEXTINT (*(volatile unsigned *)0x15600058) |
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/* RTC */ |
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#ifdef __BIG_ENDIAN |
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#define rRTCCON (*(volatile unsigned char *)0x15700043) |
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#define rRTCALM (*(volatile unsigned char *)0x15700053) |
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#define rALMSEC (*(volatile unsigned char *)0x15700057) |
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#define rALMMIN (*(volatile unsigned char *)0x1570005B) |
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#define rALMHOUR (*(volatile unsigned char *)0x1570005F) |
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#define rALMDAY (*(volatile unsigned char *)0x15700063) |
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#define rALMMON (*(volatile unsigned char *)0x15700067) |
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#define rALMYEAR (*(volatile unsigned char *)0x1570006B) |
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#define rRTCRST (*(volatile unsigned char *)0x1570006F) |
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#define rBCDSEC (*(volatile unsigned char *)0x15700073) |
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#define rBCDMIN (*(volatile unsigned char *)0x15700077) |
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#define rBCDHOUR (*(volatile unsigned char *)0x1570007B) |
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#define rBCDDAY (*(volatile unsigned char *)0x1570007F) |
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#define rBCDDATE (*(volatile unsigned char *)0x15700083) |
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#define rBCDMON (*(volatile unsigned char *)0x15700087) |
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#define rBCDYEAR (*(volatile unsigned char *)0x1570008B) |
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#define rTICINT (*(volatile unsigned char *)0x15700047) |
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#else /* Little Endian */ |
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#define rRTCCON (*(volatile unsigned char *)0x15700040) |
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#define rRTCALM (*(volatile unsigned char *)0x15700050) |
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#define rALMSEC (*(volatile unsigned char *)0x15700054) |
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#define rALMMIN (*(volatile unsigned char *)0x15700058) |
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#define rALMHOUR (*(volatile unsigned char *)0x1570005C) |
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#define rALMDAY (*(volatile unsigned char *)0x15700060) |
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#define rALMMON (*(volatile unsigned char *)0x15700064) |
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#define rALMYEAR (*(volatile unsigned char *)0x15700068) |
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#define rRTCRST (*(volatile unsigned char *)0x1570006C) |
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#define rBCDSEC (*(volatile unsigned char *)0x15700070) |
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#define rBCDMIN (*(volatile unsigned char *)0x15700074) |
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#define rBCDHOUR (*(volatile unsigned char *)0x15700078) |
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#define rBCDDAY (*(volatile unsigned char *)0x1570007C) |
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#define rBCDDATE (*(volatile unsigned char *)0x15700080) |
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#define rBCDMON (*(volatile unsigned char *)0x15700084) |
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#define rBCDYEAR (*(volatile unsigned char *)0x15700088) |
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#define rTICINT (*(volatile unsigned char *)0x15700044) |
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#endif |
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/* ADC */ |
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#define rADCCON (*(volatile unsigned *)0x15800000) |
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#define rADCDAT (*(volatile unsigned *)0x15800004) |
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/* SPI */ |
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#define rSPCON (*(volatile unsigned *)0x15900000) |
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#define rSPSTA (*(volatile unsigned *)0x15900004) |
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#define rSPPIN (*(volatile unsigned *)0x15900008) |
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#define rSPPRE (*(volatile unsigned *)0x1590000C) |
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#define rSPTDAT (*(volatile unsigned *)0x15900010) |
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#define rSPRDAT (*(volatile unsigned *)0x15900014) |
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/* MMC INTERFACE */ |
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#define rMMCON (*(volatile unsigned *)0x15a00000) |
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#define rMMCRR (*(volatile unsigned *)0x15a00004) |
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#define rMMFCON (*(volatile unsigned *)0x15a00008) |
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#define rMMSTA (*(volatile unsigned *)0x15a0000C) |
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#define rMMFSTA (*(volatile unsigned *)0x15a00010) |
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#define rMMPRE (*(volatile unsigned *)0x15a00014) |
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#define rMMLEN (*(volatile unsigned *)0x15a00018) |
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#define rMMCR7 (*(volatile unsigned *)0x15a0001C) |
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#define rMMRSP0 (*(volatile unsigned *)0x15a00020) |
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#define rMMRSP1 (*(volatile unsigned *)0x15a00024) |
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#define rMMRSP2 (*(volatile unsigned *)0x15a00028) |
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#define rMMRSP3 (*(volatile unsigned *)0x15a0002C) |
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#define rMMCMD0 (*(volatile unsigned *)0x15a00030) |
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#define rMMCMD1 (*(volatile unsigned *)0x15a00034) |
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#define rMMCR16 (*(volatile unsigned *)0x15a00038) |
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#define rMMDAT (*(volatile unsigned *)0x15a0003C) |
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/* ISR */ |
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#define pISR_RESET (*(unsigned *)(_ISR_STARTADDRESS+0x0)) |
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#define pISR_UNDEF (*(unsigned *)(_ISR_STARTADDRESS+0x4)) |
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#define pISR_SWI (*(unsigned *)(_ISR_STARTADDRESS+0x8)) |
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#define pISR_PABORT (*(unsigned *)(_ISR_STARTADDRESS+0xC)) |
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#define pISR_DABORT (*(unsigned *)(_ISR_STARTADDRESS+0x10)) |
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#define pISR_RESERVED (*(unsigned *)(_ISR_STARTADDRESS+0x14)) |
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#define pISR_IRQ (*(unsigned *)(_ISR_STARTADDRESS+0x18)) |
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#define pISR_FIQ (*(unsigned *)(_ISR_STARTADDRESS+0x1C)) |
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#define pISR_EINT0 (*(unsigned *)(_ISR_STARTADDRESS+0x20)) |
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#define pISR_EINT1 (*(unsigned *)(_ISR_STARTADDRESS+0x24)) |
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#define pISR_EINT2 (*(unsigned *)(_ISR_STARTADDRESS+0x28)) |
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#define pISR_EINT3 (*(unsigned *)(_ISR_STARTADDRESS+0x2C)) |
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#define pISR_EINT4 (*(unsigned *)(_ISR_STARTADDRESS+0x30)) |
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#define pISR_EINT5 (*(unsigned *)(_ISR_STARTADDRESS+0x34)) |
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#define pISR_EINT6 (*(unsigned *)(_ISR_STARTADDRESS+0x38)) |
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#define pISR_EINT7 (*(unsigned *)(_ISR_STARTADDRESS+0x3C)) |
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#define pISR_TICK (*(unsigned *)(_ISR_STARTADDRESS+0x40)) |
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#define pISR_WDT (*(unsigned *)(_ISR_STARTADDRESS+0x44)) |
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#define pISR_TIMER0 (*(unsigned *)(_ISR_STARTADDRESS+0x48)) |
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#define pISR_TIMER1 (*(unsigned *)(_ISR_STARTADDRESS+0x4C)) |
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#define pISR_TIMER2 (*(unsigned *)(_ISR_STARTADDRESS+0x50)) |
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#define pISR_TIMER3 (*(unsigned *)(_ISR_STARTADDRESS+0x54)) |
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#define pISR_TIMER4 (*(unsigned *)(_ISR_STARTADDRESS+0x58)) |
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#define pISR_UERR01 (*(unsigned *)(_ISR_STARTADDRESS+0x5C)) |
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#define pISR_NOTUSED (*(unsigned *)(_ISR_STARTADDRESS+0x60)) |
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#define pISR_DMA0 (*(unsigned *)(_ISR_STARTADDRESS+0x64)) |
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#define pISR_DMA1 (*(unsigned *)(_ISR_STARTADDRESS+0x68)) |
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#define pISR_DMA2 (*(unsigned *)(_ISR_STARTADDRESS+0x6C)) |
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#define pISR_DMA3 (*(unsigned *)(_ISR_STARTADDRESS+0x70)) |
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#define pISR_MMC (*(unsigned *)(_ISR_STARTADDRESS+0x74)) |
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#define pISR_SPI (*(unsigned *)(_ISR_STARTADDRESS+0x78)) |
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#define pISR_URXD0 (*(unsigned *)(_ISR_STARTADDRESS+0x7C)) |
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#define pISR_URXD1 (*(unsigned *)(_ISR_STARTADDRESS+0x80)) |
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#define pISR_USBD (*(unsigned *)(_ISR_STARTADDRESS+0x84)) |
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#define pISR_USBH (*(unsigned *)(_ISR_STARTADDRESS+0x88)) |
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#define pISR_IIC (*(unsigned *)(_ISR_STARTADDRESS+0x8C)) |
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#define pISR_UTXD0 (*(unsigned *)(_ISR_STARTADDRESS+0x90)) |
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#define pISR_UTXD1 (*(unsigned *)(_ISR_STARTADDRESS+0x94)) |
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#define pISR_RTC (*(unsigned *)(_ISR_STARTADDRESS+0x98)) |
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#define pISR_ADC (*(unsigned *)(_ISR_STARTADDRESS+0xA0)) |
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|
||||
|
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/* PENDING BIT */ |
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#define BIT_EINT0 (0x1) |
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#define BIT_EINT1 (0x1<<1) |
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#define BIT_EINT2 (0x1<<2) |
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#define BIT_EINT3 (0x1<<3) |
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#define BIT_EINT4 (0x1<<4) |
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#define BIT_EINT5 (0x1<<5) |
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#define BIT_EINT6 (0x1<<6) |
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#define BIT_EINT7 (0x1<<7) |
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#define BIT_TICK (0x1<<8) |
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#define BIT_WDT (0x1<<9) |
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#define BIT_TIMER0 (0x1<<10) |
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#define BIT_TIMER1 (0x1<<11) |
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#define BIT_TIMER2 (0x1<<12) |
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#define BIT_TIMER3 (0x1<<13) |
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#define BIT_TIMER4 (0x1<<14) |
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#define BIT_UERR01 (0x1<<15) |
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#define BIT_NOTUSED (0x1<<16) |
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#define BIT_DMA0 (0x1<<17) |
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#define BIT_DMA1 (0x1<<18) |
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#define BIT_DMA2 (0x1<<19) |
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#define BIT_DMA3 (0x1<<20) |
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#define BIT_MMC (0x1<<21) |
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#define BIT_SPI (0x1<<22) |
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#define BIT_URXD0 (0x1<<23) |
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#define BIT_URXD1 (0x1<<24) |
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#define BIT_USBD (0x1<<25) |
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#define BIT_USBH (0x1<<26) |
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#define BIT_IIC (0x1<<27) |
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#define BIT_UTXD0 (0x1<<28) |
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#define BIT_UTXD1 (0x1<<29) |
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#define BIT_RTC (0x1<<30) |
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#define BIT_ADC (0x1<<31) |
||||
#define BIT_ALLMSK (0xFFFFFFFF) |
||||
|
||||
#define ClearPending(bit) {\ |
||||
rSRCPND = bit;\
|
||||
rINTPND = bit;\
|
||||
rINTPND;\
|
||||
} |
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/* Wait until rINTPND is changed for the case that the ISR is very short. */ |
||||
#endif /*__S3C2400_H__*/ |
||||
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Reference in new issue