From 2da6d39e2689faa32e2eb9624608e5d3d73cdc3d Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 19 Sep 2018 13:56:27 +0200 Subject: [PATCH 1/5] ARM: dts: rmobile: Reinstate missing i2c6 on Porter The I2C6 is used to communicate with the PMIC and it was removed during DT sync with Linux 4.17. Reinstate it. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- arch/arm/dts/r8a7791-porter.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/dts/r8a7791-porter.dts b/arch/arm/dts/r8a7791-porter.dts index f2d5723..fa9a57d 100644 --- a/arch/arm/dts/r8a7791-porter.dts +++ b/arch/arm/dts/r8a7791-porter.dts @@ -372,6 +372,11 @@ clock-frequency = <400000>; }; +&i2c6 { + status = "okay"; + clock-frequency = <400000>; +}; + &sata0 { status = "okay"; }; From 6f031302a0f8ab99d2a51cd66f3fb69782496ed7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 19 Sep 2018 16:33:09 +0200 Subject: [PATCH 2/5] ARM: rmobile: Repair TMU clock on Gen2 The CPfi/4 is derived from XTAL clock and is not fixed. Undo the previous commit 7984ac8d1635aebd11175c96b07f937a39f0384d. Signed-off-by: Marek Vasut --- include/configs/rcar-gen2-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index 01583f8..d606da8 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -60,6 +60,6 @@ #define CONFIG_TMU_TIMER #define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ -#define CONFIG_SYS_TIMER_RATE (32500000 / 4) /* CP/4 */ +#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 8) #endif /* __RCAR_GEN2_COMMON_H */ From c1ec34763811d2465c030bfa2fa8e240b36d60ce Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 2 Oct 2018 21:42:49 +0200 Subject: [PATCH 3/5] ARM: rmobile: Mark 4-64GiB as DRAM on Gen3 Mark area 0x1_0000_0000 - 0x10_0000_0000 as DRAM on Gen3 as the chip is capable of addressing that and U-Boot can make use of it. This patch prevents exception when accessing those areas. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- arch/arm/mach-rmobile/memmap-gen3.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-rmobile/memmap-gen3.c b/arch/arm/mach-rmobile/memmap-gen3.c index 57a2f88..92c8f2e 100644 --- a/arch/arm/mach-rmobile/memmap-gen3.c +++ b/arch/arm/mach-rmobile/memmap-gen3.c @@ -30,6 +30,12 @@ static struct mm_region gen3_mem_map[] = { PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { + .virt = 0x100000000UL, + .phys = 0x100000000UL, + .size = 0xf00000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { /* List terminator */ 0, } From 6cfc3d664ed688e1a10834766776ffb450f09ce4 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 2 Oct 2018 22:31:47 +0200 Subject: [PATCH 4/5] phy: rcar: Add R-Car Gen3 PHY driver Add a PHY driver for the R-Car Gen3 which allows configuring USB OTG PHY on Gen3 into host mode and toggles VBUS in case a dedicated regulator is present. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- drivers/phy/Kconfig | 8 +++ drivers/phy/Makefile | 1 + drivers/phy/phy-rcar-gen3.c | 161 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 170 insertions(+) create mode 100644 drivers/phy/phy-rcar-gen3.c diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index bcc8e22..14d82b9 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -118,6 +118,14 @@ config PHY_RCAR_GEN2 PHY connected to USBHS module, PCI EHCI module and USB3.0 module and allows configuring the module multiplexing. +config PHY_RCAR_GEN3 + tristate "Renesas R-Car Gen3 USB PHY" + depends on PHY && RCAR_GEN3 && CLK && DM_REGULATOR + default y if RCAR_GEN3 + help + Support for the Renesas R-Car Gen3 USB PHY. This driver operates the + PHY connected to EHCI USB module and controls USB OTG operation. + config PHY_STM32_USBPHYC tristate "STMicroelectronics STM32 SoC USB HS PHY driver" depends on PHY && ARCH_STM32MP diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 1e1e4ca..8030d59 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o +obj-$(CONFIG_PHY_RCAR_GEN3) += phy-rcar-gen3.o obj-$(CONFIG_PHY_STM32_USBPHYC) += phy-stm32-usbphyc.o obj-$(CONFIG_MESON_GXL_USB_PHY) += meson-gxl-usb2.o meson-gxl-usb3.o obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o diff --git a/drivers/phy/phy-rcar-gen3.c b/drivers/phy/phy-rcar-gen3.c new file mode 100644 index 0000000..b662935 --- /dev/null +++ b/drivers/phy/phy-rcar-gen3.c @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Renesas RCar Gen3 USB PHY driver + * + * Copyright (C) 2018 Marek Vasut + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* USB2.0 Host registers (original offset is +0x200) */ +#define USB2_INT_ENABLE 0x000 +#define USB2_USBCTR 0x00c +#define USB2_SPD_RSM_TIMSET 0x10c +#define USB2_OC_TIMSET 0x110 +#define USB2_COMMCTRL 0x600 +#define USB2_OBINTSTA 0x604 +#define USB2_OBINTEN 0x608 +#define USB2_VBCTRL 0x60c +#define USB2_LINECTRL1 0x610 +#define USB2_ADPCTRL 0x630 + +/* USBCTR */ +#define USB2_USBCTR_PLL_RST BIT(1) + +/* SPD_RSM_TIMSET */ +#define USB2_SPD_RSM_TIMSET_INIT 0x014e029b + +/* OC_TIMSET */ +#define USB2_OC_TIMSET_INIT 0x000209ab + +/* COMMCTRL */ +#define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */ + +/* LINECTRL1 */ +#define USB2_LINECTRL1_DP_RPD BIT(18) +#define USB2_LINECTRL1_DM_RPD BIT(16) + +/* ADPCTRL */ +#define USB2_ADPCTRL_DRVVBUS BIT(4) + +struct rcar_gen3_phy { + fdt_addr_t regs; + struct clk clk; + struct udevice *vbus_supply; +}; + +static int rcar_gen3_phy_phy_init(struct phy *phy) +{ + struct rcar_gen3_phy *priv = dev_get_priv(phy->dev); + + /* Initialize USB2 part */ + writel(0, priv->regs + USB2_INT_ENABLE); + writel(USB2_SPD_RSM_TIMSET_INIT, priv->regs + USB2_SPD_RSM_TIMSET); + writel(USB2_OC_TIMSET_INIT, priv->regs + USB2_OC_TIMSET); + + setbits_le32(priv->regs + USB2_LINECTRL1, + USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD); + + clrbits_le32(priv->regs + USB2_COMMCTRL, USB2_COMMCTRL_OTG_PERI); + + setbits_le32(priv->regs + USB2_ADPCTRL, USB2_ADPCTRL_DRVVBUS); + + return 0; +} + +static int rcar_gen3_phy_phy_power_on(struct phy *phy) +{ + struct rcar_gen3_phy *priv = dev_get_priv(phy->dev); + int ret; + + if (priv->vbus_supply) { + ret = regulator_set_enable(priv->vbus_supply, true); + if (ret) + return ret; + } + + setbits_le32(priv->regs + USB2_USBCTR, USB2_USBCTR_PLL_RST); + clrbits_le32(priv->regs + USB2_USBCTR, USB2_USBCTR_PLL_RST); + + return 0; +} + +static int rcar_gen3_phy_phy_power_off(struct phy *phy) +{ + struct rcar_gen3_phy *priv = dev_get_priv(phy->dev); + + if (!priv->vbus_supply) + return 0; + + return regulator_set_enable(priv->vbus_supply, false); +} + +static const struct phy_ops rcar_gen3_phy_phy_ops = { + .init = rcar_gen3_phy_phy_init, + .power_on = rcar_gen3_phy_phy_power_on, + .power_off = rcar_gen3_phy_phy_power_off, +}; + +static int rcar_gen3_phy_probe(struct udevice *dev) +{ + struct rcar_gen3_phy *priv = dev_get_priv(dev); + int ret; + + priv->regs = dev_read_addr(dev); + if (priv->regs == FDT_ADDR_T_NONE) + return -EINVAL; + + ret = device_get_supply_regulator(dev, "vbus-supply", + &priv->vbus_supply); + if (ret && ret != -ENOENT) { + pr_err("Failed to get PHY regulator\n"); + return ret; + } + + /* Enable clock */ + ret = clk_get_by_index(dev, 0, &priv->clk); + if (ret) + return ret; + + ret = clk_enable(&priv->clk); + if (ret) + return ret; + + return 0; +} + +static int rcar_gen3_phy_remove(struct udevice *dev) +{ + struct rcar_gen3_phy *priv = dev_get_priv(dev); + + clk_disable(&priv->clk); + clk_free(&priv->clk); + + return 0; +} + +static const struct udevice_id rcar_gen3_phy_of_match[] = { + { .compatible = "renesas,rcar-gen3-usb2-phy", }, + { }, +}; + +U_BOOT_DRIVER(rcar_gen3_phy) = { + .name = "rcar-gen3-phy", + .id = UCLASS_PHY, + .of_match = rcar_gen3_phy_of_match, + .ops = &rcar_gen3_phy_phy_ops, + .probe = rcar_gen3_phy_probe, + .remove = rcar_gen3_phy_remove, + .priv_auto_alloc_size = sizeof(struct rcar_gen3_phy), +}; From 806df252c1dafea0bee40f70f7bae050c07ee0c9 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 2 Oct 2018 22:48:26 +0200 Subject: [PATCH 5/5] ARM: rmobile: Enable PHY framework on Gen3 Enable PHY framework on Gen3, this is required for USB EHCI PHY support. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- arch/arm/mach-rmobile/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-rmobile/Kconfig b/arch/arm/mach-rmobile/Kconfig index fc4b3c3..ac08d6e 100644 --- a/arch/arm/mach-rmobile/Kconfig +++ b/arch/arm/mach-rmobile/Kconfig @@ -11,6 +11,7 @@ config RCAR_32 config RCAR_GEN3 bool "Renesas ARM SoCs R-Car Gen3 (64bit)" select ARM64 + select PHY endchoice