This board has been orphaned for more than 6 months. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>master
Masahiro Yamada
11 years ago
committed by
Tom Rini
parent
dc9617e0ce
commit
1521cdc530
@ -1,2 +0,0 @@ |
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bootscript.c |
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bootscript.image |
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@ -1,12 +0,0 @@ |
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if TARGET_CRAYL1 |
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config SYS_BOARD |
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default "L1" |
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config SYS_VENDOR |
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default "cray" |
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config SYS_CONFIG_NAME |
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default "CRAYL1" |
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endif |
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@ -1,350 +0,0 @@ |
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/*
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* (C) Copyright 2000 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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#include <common.h> |
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#include <asm/processor.h> |
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#include <asm/ppc4xx-i2c.h> |
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#include <command.h> |
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#include <rtc.h> |
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#include <post.h> |
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#include <net.h> |
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#include <malloc.h> |
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#define L1_MEMSIZE (32*1024*1024) |
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|
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/* the std. DHCP stufff */ |
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#define DHCP_ROUTER 3 |
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#define DHCP_NETMASK 1 |
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#define DHCP_BOOTFILE 67 |
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#define DHCP_ROOTPATH 17 |
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#define DHCP_HOSTNAME 12 |
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|
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/* some extras used by CRAY
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* |
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* on the server this looks like: |
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* |
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* option L1-initrd-image code 224 = string; |
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* option L1-initrd-image "/opt/craysv2/craymcu/l1/flash/initrd.image" |
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*/ |
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#define DHCP_L1_INITRD 224 |
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|
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/* new, [better?] way via official vendor-extensions, defining an option
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* space. |
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* on the server this looks like: |
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* |
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* option space CRAYL1; |
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* option CRAYL1.initrd code 3 = string; |
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* ..etc... |
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*/ |
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#define DHCP_VENDOR_SPECX 43 |
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#define DHCP_VX_INITRD 3 |
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#define DHCP_VX_BOOTCMD 4 |
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#define DHCP_VX_BOOTARGS 5 |
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#define DHCP_VX_ROOTDEV 6 |
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#define DHCP_VX_FROMFLASH 7 |
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#define DHCP_VX_BOOTSCRIPT 8 |
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#define DHCP_VX_RCFILE 9 |
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#define DHCP_VX_MAGIC 10 |
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/* Things DHCP server can tellme about. If there's no flash address, then
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* they dont participate in 'update' to flash, and we force their values |
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* back to '0' every boot to be sure to get them fresh from DHCP. Yes, I |
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* know this is a pain... |
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* |
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* If I get no bootfile, boot from flash. If rootpath, use that. If no |
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* rootpath use initrd in flash. |
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*/ |
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typedef struct dhcp_item_s { |
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u8 dhcp_option; |
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u8 dhcp_vendor_option; |
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char *dhcpvalue; |
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char *envname; |
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} dhcp_item_t; |
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static dhcp_item_t Things[] = { |
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{DHCP_ROUTER, 0, NULL, "gateway"}, |
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{DHCP_NETMASK, 0, NULL, "netmask"}, |
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{DHCP_BOOTFILE, 0, NULL, "bootfile"}, |
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{DHCP_ROOTPATH, 0, NULL, "rootpath"}, |
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{DHCP_HOSTNAME, 0, NULL, "hostname"}, |
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{DHCP_L1_INITRD, 0, NULL, "initrd"}, |
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/* and the other way.. */ |
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{DHCP_VENDOR_SPECX, DHCP_VX_INITRD, NULL, "initrd"}, |
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{DHCP_VENDOR_SPECX, DHCP_VX_BOOTCMD, NULL, "bootcmd"}, |
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{DHCP_VENDOR_SPECX, DHCP_VX_FROMFLASH, NULL, "fromflash"}, |
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{DHCP_VENDOR_SPECX, DHCP_VX_BOOTSCRIPT, NULL, "bootscript"}, |
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{DHCP_VENDOR_SPECX, DHCP_VX_RCFILE, NULL, "rcfile"}, |
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{DHCP_VENDOR_SPECX, DHCP_VX_BOOTARGS, NULL, "xbootargs"}, |
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{DHCP_VENDOR_SPECX, DHCP_VX_ROOTDEV, NULL, NULL}, |
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{DHCP_VENDOR_SPECX, DHCP_VX_MAGIC, NULL, NULL} |
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}; |
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#define N_THINGS ((sizeof(Things))/(sizeof(dhcp_item_t))) |
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extern char bootscript[]; |
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/* Here is the boot logic as HUSH script. Overridden by any TFP provided
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* bootscript file. |
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*/ |
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static void init_sdram (void); |
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/* ------------------------------------------------------------------------- */ |
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int board_early_init_f (void) |
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{ |
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/* Running from ROM: global data is still READONLY */ |
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init_sdram (); |
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mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */ |
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mtdcr (UIC0ER, 0x00000000); /* disable all ints */ |
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mtdcr (UIC0CR, 0x00000020); /* set all but FPGA SMI to be non-critical */ |
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mtdcr (UIC0PR, 0xFFFFFFE0); /* set int polarities */ |
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mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */ |
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mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority */ |
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mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */ |
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return 0; |
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} |
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/* ------------------------------------------------------------------------- */ |
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int checkboard (void) |
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{ |
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return (0); |
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} |
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/* ------------------------------------------------------------------------- */ |
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/* ------------------------------------------------------------------------- */ |
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int misc_init_r (void) |
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{ |
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char *s, *e; |
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image_header_t *hdr; |
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time_t timestamp; |
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struct rtc_time tm; |
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char bootcmd[32]; |
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hdr = (image_header_t *) (CONFIG_SYS_MONITOR_BASE - image_get_header_size ()); |
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#if defined(CONFIG_FIT) |
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if (genimg_get_format ((void *)hdr) != IMAGE_FORMAT_LEGACY) { |
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puts ("Non legacy image format not supported\n"); |
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return -1; |
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} |
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#endif |
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timestamp = (time_t)image_get_time (hdr); |
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to_tm (timestamp, &tm); |
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printf ("Welcome to U-Boot on Cray L1. Compiled %4d-%02d-%02d %2d:%02d:%02d (UTC)\n", tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec); |
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#define FACTORY_SETTINGS 0xFFFC0000 |
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if ((s = getenv ("ethaddr")) == NULL) { |
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e = (char *) (FACTORY_SETTINGS); |
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if (*(e + 0) != '0' |
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|| *(e + 1) != '0' |
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|| *(e + 2) != ':' |
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|| *(e + 3) != '4' || *(e + 4) != '0' || *(e + 17) != '\0') { |
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printf ("No valid MAC address in flash location 0x3C0000!\n"); |
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} else { |
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printf ("Factory MAC: %s\n", e); |
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setenv ("ethaddr", e); |
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} |
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} |
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sprintf (bootcmd,"source %X",(unsigned)bootscript); |
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setenv ("bootcmd", bootcmd); |
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return (0); |
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} |
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/* ------------------------------------------------------------------------- */ |
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/* stubs so we can print dates w/o any nvram RTC.*/ |
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int rtc_get (struct rtc_time *tmp) |
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{ |
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return 0; |
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} |
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int rtc_set (struct rtc_time *tmp) |
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{ |
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return 0; |
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} |
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void rtc_reset (void) |
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{ |
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return; |
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} |
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/* ------------------------------------------------------------------------- */ |
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/* Do sdram bank init in C so I can read it..no console to print to yet!
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*/ |
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static void init_sdram (void) |
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{ |
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unsigned long tmp; |
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/* write SDRAM bank 0 register */ |
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mtdcr (SDRAM0_CFGADDR, SDRAM0_B0CR); |
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mtdcr (SDRAM0_CFGDATA, 0x00062001); |
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/* Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR. */ |
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/* To set the appropriate timings, we need to know the SDRAM speed. */ |
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/* We can use the PLB speed since the SDRAM speed is the same as */ |
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/* the PLB speed. The PLB speed is the FBK divider times the */ |
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/* 405GP reference clock, which on the L1 is 25MHz. */ |
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/* Thus, if FBK div is 2, SDRAM is 50MHz; if FBK div is 3, SDRAM is */ |
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/* 150MHz; if FBK is 3, SDRAM is 150MHz. */ |
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/* divisor = ((mfdcr(strap)>> 28) & 0x3); */ |
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/* write SDRAM timing for 100MHz. */ |
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mtdcr (SDRAM0_CFGADDR, SDRAM0_TR); |
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mtdcr (SDRAM0_CFGDATA, 0x0086400D); |
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/* write SDRAM refresh interval register */ |
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mtdcr (SDRAM0_CFGADDR, SDRAM0_RTR); |
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mtdcr (SDRAM0_CFGDATA, 0x05F00000); |
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udelay (200); |
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/* sdram controller.*/ |
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mtdcr (SDRAM0_CFGADDR, SDRAM0_CFG); |
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mtdcr (SDRAM0_CFGDATA, 0x90800000); |
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udelay (200); |
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/* initially, disable ECC on all banks */ |
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udelay (200); |
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mtdcr (SDRAM0_CFGADDR, SDRAM0_ECCCFG); |
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tmp = mfdcr (SDRAM0_CFGDATA); |
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tmp &= 0xff0fffff; |
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mtdcr (SDRAM0_CFGADDR, SDRAM0_ECCCFG); |
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mtdcr (SDRAM0_CFGDATA, tmp); |
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return; |
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} |
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extern int memory_post_test (int flags); |
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int testdram (void) |
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{ |
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unsigned long tmp; |
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uint *pstart = (uint *) 0x00000000; |
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uint *pend = (uint *) L1_MEMSIZE; |
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uint *p; |
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if (getenv_f("booted",NULL,0) <= 0) |
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{ |
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printf ("testdram.."); |
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/*AA*/ |
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for (p = pstart; p < pend; p++) |
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*p = 0xaaaaaaaa; |
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for (p = pstart; p < pend; p++) { |
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if (*p != 0xaaaaaaaa) { |
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printf ("SDRAM test fails at: %08x, was %08x expected %08x\n", |
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(uint) p, *p, 0xaaaaaaaa); |
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return 1; |
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} |
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} |
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/*55*/ |
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for (p = pstart; p < pend; p++) |
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*p = 0x55555555; |
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for (p = pstart; p < pend; p++) { |
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if (*p != 0x55555555) { |
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printf ("SDRAM test fails at: %08x, was %08x expected %08x\n", |
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(uint) p, *p, 0x55555555); |
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return 1; |
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} |
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} |
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/*addr*/ |
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for (p = pstart; p < pend; p++) |
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*p = (unsigned)p; |
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for (p = pstart; p < pend; p++) { |
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if (*p != (unsigned)p) { |
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printf ("SDRAM test fails at: %08x, was %08x expected %08x\n", |
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(uint) p, *p, (uint)p); |
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return 1; |
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} |
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} |
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printf ("Success. "); |
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} |
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printf ("Enable ECC.."); |
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mtdcr (SDRAM0_CFGADDR, SDRAM0_CFG); |
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tmp = (mfdcr (SDRAM0_CFGDATA) & ~0xFFE00000) | 0x90800000; |
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mtdcr (SDRAM0_CFGADDR, SDRAM0_CFG); |
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mtdcr (SDRAM0_CFGDATA, tmp); |
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udelay (600); |
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for (p = (unsigned long) 0; ((unsigned long) p < L1_MEMSIZE); *p++ = 0L) |
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; |
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udelay (400); |
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mtdcr (SDRAM0_CFGADDR, SDRAM0_ECCCFG); |
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tmp = mfdcr (SDRAM0_CFGDATA); |
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tmp |= 0x00800000; |
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mtdcr (SDRAM0_CFGDATA, tmp); |
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udelay (400); |
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printf ("enabled.\n"); |
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return (0); |
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} |
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/* ------------------------------------------------------------------------- */ |
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static u8 *dhcp_env_update (u8 thing, u8 * pop) |
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{ |
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u8 i, oplen; |
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oplen = *(pop + 1); |
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if ((Things[thing].dhcpvalue = malloc (oplen)) == NULL) { |
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printf ("Whoops! failed to malloc space for DHCP thing %s\n", |
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Things[thing].envname); |
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return NULL; |
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} |
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for (i = 0; (i < oplen); i++) |
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if ((*(Things[thing].dhcpvalue + i) = *(pop + 2 + i)) == ' ') |
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break; |
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*(Things[thing].dhcpvalue + i) = '\0'; |
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/* set env. */ |
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if (Things[thing].envname) |
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{ |
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setenv (Things[thing].envname, Things[thing].dhcpvalue); |
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} |
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return ((u8 *)(Things[thing].dhcpvalue)); |
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} |
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/* ------------------------------------------------------------------------- */ |
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u8 *dhcp_vendorex_prep (u8 * e) |
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{ |
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u8 thing; |
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/* ask for the things I want. */ |
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*e++ = 55; /* Parameter Request List */ |
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*e++ = N_THINGS; |
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for (thing = 0; thing < N_THINGS; thing++) |
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*e++ = Things[thing].dhcp_option; |
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*e++ = 255; |
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return e; |
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} |
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/* ------------------------------------------------------------------------- */ |
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/* .. return NULL means it wasnt mine, non-null means I got it..*/ |
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u8 *dhcp_vendorex_proc (u8 * pop) |
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{ |
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u8 oplen, *sub_op, sub_oplen, *retval; |
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u8 thing = 0; |
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retval = NULL; |
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oplen = *(pop + 1); |
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/* if pop is vender spec indicator, there are sub-options. */ |
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if (*pop == DHCP_VENDOR_SPECX) { |
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for (sub_op = pop + 2; |
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oplen && (sub_oplen = *(sub_op + 1)); |
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oplen -= sub_oplen, sub_op += (sub_oplen + 2)) { |
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for (thing = 0; thing < N_THINGS; thing++) { |
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if (*sub_op == Things[thing].dhcp_vendor_option) { |
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if (!(retval = dhcp_env_update (thing, sub_op))) { |
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return NULL; |
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} |
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} |
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} |
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} |
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} else { |
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for (thing = 0; thing < N_THINGS; thing++) { |
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if (*pop == Things[thing].dhcp_option) |
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if (!(retval = dhcp_env_update (thing, pop))) |
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return NULL; |
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} |
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} |
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return (pop); |
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} |
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@ -1,6 +0,0 @@ |
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L1 BOARD |
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#M: David Updegraff <dave@cray.com> |
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S: Orphan (since 2014-03) |
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F: board/cray/L1/ |
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F: include/configs/CRAYL1.h |
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F: configs/CRAYL1_defconfig |
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@ -1,23 +0,0 @@ |
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y = L1.o flash.o
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obj-y += init.o
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obj-y += bootscript.o
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quiet_cmd_awk = AWK $@
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cmd_awk = od -t x1 -v -A x $< | $(AWK) -f $(filter-out $<,$^) > $@
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$(obj)/bootscript.c: $(obj)/bootscript.image $(src)/x2c.awk |
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$(call cmd,awk)
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MKIMAGEFLAGS_bootscript.image := -A ppc -O linux -T script -C none \
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-a 0 -e 0 -n bootscript
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$(obj)/bootscript.image: $(src)/bootscript.hush |
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$(call cmd,mkimage)
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clean-files := bootscript.c bootscript.image
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@ -1,117 +0,0 @@ |
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# $Header$ |
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# hush bootscript for PPCBOOT on L1 |
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# note: all #s are in hex, do _NOT_ prefix it with 0x |
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flash_rfs=ffc00000 |
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flash_krl=fff00000 |
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tftp_addr=100000 |
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tftp2_addr=1000000 |
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|
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if printenv booted |
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then |
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echo already booted before |
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else |
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echo first boot in environment, create and save settings |
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setenv booted OK |
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saveenv |
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fi |
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setenv autoload no |
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# clear out stale env stuff, so we get fresh from dhcp. |
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for setting in initrd fromflash kernel rootfs rootpath |
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do |
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setenv $setting |
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done |
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dhcp |
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# if host provides us with a different bootscript, us it. |
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if printenv bootscript |
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then |
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tftp $tftp_addr $bootcript |
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if imi $tftp_addr |
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then |
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source $tftp_addr |
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fi |
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fi |
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|
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# default base kernel arguments. |
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setenv bootargs $xbootargs devfs=mount ip=$ipaddr:$serverip:$gatewayip:$netmask:L1:eth0:off wdt=120 |
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|
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# Have a kernel in flash? |
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if imi $flash_krl |
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then |
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echo ok kernel to boot from $flash_krl |
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setenv kernel $flash_krl |
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else |
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echo no kernel to boot from $flash_krl, need tftp |
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fi |
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# Have a rootfs in flash? |
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echo test for SQUASHfs at $flash_rfs |
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if imi $flash_rfs |
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then |
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echo appears to be a good initrd image at base of flash OK |
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setenv rootfs $flash_rfs |
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else |
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echo no image at base of flash, need nfsroot or initrd |
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fi |
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# I boot from flash if told to and I can. |
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if printenv fromflash && printenv kernel && printenv rootfs |
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then |
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echo booting entirely from flash |
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setenv bootargs root=/dev/ram0 rw $bootargs |
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bootm $kernel $rootfs |
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echo oh no failed so I try some other stuff |
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fi |
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|
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# TFTP down a kernel |
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if printenv bootfile |
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then |
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tftp $tftp_addr $bootfile |
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setenv kernel $tftp_addr |
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echo I will boot the TFTP kernel |
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else |
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if printenv kernel |
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then |
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echo no bootfile specified, will use one from flash |
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else |
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setenv bootfile /opt/crayx1/craymcu/l1/flash/linux.image |
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echo OH NO! we have no bootfile,nor flash kernel! try default: $bootfile |
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tftp $tftp_addr $bootfile |
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setenv kernel $tftp_addr |
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fi |
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fi |
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|
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# the rootfs. |
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if printenv rootpath |
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then |
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echo rootpath is $rootpath |
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if printenv initrd |
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then |
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echo initrd is also specified, so use $initrd |
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tftp $tftp2_addr $initrd |
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setenv bootargs root=/dev/ram0 rw cwsroot=$serverip:$rootpath $bootargs |
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bootm $kernel $tftp2_addr |
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else |
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echo initrd is not specified, so use NFSROOT $rootpat |
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setenv bootargs root=/dev/nfs ro nfsroot=$serverip:$rootpath $bootargs |
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bootm $kernel |
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fi |
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else |
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echo we have no rootpath check for one in flash |
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if printenv rootfs |
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then |
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echo I will use the one in flash |
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setenv bootargs root=/dev/mtdblock/0 ro rootfstype=squashfs $bootargs |
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bootm $kernel |
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else |
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setenv rootpath /export/crayl1 |
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echo OH NO! we have no rootpath,nor flash kernel! try default: $rootpath |
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setenv bootargs root=/dev/mtdblock/0 ro rootfstype=squashfs $bootargs |
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bootm $kernel |
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fi |
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fi |
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reset |
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@ -1,451 +0,0 @@ |
||||
/*
|
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* (C) Copyright 2000 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
/*
|
||||
* Modified 4/5/2001 |
||||
* Wait for completion of each sector erase command issued |
||||
* 4/5/2001 |
||||
* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com |
||||
*/ |
||||
|
||||
/*
|
||||
* Modified July 20, 2001 |
||||
* Strip down to support ONLY the AMD29F032B. |
||||
* Dave Updegraff - Cray, Inc. dave@cray.com |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/ppc4xx.h> |
||||
#include <asm/processor.h> |
||||
|
||||
/* The flash chip we use... */ |
||||
#define AMD_ID_F032B 0x41 /* 29F032B ID 32 Mbit,64 64Kx8 sectors */ |
||||
#define FLASH_AM320B 0x0009 |
||||
|
||||
|
||||
flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Functions |
||||
*/ |
||||
static ulong flash_get_size (vu_long *addr, flash_info_t *info); |
||||
static int write_word (flash_info_t *info, ulong dest, ulong data); |
||||
static void flash_get_offsets (ulong base, flash_info_t *info); |
||||
|
||||
#define ADDR0 0x5555 |
||||
#define ADDR1 0x2aaa |
||||
#define FLASH_WORD_SIZE unsigned char |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
unsigned long flash_init (void) |
||||
{ |
||||
unsigned long size_b0, size_b1; |
||||
int i; |
||||
|
||||
/* Init: no FLASHes known */ |
||||
for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { |
||||
flash_info[i].flash_id = FLASH_UNKNOWN; |
||||
} |
||||
|
||||
/* Static FLASH Bank configuration here - FIXME XXX */ |
||||
|
||||
size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]); |
||||
|
||||
if (flash_info[0].flash_id == FLASH_UNKNOWN) { |
||||
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", |
||||
size_b0, size_b0<<20); |
||||
} |
||||
|
||||
/* Only one bank */ |
||||
if (CONFIG_SYS_MAX_FLASH_BANKS == 1) |
||||
{ |
||||
/* Setup offsets */ |
||||
flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]); |
||||
|
||||
#if 0 |
||||
/* Monitor protection ON by default */ |
||||
(void)flash_protect(FLAG_PROTECT_SET, |
||||
FLASH_BASE0_PRELIM, |
||||
FLASH_BASE0_PRELIM+monitor_flash_len-1, |
||||
&flash_info[0]); |
||||
#endif |
||||
size_b1 = 0 ; |
||||
flash_info[0].size = size_b0; |
||||
} |
||||
|
||||
return (size_b0 + size_b1); |
||||
} |
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
static void flash_get_offsets (ulong base, flash_info_t *info) |
||||
{ |
||||
int i; |
||||
|
||||
/* set up sector start address table */ |
||||
for (i = 0; i < info->sector_count; i++) |
||||
info->start[i] = base + (i * 0x00010000); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
void flash_print_info (flash_info_t *info) |
||||
{ |
||||
int i; |
||||
int k; |
||||
int size; |
||||
int erased; |
||||
volatile unsigned long *flash; |
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("missing or unknown FLASH type\n"); |
||||
return; |
||||
} |
||||
|
||||
switch (info->flash_id & FLASH_VENDMASK) { |
||||
case FLASH_MAN_AMD: printf ("AMD "); break; |
||||
default: printf ("Unknown Vendor "); break; |
||||
} |
||||
|
||||
switch (info->flash_id & FLASH_TYPEMASK) { |
||||
case FLASH_AM320B:printf ("AM29F032B (32 Mbit 64x64KB uniform sectors)\n"); |
||||
break; |
||||
default: printf ("Unknown Chip Type\n"); |
||||
break; |
||||
} |
||||
|
||||
printf (" Size: %ld KB in %d Sectors\n", |
||||
info->size >> 10, info->sector_count); |
||||
|
||||
printf (" Sector Start Addresses:"); |
||||
for (i=0; i<info->sector_count; ++i) { |
||||
/*
|
||||
* Check if whole sector is erased |
||||
*/ |
||||
if (i != (info->sector_count-1)) |
||||
size = info->start[i+1] - info->start[i]; |
||||
else |
||||
size = info->start[0] + info->size - info->start[i]; |
||||
erased = 1; |
||||
flash = (volatile unsigned long *)info->start[i]; |
||||
size = size >> 2; /* divide by 4 for longword access */ |
||||
for (k=0; k<size; k++) |
||||
{ |
||||
if (*flash++ != 0xffffffff) |
||||
{ |
||||
erased = 0; |
||||
break; |
||||
} |
||||
} |
||||
|
||||
if ((i % 5) == 0) |
||||
printf ("\n "); |
||||
|
||||
printf (" %08lX%s%s", |
||||
info->start[i], |
||||
erased ? " E" : " ", |
||||
info->protect[i] ? "RO " : " " |
||||
); |
||||
} |
||||
printf ("\n"); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
/*
|
||||
* The following code cannot be run from FLASH! |
||||
*/ |
||||
static ulong flash_get_size (vu_long *addr, flash_info_t *info) |
||||
{ |
||||
short i; |
||||
FLASH_WORD_SIZE value; |
||||
ulong base = (ulong)addr; |
||||
volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr; |
||||
|
||||
/* Write auto select command: read Manufacturer ID */ |
||||
addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090; |
||||
|
||||
value = addr2[0]; |
||||
|
||||
switch (value) { |
||||
case (FLASH_WORD_SIZE)AMD_MANUFACT: |
||||
info->flash_id = FLASH_MAN_AMD; |
||||
break; |
||||
default: |
||||
info->flash_id = FLASH_UNKNOWN; |
||||
info->sector_count = 0; |
||||
info->size = 0; |
||||
return (0); /* no or unknown flash */ |
||||
} |
||||
|
||||
value = addr2[1]; /* device ID */ |
||||
|
||||
switch (value) { |
||||
case (FLASH_WORD_SIZE)AMD_ID_F032B: |
||||
info->flash_id += FLASH_AM320B; |
||||
info->sector_count = 64; |
||||
info->size = 0x0400000; /* => 4 MB */ |
||||
break; |
||||
default: |
||||
info->flash_id = FLASH_UNKNOWN; |
||||
return (0); /* => no or unknown flash */ |
||||
|
||||
} |
||||
|
||||
/* set up sector start address table */ |
||||
for (i = 0; i < info->sector_count; i++) |
||||
info->start[i] = base + (i * 0x00010000); |
||||
|
||||
/* check for protected sectors */ |
||||
for (i = 0; i < info->sector_count; i++) { |
||||
/* read sector protection at sector address, (A7 .. A0) = 0x02 */ |
||||
/* D0 = 1 if protected */ |
||||
addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); |
||||
info->protect[i] = addr2[2] & 1; |
||||
} |
||||
|
||||
/*
|
||||
* Prevent writes to uninitialized FLASH. |
||||
*/ |
||||
if (info->flash_id != FLASH_UNKNOWN) { |
||||
addr2 = (FLASH_WORD_SIZE *)info->start[0]; |
||||
*addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ |
||||
} |
||||
|
||||
return (info->size); |
||||
} |
||||
|
||||
int wait_for_DQ7(flash_info_t *info, int sect) |
||||
{ |
||||
ulong start, now, last; |
||||
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]); |
||||
|
||||
start = get_timer (0); |
||||
last = start; |
||||
while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { |
||||
if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { |
||||
printf ("Timeout\n"); |
||||
return -1; |
||||
} |
||||
/* show that we're waiting */ |
||||
if ((now - last) > 1000) { /* every second */ |
||||
putc ('.'); |
||||
last = now; |
||||
} |
||||
} |
||||
return 0; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
int flash_erase (flash_info_t *info, int s_first, int s_last) |
||||
{ |
||||
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]); |
||||
volatile FLASH_WORD_SIZE *addr2; |
||||
int flag, prot, sect; |
||||
|
||||
if ((s_first < 0) || (s_first > s_last)) { |
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("- missing\n"); |
||||
} else { |
||||
printf ("- no sectors to erase\n"); |
||||
} |
||||
return 1; |
||||
} |
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("Can't erase unknown flash type - aborted\n"); |
||||
return 1; |
||||
} |
||||
|
||||
prot = 0; |
||||
for (sect=s_first; sect<=s_last; ++sect) { |
||||
if (info->protect[sect]) { |
||||
prot++; |
||||
} |
||||
} |
||||
|
||||
if (prot) { |
||||
printf ("- Warning: %d protected sectors will not be erased!\n", |
||||
prot); |
||||
} else { |
||||
printf ("\n"); |
||||
} |
||||
|
||||
/* Disable interrupts which might cause a timeout here */ |
||||
flag = disable_interrupts(); |
||||
|
||||
/* Start erase on unprotected sectors */ |
||||
for (sect = s_first; sect<=s_last; sect++) { |
||||
if (info->protect[sect] == 0) { /* not protected */ |
||||
addr2 = (FLASH_WORD_SIZE *)(info->start[sect]); |
||||
printf("Erasing sector %p\n", addr2); |
||||
|
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */ |
||||
/*
|
||||
* Wait for each sector to complete, it's more |
||||
* reliable. According to AMD Spec, you must |
||||
* issue all erase commands within a specified |
||||
* timeout. This has been seen to fail, especially |
||||
* if printf()s are included (for debug)!! |
||||
*/ |
||||
wait_for_DQ7(info, sect); |
||||
} |
||||
} |
||||
|
||||
/* re-enable interrupts if necessary */ |
||||
if (flag) |
||||
enable_interrupts(); |
||||
|
||||
/* wait at least 80us - let's wait 1 ms */ |
||||
udelay (1000); |
||||
|
||||
/* reset to read mode */ |
||||
addr = (FLASH_WORD_SIZE *)info->start[0]; |
||||
addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ |
||||
|
||||
printf (" done\n"); |
||||
return 0; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash, returns: |
||||
* 0 - OK |
||||
* 1 - write timeout |
||||
* 2 - Flash not erased |
||||
*/ |
||||
|
||||
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) |
||||
{ |
||||
ulong cp, wp, data; |
||||
int i, l, rc; |
||||
|
||||
wp = (addr & ~3); /* get lower word aligned address */ |
||||
|
||||
/*
|
||||
* handle unaligned start bytes |
||||
*/ |
||||
if ((l = addr - wp) != 0) { |
||||
data = 0; |
||||
for (i=0, cp=wp; i<l; ++i, ++cp) { |
||||
data = (data << 8) | (*(uchar *)cp); |
||||
} |
||||
for (; i<4 && cnt>0; ++i) { |
||||
data = (data << 8) | *src++; |
||||
--cnt; |
||||
++cp; |
||||
} |
||||
for (; cnt==0 && i<4; ++i, ++cp) { |
||||
data = (data << 8) | (*(uchar *)cp); |
||||
} |
||||
|
||||
if ((rc = write_word(info, wp, data)) != 0) { |
||||
return (rc); |
||||
} |
||||
wp += 4; |
||||
} |
||||
|
||||
/*
|
||||
* handle word aligned part |
||||
*/ |
||||
while (cnt >= 4) { |
||||
data = 0; |
||||
for (i=0; i<4; ++i) { |
||||
data = (data << 8) | *src++; |
||||
} |
||||
if ((rc = write_word(info, wp, data)) != 0) { |
||||
return (rc); |
||||
} |
||||
wp += 4; |
||||
cnt -= 4; |
||||
} |
||||
|
||||
if (cnt == 0) { |
||||
return (0); |
||||
} |
||||
|
||||
/*
|
||||
* handle unaligned tail bytes |
||||
*/ |
||||
data = 0; |
||||
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { |
||||
data = (data << 8) | *src++; |
||||
--cnt; |
||||
} |
||||
for (; i<4; ++i, ++cp) { |
||||
data = (data << 8) | (*(uchar *)cp); |
||||
} |
||||
|
||||
return (write_word(info, wp, data)); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Write a word to Flash, returns: |
||||
* 0 - OK |
||||
* 1 - write timeout |
||||
* 2 - Flash not erased |
||||
*/ |
||||
static int write_word (flash_info_t *info, ulong dest, ulong data) |
||||
{ |
||||
volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]); |
||||
volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; |
||||
volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; |
||||
ulong start; |
||||
int flag; |
||||
int i; |
||||
|
||||
/* Check if Flash is (sufficiently) erased */ |
||||
if ((*((volatile FLASH_WORD_SIZE *)dest) & |
||||
(FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) { |
||||
return (2); |
||||
} |
||||
/* Disable interrupts which might cause a timeout here */ |
||||
flag = disable_interrupts(); |
||||
|
||||
for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) |
||||
{ |
||||
addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0; |
||||
|
||||
dest2[i] = data2[i]; |
||||
|
||||
/* re-enable interrupts if necessary */ |
||||
if (flag) |
||||
enable_interrupts(); |
||||
|
||||
/* data polling for D7 */ |
||||
start = get_timer (0); |
||||
while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != |
||||
(data2[i] & (FLASH_WORD_SIZE)0x00800080)) { |
||||
if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { |
||||
return (1); |
||||
} |
||||
} |
||||
} |
||||
|
||||
return (0); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
@ -1,117 +0,0 @@ |
||||
/* |
||||
* SPDX-License-Identifier: GPL-2.0 IBM-pibs |
||||
*/ |
||||
|
||||
/*----------------------------------------------------------------------------- */ |
||||
/* Function: ext_bus_cntlr_init */ |
||||
/* Description: Initializes the External Bus Controller for the external */ |
||||
/* peripherals. IMPORTANT: For pass1 this code must run from */ |
||||
/* cache since you can not reliably change a peripheral banks */ |
||||
/* timing register (pbxap) while running code from that bank. */ |
||||
/* For ex., since we are running from ROM on bank 0, we can NOT */ |
||||
/* execute the code that modifies bank 0 timings from ROM, so */ |
||||
/* we run it from cache. */ |
||||
/* Bank 0 - Flash and SRAM */ |
||||
/* Bank 1 - NVRAM/RTC */ |
||||
/* Bank 2 - Keyboard/Mouse controller */ |
||||
/* Bank 3 - IR controller */ |
||||
/* Bank 4 - not used */ |
||||
/* Bank 5 - not used */ |
||||
/* Bank 6 - not used */ |
||||
/* Bank 7 - FPGA registers */ |
||||
/*-----------------------------------------------------------------------------#include <config.h> */ |
||||
#include <asm/ppc4xx.h> |
||||
|
||||
#include <ppc_asm.tmpl> |
||||
#include <ppc_defs.h> |
||||
|
||||
#include <asm/cache.h> |
||||
#include <asm/mmu.h> |
||||
|
||||
/* CRAY - L1: only nominally a 'walnut', since ext.Bus.Cntlr is all empty */ |
||||
/* except for #1 which we use for DMA'ing to IOCA-like things, so the */ |
||||
/* control registers to set that up are determined by what we've */ |
||||
/* empirically discovered work there. */ |
||||
|
||||
.globl ext_bus_cntlr_init
|
||||
ext_bus_cntlr_init: |
||||
mflr r4 /* save link register */ |
||||
bl ..getAddr |
||||
..getAddr: |
||||
mflr r3 /* get address of ..getAddr */ |
||||
mtlr r4 /* restore link register */ |
||||
addi r4,0,14 /* set ctr to 10; used to prefetch */
|
||||
mtctr r4 /* 10 cache lines to fit this function */ |
||||
/* in cache (gives us 8x10=80 instrctns) */ |
||||
..ebcloop: |
||||
icbt r0,r3 /* prefetch cache line for addr in r3 */ |
||||
addi r3,r3,32 /* move to next cache line */ |
||||
bdnz ..ebcloop /* continue for 10 cache lines */ |
||||
|
||||
/*------------------------------------------------------------------- */ |
||||
/* Delay to ensure all accesses to ROM are complete before changing */ |
||||
/* bank 0 timings. 200usec should be enough. */ |
||||
/* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */ |
||||
/*------------------------------------------------------------------- */ |
||||
addis r3,0,0x0 |
||||
ori r3,r3,0xA000 /* ensure 200usec have passed since reset */ |
||||
mtctr r3 |
||||
..spinlp: |
||||
bdnz ..spinlp /* spin loop */ |
||||
|
||||
|
||||
/*---------------------------------------------------------------------- */ |
||||
/* Peripheral Bank 0 (Flash) initialization */ |
||||
/*---------------------------------------------------------------------- */ |
||||
/* 0x7F8FFE80 slowest boot */ |
||||
addi r4,0,PB1AP |
||||
mtdcr EBC0_CFGADDR,r4 |
||||
addis r4,0,0x9B01 |
||||
ori r4,r4,0x5480 |
||||
mtdcr EBC0_CFGDATA,r4 |
||||
|
||||
addi r4,0,PB0CR |
||||
mtdcr EBC0_CFGADDR,r4 |
||||
addis r4,0,0xFFC5 /* BAS=0xFFC,BS=0x4(4MB),BU=0x3(R/W), */ |
||||
ori r4,r4,0x8000 /* BW=0x0( 8 bits) */ |
||||
mtdcr EBC0_CFGDATA,r4 |
||||
|
||||
blr |
||||
|
||||
/*---------------------------------------------------------------------- */ |
||||
/* Peripheral Bank 1 (NVRAM/RTC) initialization */ |
||||
/* CRAY:the L1 has NOT this bank, it is tied to SV2/IOCA/etc/ instead */ |
||||
/* and we do DMA on it. The ConfigurationRegister part is threfore */ |
||||
/* almost arbitrary, except that our linux driver needs to know the */ |
||||
/* address, but it can query, it.. */ |
||||
/* */ |
||||
/* The AccessParameter is CRITICAL, */ |
||||
/* thouch, since it needs to agree with the electrical timings on the */ |
||||
/* IOCA parallel interface. That value is: 0x0185,4380 */ |
||||
/* BurstModeEnable BME=0 */ |
||||
/* TransferWait TWT=3 */ |
||||
/* ChipSelectOnTiming CSN=1 */ |
||||
/* OutputEnableOnTimimg OEN=1 */ |
||||
/* WriteByteEnableOnTiming WBN=1 */ |
||||
/* WriteByteEnableOffTiming WBF=0 */ |
||||
/* TransferHold TH=1 */ |
||||
/* ReadyEnable RE=1 */ |
||||
/* SampleOnReady SOR=1 */ |
||||
/* ByteEnableMode BEM=0 */ |
||||
/* ParityEnable PEN=0 */ |
||||
/* all reserved bits=0 */ |
||||
/*---------------------------------------------------------------------- */ |
||||
/*---------------------------------------------------------------------- */ |
||||
addi r4,0,PB1AP |
||||
mtdcr EBC0_CFGADDR,r4 |
||||
addis r4,0,0x0185 /* hiword */ |
||||
ori r4,r4,0x4380 /* loword */ |
||||
mtdcr EBC0_CFGDATA,r4 |
||||
|
||||
addi r4,0,PB1CR |
||||
mtdcr EBC0_CFGADDR,r4 |
||||
addis r4,0,0xF001 /* BAS=0xF00,BS=0x0(1MB),BU=0x3(R/W), */ |
||||
ori r4,r4,0x8000 /* BW=0x0( 8 bits) */ |
||||
mtdcr EBC0_CFGDATA,r4 |
||||
|
||||
blr |
||||
@ -1,30 +0,0 @@ |
||||
# master confi.mk |
||||
echo "CROSS_COMPILE = powerpc-linux-" >>include/config.mk |
||||
|
||||
# patch the examples/Makefile to ignore return value from OBJCOPY |
||||
sed -e 's/$(OBJCOPY)/-&/' < examples/Makefile > examples/makefile |
||||
|
||||
# add a built target for mkimage on the target architecture |
||||
sed -e 's/^all:.*$/all: .depend envcrc mkimage mkimage.ppc/' < tools/Makefile > tools/makefile |
||||
|
||||
cat <<EOF >>tools/makefile |
||||
mkimage.ppc : mkimage.o.ppc crc32.o.ppc |
||||
powerpc-linux-gcc -msoft-float -Wall -Wstrict-prototypes -o \$@ \$^ |
||||
powerpc-linux-strip $@ |
||||
|
||||
XFLAGS="-D__KERNEL__ -I../include -DCONFIG_4xx -Wall -Wstict-prototypes" |
||||
mkimage.o.ppc: mkimage.c |
||||
powerpc-linux-gcc -msoft-float -Wall -I../include -c -o \$@ \$^ |
||||
|
||||
crc32.o.ppc: crc32.c |
||||
powerpc-linux-gcc -msoft-float -Wall -I../include -c -o \$@ \$^ |
||||
|
||||
EOF |
||||
|
||||
# make an image by default out of the u-boot image |
||||
sed -e 's/^all:.*$/all: u-boot.image /' < Makefile > makefile |
||||
cat <<EOF >>makefile |
||||
u-boot.image: u-boot.bin |
||||
tools/mkimage -A ppc -O linux -T firmware -C none -a 0 -e 0 -n U-Boot -d \$^ \$@ |
||||
|
||||
EOF |
||||
@ -1,121 +0,0 @@ |
||||
/* |
||||
* (C) Copyright 2000 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
OUTPUT_ARCH(powerpc) |
||||
/* Do we need any of these for elf? |
||||
__DYNAMIC = 0; */ |
||||
SECTIONS |
||||
{ |
||||
/* Read-only sections, merged into text segment: */ |
||||
. = + SIZEOF_HEADERS; |
||||
.interp : { *(.interp) } |
||||
.hash : { *(.hash) } |
||||
.dynsym : { *(.dynsym) } |
||||
.dynstr : { *(.dynstr) } |
||||
.rel.text : { *(.rel.text) } |
||||
.rela.text : { *(.rela.text) } |
||||
.rel.data : { *(.rel.data) } |
||||
.rela.data : { *(.rela.data) } |
||||
.rel.rodata : { *(.rel.rodata) } |
||||
.rela.rodata : { *(.rela.rodata) } |
||||
.rel.got : { *(.rel.got) } |
||||
.rela.got : { *(.rela.got) } |
||||
.rel.ctors : { *(.rel.ctors) } |
||||
.rela.ctors : { *(.rela.ctors) } |
||||
.rel.dtors : { *(.rel.dtors) } |
||||
.rela.dtors : { *(.rela.dtors) } |
||||
.rel.bss : { *(.rel.bss) } |
||||
.rela.bss : { *(.rela.bss) } |
||||
.rel.plt : { *(.rel.plt) } |
||||
.rela.plt : { *(.rela.plt) } |
||||
.init : { *(.init) } |
||||
.plt : { *(.plt) } |
||||
.text : |
||||
{ |
||||
/* WARNING - the following is hand-optimized to fit within */ |
||||
/* the sector layout of our flash chips! XXX FIXME XXX */ |
||||
|
||||
mpc8xx/start.o (.text) |
||||
common/dlmalloc.o (.text) |
||||
lib/vsprintf.o (.text) |
||||
lib/crc32.o (.text) |
||||
arch/powerpc/lib/extable.o (.text) |
||||
|
||||
common/env_embedded.o(.text) |
||||
|
||||
*(.text) |
||||
*(.got1) |
||||
} |
||||
_etext = .; |
||||
PROVIDE (etext = .); |
||||
.rodata : |
||||
{ |
||||
*(.rodata) |
||||
*(.rodata1) |
||||
*(.rodata.str1.4) |
||||
*(.eh_frame) |
||||
} |
||||
.fini : { *(.fini) } =0 |
||||
.ctors : { *(.ctors) } |
||||
.dtors : { *(.dtors) } |
||||
|
||||
/* Read-write section, merged into data segment: */ |
||||
. = (. + 0x0FFF) & 0xFFFFF000; |
||||
_erotext = .; |
||||
PROVIDE (erotext = .); |
||||
.reloc : |
||||
{ |
||||
*(.got) |
||||
_GOT2_TABLE_ = .; |
||||
*(.got2) |
||||
_FIXUP_TABLE_ = .; |
||||
*(.fixup) |
||||
} |
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; |
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2; |
||||
|
||||
.data : |
||||
{ |
||||
*(.data) |
||||
*(.data1) |
||||
*(.sdata) |
||||
*(.sdata2) |
||||
*(.dynamic) |
||||
CONSTRUCTORS |
||||
} |
||||
_edata = .; |
||||
PROVIDE (edata = .); |
||||
|
||||
|
||||
. = ALIGN(4); |
||||
.u_boot_list : { |
||||
KEEP(*(SORT(.u_boot_list*))); |
||||
} |
||||
|
||||
|
||||
__start___ex_table = .; |
||||
__ex_table : { *(__ex_table) } |
||||
__stop___ex_table = .; |
||||
|
||||
. = ALIGN(4096); |
||||
__init_begin = .; |
||||
.text.init : { *(.text.init) } |
||||
.data.init : { *(.data.init) } |
||||
. = ALIGN(4096); |
||||
__init_end = .; |
||||
|
||||
__bss_start = .; |
||||
.bss : |
||||
{ |
||||
*(.sbss) *(.scommon) |
||||
*(.dynbss) |
||||
*(.bss) |
||||
*(COMMON) |
||||
} |
||||
__bss_end = . ; |
||||
PROVIDE (end = .); |
||||
} |
||||
@ -1,6 +0,0 @@ |
||||
#!/bin/awk |
||||
BEGIN { print "unsigned char bootscript[] = { \n"} |
||||
{ for (i = 2; i <= NF ; i++ ) printf "0x"$i"," |
||||
print "" |
||||
} |
||||
END { print "\n};\n" } |
||||
@ -1,3 +0,0 @@ |
||||
CONFIG_PPC=y |
||||
CONFIG_4xx=y |
||||
CONFIG_TARGET_CRAYL1=y |
||||
@ -1,228 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2000-2004 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* David Updegraff, Cray, Inc. dave@cray.com: our 405 is walnut-lite.. |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
/*
|
||||
* board/config.h - configuration options, board specific |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
|
||||
#define CONFIG_CRAYL1 |
||||
/*
|
||||
* High Level Configuration Options |
||||
* (easy to change) |
||||
*/ |
||||
|
||||
#define CONFIG_405GP 1 /* This is a PPC405 CPU */ |
||||
|
||||
/*
|
||||
* Note: I make an "image" from U-Boot itself, which prefixes 0x40 |
||||
* bytes of header info, hence start address is thus shifted. |
||||
*/ |
||||
#define CONFIG_SYS_TEXT_BASE 0xFFFD0040 |
||||
|
||||
#define CONFIG_SYS_CLK_FREQ 25000000 |
||||
#define CONFIG_BAUDRATE 9600 |
||||
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ |
||||
|
||||
#define CONFIG_PPC4xx_EMAC |
||||
#define CONFIG_MII 1 /* MII PHY management */ |
||||
#define CONFIG_PHY_ADDR 1 /* PHY address; handling of ENET */ |
||||
#define CONFIG_BOARD_EARLY_INIT_F 1 /* early setup for 405gp */ |
||||
#define CONFIG_MISC_INIT_R 1 /* so that a misc_init_r() is called */ |
||||
|
||||
#define CONFIG_CONS_INDEX 1 /* Use UART0 */ |
||||
#define CONFIG_SYS_NS16550 |
||||
#define CONFIG_SYS_NS16550_SERIAL |
||||
#define CONFIG_SYS_NS16550_REG_SIZE 1 |
||||
#define CONFIG_SYS_NS16550_CLK get_serial_clock() |
||||
|
||||
/* set PRAM to keep U-Boot out, mem= to keep linux out, and initrd_hi to
|
||||
* keep possible initrd ramdisk decompression out. This is in k (1024 bytes) |
||||
#define CONFIG_PRAM 16 |
||||
*/ |
||||
#define CONFIG_LOADADDR 0x100000 /* where TFTP images go */ |
||||
#undef CONFIG_BOOTARGS |
||||
|
||||
/* Bootcmd is overridden by the bootscript in board/cray/L1
|
||||
*/ |
||||
#define CONFIG_SYS_AUTOLOAD "no" |
||||
#define CONFIG_BOOTCOMMAND "dhcp" |
||||
|
||||
/*
|
||||
* ..during experiments.. |
||||
#define CONFIG_SERVERIP 10.0.0.1 |
||||
#define CONFIG_ETHADDR 00:40:a6:80:14:5 |
||||
*/ |
||||
#define CONFIG_SYS_I2C |
||||
#define CONFIG_SYS_I2C_PPC4XX |
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0 |
||||
#define CONFIG_SDRAM_BANK0 1 |
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 |
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F |
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 |
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
||||
#define CONFIG_IDENT_STRING "Cray L1" |
||||
#define CONFIG_ENV_OVERWRITE 1 |
||||
#define CONFIG_SYS_HUSH_PARSER 1 |
||||
#define CONFIG_SOURCE 1 |
||||
|
||||
|
||||
/*
|
||||
* Command line configuration. |
||||
*/ |
||||
|
||||
#define CONFIG_CMD_ASKENV |
||||
#define CONFIG_CMD_BDI |
||||
#define CONFIG_CMD_CONSOLE |
||||
#define CONFIG_CMD_DATE |
||||
#define CONFIG_CMD_DHCP |
||||
#define CONFIG_CMD_DIAG |
||||
#define CONFIG_CMD_ECHO |
||||
#define CONFIG_CMD_EEPROM |
||||
#define CONFIG_CMD_FLASH |
||||
#define CONFIG_CMD_I2C |
||||
#define CONFIG_CMD_IMI |
||||
#define CONFIG_CMD_IMMAP |
||||
#define CONFIG_CMD_MEMORY |
||||
#define CONFIG_CMD_NET |
||||
#define CONFIG_CMD_REGINFO |
||||
#define CONFIG_CMD_RUN |
||||
#define CONFIG_CMD_SAVEENV |
||||
#define CONFIG_CMD_SETGETDCR |
||||
#define CONFIG_CMD_SOURCE |
||||
|
||||
|
||||
/*
|
||||
* BOOTP options |
||||
*/ |
||||
#define CONFIG_BOOTP_SUBNETMASK |
||||
#define CONFIG_BOOTP_GATEWAY |
||||
#define CONFIG_BOOTP_HOSTNAME |
||||
#define CONFIG_BOOTP_BOOTPATH |
||||
#define CONFIG_BOOTP_VENDOREX |
||||
#define CONFIG_BOOTP_DNS |
||||
#define CONFIG_BOOTP_BOOTFILESIZE |
||||
|
||||
|
||||
/*
|
||||
* how many time to fail & restart a net-TFTP before giving up & resetting |
||||
* the board hoping that a reset of net interface might help.. |
||||
*/ |
||||
#define CONFIG_NET_RESET 5 |
||||
|
||||
/*
|
||||
* bauds. Just to make it compile; in our case, I read the base_baud |
||||
* from the DCR anyway, so its kinda-tied to the above ref. clock which in turn |
||||
* drives the system clock. |
||||
*/ |
||||
#define CONFIG_SYS_BASE_BAUD 403225 |
||||
#define CONFIG_SYS_BAUDRATE_TABLE \ |
||||
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} |
||||
|
||||
/*
|
||||
* Miscellaneous configurable options |
||||
*/ |
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
||||
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* where to load what we get from TFTP */ |
||||
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ |
||||
#define CONFIG_SYS_DRAM_TEST 1 |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Start addresses for the final memory configuration |
||||
* (Set up by the startup code) |
||||
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 |
||||
*/ |
||||
#define CONFIG_SYS_SDRAM_BASE 0x00000000 |
||||
#define CONFIG_SYS_FLASH_BASE 0xFFC00000 |
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
||||
|
||||
|
||||
#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 192 kB for Monitor */ |
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data |
||||
* have to be in the first 8 MB of memory, since this is |
||||
* the maximum mapped by the Linux kernel during initialization. |
||||
*/ |
||||
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization |
||||
*/ |
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
||||
#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */ |
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ |
||||
|
||||
/* BEG ENVIRONNEMENT FLASH: needs to be a whole FlashSector */ |
||||
#define CONFIG_ENV_OFFSET 0x3c8000 |
||||
#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */ |
||||
#define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment area */ |
||||
#define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */ |
||||
|
||||
/* Memory tests: U-BOOT relocates itself to the top of Ram, so its at
|
||||
* 32meg-(128k+some_malloc_space+copy-of-ENV sector).. |
||||
*/ |
||||
#define CONFIG_SYS_SDRAM_SIZE 32 /* megs of ram */ |
||||
#define CONFIG_SYS_MEMTEST_START 0x2000 /* memtest works from the end of */ |
||||
/* the exception vector table */ |
||||
/* to the end of the DRAM */ |
||||
/* less monitor and malloc area */ |
||||
#define CONFIG_SYS_STACK_USAGE 0x10000 /* Reserve 64k for the stack usage */ |
||||
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* 128k for malloc space */ |
||||
#define CONFIG_SYS_MEM_END_USAGE ( CONFIG_SYS_MONITOR_LEN \ |
||||
+ CONFIG_SYS_MALLOC_LEN \
|
||||
+ CONFIG_ENV_SECT_SIZE \
|
||||
+ CONFIG_SYS_STACK_USAGE ) |
||||
|
||||
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 - CONFIG_SYS_MEM_END_USAGE) |
||||
/* END ENVIRONNEMENT FLASH */ |
||||
|
||||
/*
|
||||
* Init Memory Controller: |
||||
* |
||||
* BR0/1 and OR0/1 (FLASH) |
||||
*/ |
||||
|
||||
#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */ |
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Definitions for initial stack pointer and data area (in OnChipMem ) |
||||
*/ |
||||
#if 1 |
||||
/* On Chip Memory location */ |
||||
#define CONFIG_SYS_TEMP_STACK_OCM 1 |
||||
#define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000 |
||||
#define CONFIG_SYS_OCM_DATA_SIZE 0x1000 |
||||
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of SDRAM */ |
||||
#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM */ |
||||
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
||||
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
||||
#else |
||||
#define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000 |
||||
#define CONFIG_SYS_OCM_DATA_SIZE 0x1000 |
||||
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of On Chip SRAM */ |
||||
#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of On Chip SRAM */ |
||||
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
||||
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
||||
#endif |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Definitions for Serial Presence Detect EEPROM address |
||||
*/ |
||||
#define EEPROM_WRITE_ADDRESS 0xA0 |
||||
#define EEPROM_READ_ADDRESS 0xA1 |
||||
|
||||
#endif /* __CONFIG_H */ |
||||
Loading…
Reference in new issue