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@ -305,22 +305,14 @@ |
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#define CFG_IDE_MAXDEVICE 2 /* max. 1 drive per IDE bus */ |
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#define CFG_ATA_IDE0_OFFSET 0x0000 |
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#define CFG_ATA_BASE_ADDR MPC5XXX_ATA |
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/* Offset for data I/O */ |
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#define CFG_ATA_DATA_OFFSET (0x0060) |
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/* Offset for normal register accesses */ |
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#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET) |
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/* Offset for alternate registers */ |
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#define CFG_ATA_ALT_OFFSET (0x005C) |
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/* Interval between registers */ |
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#define CFG_ATA_STRIDE 4 |
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#define CFG_ATA_DATA_OFFSET 0x0060 /* Offset for data I/O */ |
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#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET) /* Offset for normal register accesses */ |
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#define CFG_ATA_ALT_OFFSET 0x005C /* Offset for alternate registers */ |
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#define CFG_ATA_STRIDE 4 /* Interval between registers */ |
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#define CONFIG_ATAPI 1 |
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#define CFG_BRIGHTNESS 0x20 |
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#define CFG_BRIGHTNESS 0xFF /* LCD Default Brightness (255 = off) */ |
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#endif /* __CONFIG_H */ |
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