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@ -5,7 +5,7 @@ |
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* terms of the GNU Public License, Version 2, incorporated |
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* herein by reference. |
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* |
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* Copyright 2004-2011 Freescale Semiconductor, Inc. |
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* Copyright 2004-2011, 2013 Freescale Semiconductor, Inc. |
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* (C) Copyright 2003, Motorola, Inc. |
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* author Andy Fleming |
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* |
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@ -25,21 +25,13 @@ DECLARE_GLOBAL_DATA_PTR; |
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#define TX_BUF_CNT 2 |
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static uint rxIdx; /* index of the current RX buffer */ |
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static uint txIdx; /* index of the current TX buffer */ |
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typedef volatile struct rtxbd { |
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txbd8_t txbd[TX_BUF_CNT]; |
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rxbd8_t rxbd[PKTBUFSRX]; |
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} RTXBD; |
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#define MAXCONTROLLERS (8) |
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static struct tsec_private *privlist[MAXCONTROLLERS]; |
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static int num_tsecs = 0; |
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static uint rx_idx; /* index of the current RX buffer */ |
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static uint tx_idx; /* index of the current TX buffer */ |
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#ifdef __GNUC__ |
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static RTXBD rtx __attribute__ ((aligned(8))); |
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static struct txbd8 __iomem txbd[TX_BUF_CNT] __aligned(8); |
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static struct rxbd8 __iomem rxbd[PKTBUFSRX] __aligned(8); |
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#else |
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#error "rtx must be 64-bit aligned" |
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#endif |
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@ -57,7 +49,7 @@ static struct tsec_info_struct tsec_info[] = { |
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#endif |
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#ifdef CONFIG_MPC85XX_FEC |
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{ |
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.regs = (tsec_t *)(TSEC_BASE_ADDR + 0x2000), |
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.regs = TSEC_GET_REGS(2, 0x2000), |
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.devname = CONFIG_MPC85XX_FEC_NAME, |
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.phyaddr = FEC_PHY_ADDR, |
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.flags = FEC_FLAGS, |
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@ -113,32 +105,31 @@ static void tsec_configure_serdes(struct tsec_private *priv) |
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* result. |
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* 2) Use the 8 most significant bits as a hash into a 256-entry |
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* table. The table is controlled through 8 32-bit registers: |
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* gaddr0-7. gaddr0's MSB is entry 0, and gaddr7's LSB is |
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* gaddr7. This means that the 3 most significant bits in the |
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* gaddr0-7. gaddr0's MSB is entry 0, and gaddr7's LSB is entry |
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* 255. This means that the 3 most significant bits in the |
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* hash index which gaddr register to use, and the 5 other bits |
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* indicate which bit (assuming an IBM numbering scheme, which |
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* for PowerPC (tm) is usually the case) in the tregister holds |
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* for PowerPC (tm) is usually the case) in the register holds |
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* the entry. */ |
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static int |
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tsec_mcast_addr (struct eth_device *dev, u8 mcast_mac, u8 set) |
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tsec_mcast_addr(struct eth_device *dev, const u8 *mcast_mac, u8 set) |
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{ |
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struct tsec_private *priv = privlist[1]; |
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volatile tsec_t *regs = priv->regs; |
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volatile u32 *reg_array, value; |
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u8 result, whichbit, whichreg; |
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result = (u8)((ether_crc(MAC_ADDR_LEN,mcast_mac) >> 24) & 0xff); |
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whichbit = result & 0x1f; /* the 5 LSB = which bit to set */ |
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whichreg = result >> 5; /* the 3 MSB = which reg to set it in */ |
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value = (1 << (31-whichbit)); |
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reg_array = &(regs->hash.gaddr0); |
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if (set) { |
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reg_array[whichreg] |= value; |
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} else { |
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reg_array[whichreg] &= ~value; |
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} |
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struct tsec_private *priv = (struct tsec_private *)dev->priv; |
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struct tsec __iomem *regs = priv->regs; |
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u32 result, value; |
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u8 whichbit, whichreg; |
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result = ether_crc(MAC_ADDR_LEN, mcast_mac); |
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whichbit = (result >> 24) & 0x1f; /* the 5 LSB = which bit to set */ |
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whichreg = result >> 29; /* the 3 MSB = which reg to set it in */ |
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value = 1 << (31-whichbit); |
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if (set) |
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setbits_be32(®s->hash.gaddr0 + whichreg, value); |
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else |
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clrbits_be32(®s->hash.gaddr0 + whichreg, value); |
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return 0; |
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} |
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#endif /* Multicast TFTP ? */ |
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@ -147,7 +138,7 @@ tsec_mcast_addr (struct eth_device *dev, u8 mcast_mac, u8 set) |
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* those we don't care about (unless zero is bad, in which case, |
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* choose a more appropriate value) |
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*/ |
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static void init_registers(tsec_t *regs) |
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static void init_registers(struct tsec __iomem *regs) |
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{ |
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/* Clear IEVENT */ |
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out_be32(®s->ievent, IEVENT_INIT_CLEAR); |
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@ -175,7 +166,7 @@ static void init_registers(tsec_t *regs) |
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out_be32(®s->rctrl, 0x00000000); |
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/* Init RMON mib registers */ |
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memset((void *)&(regs->rmon), 0, sizeof(rmon_mib_t)); |
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memset((void *)®s->rmon, 0, sizeof(regs->rmon)); |
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out_be32(®s->rmon.cam1, 0xffffffff); |
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out_be32(®s->rmon.cam2, 0xffffffff); |
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@ -194,7 +185,7 @@ static void init_registers(tsec_t *regs) |
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*/ |
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static void adjust_link(struct tsec_private *priv, struct phy_device *phydev) |
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{ |
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tsec_t *regs = priv->regs; |
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struct tsec __iomem *regs = priv->regs; |
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u32 ecntrl, maccfg2; |
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if (!phydev->link) { |
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@ -248,7 +239,7 @@ static void adjust_link(struct tsec_private *priv, struct phy_device *phydev) |
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void redundant_init(struct eth_device *dev) |
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{ |
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struct tsec_private *priv = dev->priv; |
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tsec_t *regs = priv->regs; |
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struct tsec __iomem *regs = priv->regs; |
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uint t, count = 0; |
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int fail = 1; |
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static const u8 pkt[] = { |
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@ -281,23 +272,26 @@ void redundant_init(struct eth_device *dev) |
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clrbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS); |
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do { |
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uint16_t status; |
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tsec_send(dev, (void *)pkt, sizeof(pkt)); |
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/* Wait for buffer to be received */ |
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for (t = 0; rtx.rxbd[rxIdx].status & RXBD_EMPTY; t++) { |
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for (t = 0; in_be16(&rxbd[rx_idx].status) & RXBD_EMPTY; t++) { |
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if (t >= 10 * TOUT_LOOP) { |
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printf("%s: tsec: rx error\n", dev->name); |
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break; |
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} |
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} |
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if (!memcmp(pkt, (void *)NetRxPackets[rxIdx], sizeof(pkt))) |
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if (!memcmp(pkt, (void *)NetRxPackets[rx_idx], sizeof(pkt))) |
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fail = 0; |
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rtx.rxbd[rxIdx].length = 0; |
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rtx.rxbd[rxIdx].status = |
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RXBD_EMPTY | (((rxIdx + 1) == PKTBUFSRX) ? RXBD_WRAP : 0); |
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rxIdx = (rxIdx + 1) % PKTBUFSRX; |
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out_be16(&rxbd[rx_idx].length, 0); |
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status = RXBD_EMPTY; |
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if ((rx_idx + 1) == PKTBUFSRX) |
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status |= RXBD_WRAP; |
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out_be16(&rxbd[rx_idx].status, status); |
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rx_idx = (rx_idx + 1) % PKTBUFSRX; |
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if (in_be32(®s->ievent) & IEVENT_BSY) { |
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out_be32(®s->ievent, IEVENT_BSY); |
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@ -325,36 +319,39 @@ void redundant_init(struct eth_device *dev) |
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*/ |
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static void startup_tsec(struct eth_device *dev) |
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{ |
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int i; |
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struct tsec_private *priv = (struct tsec_private *)dev->priv; |
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tsec_t *regs = priv->regs; |
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struct tsec __iomem *regs = priv->regs; |
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uint16_t status; |
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int i; |
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/* reset the indices to zero */ |
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rxIdx = 0; |
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txIdx = 0; |
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rx_idx = 0; |
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tx_idx = 0; |
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#ifdef CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129 |
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uint svr; |
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#endif |
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/* Point to the buffer descriptors */ |
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out_be32(®s->tbase, (unsigned int)(&rtx.txbd[txIdx])); |
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out_be32(®s->rbase, (unsigned int)(&rtx.rxbd[rxIdx])); |
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out_be32(®s->tbase, (u32)&txbd[0]); |
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out_be32(®s->rbase, (u32)&rxbd[0]); |
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/* Initialize the Rx Buffer descriptors */ |
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for (i = 0; i < PKTBUFSRX; i++) { |
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rtx.rxbd[i].status = RXBD_EMPTY; |
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rtx.rxbd[i].length = 0; |
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rtx.rxbd[i].bufPtr = (uint) NetRxPackets[i]; |
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out_be16(&rxbd[i].status, RXBD_EMPTY); |
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out_be16(&rxbd[i].length, 0); |
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out_be32(&rxbd[i].bufptr, (u32)NetRxPackets[i]); |
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} |
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rtx.rxbd[PKTBUFSRX - 1].status |= RXBD_WRAP; |
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status = in_be16(&rxbd[PKTBUFSRX - 1].status); |
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out_be16(&rxbd[PKTBUFSRX - 1].status, status | RXBD_WRAP); |
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/* Initialize the TX Buffer Descriptors */ |
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for (i = 0; i < TX_BUF_CNT; i++) { |
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rtx.txbd[i].status = 0; |
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rtx.txbd[i].length = 0; |
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rtx.txbd[i].bufPtr = 0; |
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out_be16(&txbd[i].status, 0); |
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out_be16(&txbd[i].length, 0); |
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out_be32(&txbd[i].bufptr, 0); |
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} |
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rtx.txbd[TX_BUF_CNT - 1].status |= TXBD_WRAP; |
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status = in_be16(&txbd[TX_BUF_CNT - 1].status); |
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out_be16(&txbd[TX_BUF_CNT - 1].status, status | TXBD_WRAP); |
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#ifdef CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129 |
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svr = get_svr(); |
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@ -378,66 +375,67 @@ static void startup_tsec(struct eth_device *dev) |
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*/ |
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static int tsec_send(struct eth_device *dev, void *packet, int length) |
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{ |
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int i; |
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int result = 0; |
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struct tsec_private *priv = (struct tsec_private *)dev->priv; |
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tsec_t *regs = priv->regs; |
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struct tsec __iomem *regs = priv->regs; |
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uint16_t status; |
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int result = 0; |
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int i; |
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/* Find an empty buffer descriptor */ |
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for (i = 0; rtx.txbd[txIdx].status & TXBD_READY; i++) { |
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for (i = 0; in_be16(&txbd[tx_idx].status) & TXBD_READY; i++) { |
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if (i >= TOUT_LOOP) { |
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debug("%s: tsec: tx buffers full\n", dev->name); |
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return result; |
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} |
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} |
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rtx.txbd[txIdx].bufPtr = (uint) packet; |
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rtx.txbd[txIdx].length = length; |
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rtx.txbd[txIdx].status |= |
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(TXBD_READY | TXBD_LAST | TXBD_CRC | TXBD_INTERRUPT); |
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out_be32(&txbd[tx_idx].bufptr, (u32)packet); |
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out_be16(&txbd[tx_idx].length, length); |
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status = in_be16(&txbd[tx_idx].status); |
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out_be16(&txbd[tx_idx].status, status | |
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(TXBD_READY | TXBD_LAST | TXBD_CRC | TXBD_INTERRUPT)); |
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/* Tell the DMA to go */ |
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out_be32(®s->tstat, TSTAT_CLEAR_THALT); |
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/* Wait for buffer to be transmitted */ |
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for (i = 0; rtx.txbd[txIdx].status & TXBD_READY; i++) { |
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for (i = 0; in_be16(&txbd[tx_idx].status) & TXBD_READY; i++) { |
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if (i >= TOUT_LOOP) { |
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debug("%s: tsec: tx error\n", dev->name); |
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return result; |
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} |
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} |
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txIdx = (txIdx + 1) % TX_BUF_CNT; |
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result = rtx.txbd[txIdx].status & TXBD_STATS; |
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tx_idx = (tx_idx + 1) % TX_BUF_CNT; |
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result = in_be16(&txbd[tx_idx].status) & TXBD_STATS; |
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return result; |
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} |
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static int tsec_recv(struct eth_device *dev) |
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{ |
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int length; |
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struct tsec_private *priv = (struct tsec_private *)dev->priv; |
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tsec_t *regs = priv->regs; |
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struct tsec __iomem *regs = priv->regs; |
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while (!(rtx.rxbd[rxIdx].status & RXBD_EMPTY)) { |
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length = rtx.rxbd[rxIdx].length; |
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while (!(in_be16(&rxbd[rx_idx].status) & RXBD_EMPTY)) { |
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int length = in_be16(&rxbd[rx_idx].length); |
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uint16_t status = in_be16(&rxbd[rx_idx].status); |
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/* Send the packet up if there were no errors */ |
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if (!(rtx.rxbd[rxIdx].status & RXBD_STATS)) { |
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NetReceive(NetRxPackets[rxIdx], length - 4); |
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} else { |
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printf("Got error %x\n", |
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(rtx.rxbd[rxIdx].status & RXBD_STATS)); |
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} |
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if (!(status & RXBD_STATS)) |
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NetReceive(NetRxPackets[rx_idx], length - 4); |
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else |
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printf("Got error %x\n", (status & RXBD_STATS)); |
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rtx.rxbd[rxIdx].length = 0; |
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out_be16(&rxbd[rx_idx].length, 0); |
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status = RXBD_EMPTY; |
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/* Set the wrap bit if this is the last element in the list */ |
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rtx.rxbd[rxIdx].status = |
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RXBD_EMPTY | (((rxIdx + 1) == PKTBUFSRX) ? RXBD_WRAP : 0); |
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if ((rx_idx + 1) == PKTBUFSRX) |
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status |= RXBD_WRAP; |
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out_be16(&rxbd[rx_idx].status, status); |
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rxIdx = (rxIdx + 1) % PKTBUFSRX; |
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rx_idx = (rx_idx + 1) % PKTBUFSRX; |
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} |
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if (in_be32(®s->ievent) & IEVENT_BSY) { |
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@ -453,7 +451,7 @@ static int tsec_recv(struct eth_device *dev) |
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static void tsec_halt(struct eth_device *dev) |
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{ |
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struct tsec_private *priv = (struct tsec_private *)dev->priv; |
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tsec_t *regs = priv->regs; |
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struct tsec __iomem *regs = priv->regs; |
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clrbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS); |
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setbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS); |
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@ -475,11 +473,9 @@ static void tsec_halt(struct eth_device *dev) |
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*/ |
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static int tsec_init(struct eth_device *dev, bd_t * bd) |
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{ |
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uint tempval; |
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char tmpbuf[MAC_ADDR_LEN]; |
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int i; |
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struct tsec_private *priv = (struct tsec_private *)dev->priv; |
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tsec_t *regs = priv->regs; |
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struct tsec __iomem *regs = priv->regs; |
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u32 tempval; |
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int ret; |
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/* Make sure the controller is stopped */ |
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@ -492,16 +488,16 @@ static int tsec_init(struct eth_device *dev, bd_t * bd) |
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out_be32(®s->ecntrl, ECNTRL_INIT_SETTINGS); |
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/* Copy the station address into the address registers.
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* Backwards, because little endian MACS are dumb */ |
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for (i = 0; i < MAC_ADDR_LEN; i++) |
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tmpbuf[MAC_ADDR_LEN - 1 - i] = dev->enetaddr[i]; |
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tempval = (tmpbuf[0] << 24) | (tmpbuf[1] << 16) | (tmpbuf[2] << 8) | |
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tmpbuf[3]; |
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* For a station address of 0x12345678ABCD in transmission |
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* order (BE), MACnADDR1 is set to 0xCDAB7856 and |
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* MACnADDR2 is set to 0x34120000. |
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*/ |
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tempval = (dev->enetaddr[5] << 24) | (dev->enetaddr[4] << 16) | |
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(dev->enetaddr[3] << 8) | dev->enetaddr[2]; |
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out_be32(®s->macstnaddr1, tempval); |
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tempval = *((uint *) (tmpbuf + 4)); |
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tempval = (dev->enetaddr[1] << 24) | (dev->enetaddr[0] << 16); |
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out_be32(®s->macstnaddr2, tempval); |
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@ -527,7 +523,7 @@ static int tsec_init(struct eth_device *dev, bd_t * bd) |
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static phy_interface_t tsec_get_interface(struct tsec_private *priv) |
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{ |
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tsec_t *regs = priv->regs; |
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struct tsec __iomem *regs = priv->regs; |
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u32 ecntrl; |
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ecntrl = in_be32(®s->ecntrl); |
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@ -576,7 +572,7 @@ static int init_phy(struct eth_device *dev) |
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{ |
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struct tsec_private *priv = (struct tsec_private *)dev->priv; |
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struct phy_device *phydev; |
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tsec_t *regs = priv->regs; |
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struct tsec __iomem *regs = priv->regs; |
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u32 supported = (SUPPORTED_10baseT_Half | |
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SUPPORTED_10baseT_Full | |
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SUPPORTED_100baseT_Half | |
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@ -626,7 +622,6 @@ static int tsec_initialize(bd_t *bis, struct tsec_info_struct *tsec_info) |
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if (NULL == priv) |
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return 0; |
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privlist[num_tsecs++] = priv; |
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priv->regs = tsec_info->regs; |
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priv->phyregs_sgmii = tsec_info->miiregs_sgmii; |
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@ -684,7 +679,7 @@ int tsec_standard_init(bd_t *bis) |
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{ |
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struct fsl_pq_mdio_info info; |
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info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR; |
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info.regs = TSEC_GET_MDIO_REGS_BASE(1); |
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info.name = DEFAULT_MII_NAME; |
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fsl_pq_mdio_init(bis, &info); |
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Tom Rini
11 years ago