@ -13,21 +13,16 @@
# define CONFIG_TI81XX
# define CONFIG_TI816X
# define CONFIG_ARCH_CPU_INIT
# include <configs/ti_armv7_omap.h>
# include <asm/arch/omap.h>
# define CONFIG_ENV_SIZE 0x2000
# define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (32 * 1024))
# define CONFIG_SYS_LONGHELP /* undef save memory */
# define CONFIG_MACH_TYPE MACH_TYPE_TI8168EVM
# define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
# define CONFIG_SETUP_MEMORY_TAGS
# define CONFIG_INITRD_TAG /* required for ramdisk support */
# define CONFIG_EXTRA_ENV_SETTINGS \
" loadaddr=0x81000000 \0 " \
DEFAULT_LINUX_BOOT_ENV \
" mtdids= " MTDIDS_DEFAULT " \0 " \
" mtdparts= " MTDPARTS_DEFAULT " \0 " \
# define CONFIG_BOOTCOMMAND \
" mmc rescan; " \
@ -40,26 +35,10 @@
# define V_OSCK 24000000 /* Clock output from T2 */
# define V_SCLK (V_OSCK >> 1)
# define CONFIG_SYS_MAXARGS 32
# define CONFIG_SYS_CBSIZE 512 /* console I/O buffer size */
# define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
+ sizeof ( CONFIG_SYS_PROMPT ) + 16 ) /* print buffer size */
# define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* boot arg buffer size */
# define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
# define CONFIG_CMD_ASKENV
# define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */
# define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
# define PHYS_DRAM_1_SIZE 0x40000000 /* 1 GB */
# define PHYS_DRAM_2 0xC0000000 /* DRAM Bank #2 */
# define PHYS_DRAM_2_SIZE 0x40000000 /* 1 GB */
# define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2048MB */
# define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
# define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
GENERATED_GBL_DATA_SIZE )
# define CONFIG_SYS_SDRAM_BASE 0x80000000
/**
* Platform / Board specific defs
@ -92,11 +71,7 @@
# define CONFIG_SYS_MAX_NAND_DEVICE 1
/* NAND: SPL related configs */
# define CONFIG_SPL_NAND_BASE
# define CONFIG_SPL_NAND_DRIVERS
# define CONFIG_SPL_NAND_ECC
# define CONFIG_SPL_NAND_AM33XX_BCH
# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
/* NAND: device related configs */
# define CONFIG_SYS_NAND_5_ADDR_CYCLE
@ -107,7 +82,6 @@
# define CONFIG_SYS_NAND_OOBSIZE 64
# define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
/* NAND: driver related configs */
# define CONFIG_NAND_OMAP_GPMC
# define CONFIG_NAND_OMAP_GPMC_PREFETCH
# define CONFIG_NAND_OMAP_ELM
# define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
@ -144,24 +118,13 @@
/* SPL */
/* Defines for SPL */
# define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
# define CONFIG_SPL_FRAMEWORK
# define CONFIG_SPL_TEXT_BASE 0x40400000
# define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
CONFIG_SPL_TEXT_BASE )
# define CONFIG_SPL_BSS_START_ADDR 0x80000000
# define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
# define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
# define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
# define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
# define CONFIG_SPL_LDSCRIPT "arch / arm / mach-omap2 / u-boot-spl.lds"
# define CONFIG_SYS_TEXT_BASE 0x80800000
# define CONFIG_SYS_SPL_MALLOC_START 0x80208000
# define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
/* Since SPL did pll and ddr initialization for us,
* we don ' t need to do it twice .
@ -170,4 +133,13 @@
# define CONFIG_SKIP_LOWLEVEL_INIT
# endif
/*
* Disable MMC DM for SPL build and can be re - enabled after adding
* DM support in SPL
*/
# ifdef CONFIG_SPL_BUILD
# undef CONFIG_DM_MMC
# undef CONFIG_TIMER
# undef CONFIG_DM_USB
# endif
# endif