Whitebox
/
u-boot
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

x86: kconfig: Imply HAVE_INTEL_ME in the platform Kconfig

Browse Source 
Intel Management Engine is required by the platform, however it's
not a must have when building a U-Boot image. For example, during
development normally programming ME firmware is a one-time effort.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
master
Bin Meng 8 years ago
parent 6bf89de7e1
commit 1e452b4686
10 changed files with 3 additions and 7 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Show Stats Download Patch File Download Diff File
  1. 1
      arch/x86/cpu/baytrail/Kconfig
  2. 1
      arch/x86/cpu/broadwell/Kconfig
  3. 1
      arch/x86/cpu/ivybridge/Kconfig
  4. 1
      configs/bayleybay_defconfig
  5. 1
      configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
  6. 1
      configs/conga-qeval20-qa3-e3845_defconfig
  7. 1
      configs/dfi-bt700-q7x-151_defconfig
  8. 1
      configs/minnowmax_defconfig
  9. 1
      configs/som-db5800-som-6867_defconfig
  10. 1
      configs/theadorable-x86-dfi-bt700_defconfig

1
arch/x86/cpu/baytrail/Kconfig
Unescape View File

@ -8,6 +8,7 @@ config INTEL_BAYTRAIL
bool
select HAVE_FSP if !EFI
imply ENV_IS_IN_SPI_FLASH
imply HAVE_INTEL_ME if !EFI
if INTEL_BAYTRAIL
config INTERNAL_UART

1
arch/x86/cpu/broadwell/Kconfig
Unescape View File

@ -6,6 +6,7 @@
config INTEL_BROADWELL
bool
select CACHE_MRC_BIN
imply HAVE_INTEL_ME
if INTEL_BROADWELL

1
arch/x86/cpu/ivybridge/Kconfig
Unescape View File

@ -8,6 +8,7 @@
config NORTHBRIDGE_INTEL_IVYBRIDGE
bool
select CACHE_MRC_BIN if HAVE_MRC
imply HAVE_INTEL_ME
if NORTHBRIDGE_INTEL_IVYBRIDGE

1
configs/bayleybay_defconfig
Unescape View File

@ -3,7 +3,6 @@ CONFIG_VENDOR_INTEL=y
CONFIG_DEFAULT_DEVICE_TREE="bayleybay"
CONFIG_TARGET_BAYLEYBAY=y
CONFIG_INTERNAL_UART=y
CONFIG_HAVE_INTEL_ME=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y

1
configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
Unescape View File

@ -4,7 +4,6 @@ CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y
CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
CONFIG_INTERNAL_UART=y
CONFIG_DEBUG_UART=y
CONFIG_HAVE_INTEL_ME=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y

1
configs/conga-qeval20-qa3-e3845_defconfig
Unescape View File

@ -3,7 +3,6 @@ CONFIG_VENDOR_CONGATEC=y
CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y
CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
CONFIG_DEBUG_UART=y
CONFIG_HAVE_INTEL_ME=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y

1
configs/dfi-bt700-q7x-151_defconfig
Unescape View File

@ -3,7 +3,6 @@ CONFIG_VENDOR_DFI=y
CONFIG_DEFAULT_DEVICE_TREE="dfi-bt700-q7x-151"
CONFIG_TARGET_DFI_BT700=y
CONFIG_DEBUG_UART=y
CONFIG_HAVE_INTEL_ME=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y

1
configs/minnowmax_defconfig
Unescape View File

@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="minnowmax"
CONFIG_TARGET_MINNOWMAX=y
CONFIG_INTERNAL_UART=y
CONFIG_DEBUG_UART=y
CONFIG_HAVE_INTEL_ME=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y

1
configs/som-db5800-som-6867_defconfig
Unescape View File

@ -3,7 +3,6 @@ CONFIG_VENDOR_ADVANTECH=y
CONFIG_TARGET_SOM_DB5800_SOM_6867=y
CONFIG_DEFAULT_DEVICE_TREE="baytrail_som-db5800-som-6867"
CONFIG_DEBUG_UART=y
CONFIG_HAVE_INTEL_ME=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y

1
configs/theadorable-x86-dfi-bt700_defconfig
Unescape View File

@ -2,7 +2,6 @@ CONFIG_X86=y
CONFIG_VENDOR_DFI=y
CONFIG_DEFAULT_DEVICE_TREE="theadorable-x86-dfi-bt700"
CONFIG_TARGET_DFI_BT700=y
CONFIG_HAVE_INTEL_ME=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y

Write Preview
Loading…
Cancel
Save