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@ -55,47 +55,17 @@ |
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#define CONFIG_BAUDRATE 115200 |
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#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ |
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#if 0 |
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#define CONFIG_PREBOOT \ |
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"crc32 f0207004 ffc 0;" \
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"if cmp 0 f0207000 1;" \
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"then;echo Old CRC is correct;crc32 f0207004 ff4 f0207000;" \
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"else;echo Old CRC is bad;fi" |
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#endif |
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#undef CONFIG_BOOTARGS |
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#define CONFIG_RAMBOOTCOMMAND \ |
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"setenv bootargs root=/dev/ram rw " \
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"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname):$(netdev):off;" \
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"bootm ffc00000 ffca0000" |
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#define CONFIG_NFSBOOTCOMMAND \ |
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"setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) " \
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"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname):$(netdev):off;" \
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"bootm ffc00000" |
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#define CONFIG_PELK_NOR_KERNEL_NOR_RAMDISK_BOOTCOMMAND \ |
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"setenv ipaddr 192.168.10.203;" \
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"setenv serverip 192.168.10.6;" \
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"setenv netmask 255.255.255.0;" \
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"setenv bootargs root=/dev/ram rw console=ttyS0,9600;" \
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"setenv autostart yes;" \
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"bootm ffc00000 ffd00000" |
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/*
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"setenv ethaddr 00:50:c2:1e:af:fe;" \
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"setenv eth1addr 00:50:c2:1e:af:fd;" \
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*/ |
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#define CONFIG_BOOTCOMMAND CONFIG_PELK_NOR_KERNEL_NOR_RAMDISK_BOOTCOMMAND |
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/* Ethernet stuff */ |
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#define CONFIG_ENV_OVERWRITE /* Let the user to change the Ethernet MAC addresses */ |
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#define CONFIG_ETHADDR 00:50:c2:1e:af:fe |
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#define CONFIG_ETH1ADDR 00:50:c2:1e:af:fd |
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
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#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
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/* EThernet stuff */ |
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#define CONFIG_ENV_OVERWRITE /* Let the user to change the Ethernet MAC addresses */ |
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#define CONFIG_ETHADDR 00:50:c2:1e:af:fe |
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#define CONFIG_ETH1ADDR 00:50:c2:1e:af:fd |
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#undef CONFIG_EXT_PHY |
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#define CONFIG_MII 1 /* MII PHY management */ |
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@ -548,18 +518,16 @@ |
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#if 1 /* test-only */ |
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#define CONFIG_NO_SERIAL_EEPROM |
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/*#undef CONFIG_NO_SERIAL_EEPROM*/ |
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/*----------------------------------------------------------------------------*/ |
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/*----------------------------------------------------------------------------*/ |
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/*----------------------------------------------------------------------------*/ |
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/*--------------------------------------------------------------------*/ |
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#ifdef CONFIG_NO_SERIAL_EEPROM |
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/*
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!------------------------------------------------------------------------------- |
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!----------------------------------------------------------------------- |
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! Defines for entry options. |
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! Note: Because the 405EP SDRAM controller does not support ECC, ECC DIMMs that |
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! are plugged in the board will be utilized as non-ECC DIMMs. |
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!------------------------------------------------------------------------------- |
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!----------------------------------------------------------------------- |
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*/ |
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#undef AUTO_MEMORY_CONFIG |
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#define DIMM_READ_ADDR 0xAB |
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@ -678,10 +646,10 @@ |
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#define PLL_PCIDIV_4 0x00000003 |
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/*
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!------------------------------------------------------------------------------- |
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!----------------------------------------------------------------------- |
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! PLL settings for 266MHz CPU, 133MHz PLB/SDRAM, 66MHz EBC, 33MHz PCI, |
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! assuming a 33.3MHz input clock to the 405EP. |
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!------------------------------------------------------------------------------- |
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!----------------------------------------------------------------------- |
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*/ |
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#define PLLMR0_133_66_66_33 (PLL_CPUDIV_1 | PLL_PLBDIV_1 | \ |
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PLL_OPBDIV_2 | PLL_EXTBUSDIV_4 | \
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