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@ -66,6 +66,8 @@ |
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#define NFC_ROW_AUTO_INC (1 << 27) |
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#define NFC_SEND_CMD3 (1 << 28) |
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#define NFC_SEND_CMD4 (1 << 29) |
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#define NFC_RAW_CMD (0 << 30) |
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#define NFC_PAGE_CMD (2 << 30) |
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#define NFC_ST_CMD_INT_FLAG (1 << 1) |
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#define NFC_ST_DMA_INT_FLAG (1 << 2) |
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@ -78,9 +80,6 @@ |
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#define NFC_CMD_RNDOUT 0x05 |
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#define NFC_CMD_READSTART 0x30 |
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#define NFC_PAGE_CMD (2 << 30) |
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#define SUNXI_DMA_CFG_REG0 0x300 |
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#define SUNXI_DMA_SRC_START_ADDR_REG0 0x304 |
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#define SUNXI_DMA_DEST_START_ADDRR_REG0 0x308 |
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@ -97,6 +96,16 @@ |
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#define SUNXI_DMA_DDMA_PARA_REG_SRC_WAIT_CYC (0x0F << 0) |
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#define SUNXI_DMA_DDMA_PARA_REG_SRC_BLK_SIZE (0x7F << 8) |
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struct nfc_config { |
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int page_size; |
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int ecc_strength; |
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int ecc_size; |
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int addr_cycles; |
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int nseeds; |
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bool randomize; |
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bool valid; |
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}; |
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/* minimal "boot0" style NAND support for Allwinner A20 */ |
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/* random seed used by linux */ |
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@ -119,38 +128,31 @@ const uint16_t random_seed[128] = { |
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0x7c57, 0x0fbe, 0x46ce, 0x4939, 0x6b17, 0x37bb, 0x3e91, 0x76db, |
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}; |
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/* random seed used for syndrome calls */ |
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const uint16_t random_seed_syndrome = 0x4a80; |
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#define MAX_RETRIES 10 |
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#define DEFAULT_TIMEOUT_US 100000 |
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static int check_value_inner(int offset, int expected_bits, |
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int max_number_of_retries, int negation) |
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int timeout_us, int negation) |
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{ |
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int retries = 0; |
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do { |
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int val = readl(offset) & expected_bits; |
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if (negation ? !val : val) |
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return 1; |
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mdelay(1); |
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retries++; |
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} while (retries < max_number_of_retries); |
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udelay(1); |
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} while (--timeout_us); |
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return 0; |
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} |
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static inline int check_value(int offset, int expected_bits, |
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int max_number_of_retries) |
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int timeout_us) |
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{ |
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return check_value_inner(offset, expected_bits, |
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max_number_of_retries, 0); |
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return check_value_inner(offset, expected_bits, timeout_us, 0); |
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} |
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static inline int check_value_negated(int offset, int unexpected_bits, |
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int max_number_of_retries) |
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int timeout_us) |
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{ |
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return check_value_inner(offset, unexpected_bits, |
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max_number_of_retries, 1); |
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return check_value_inner(offset, unexpected_bits, timeout_us, 1); |
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} |
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void nand_init(void) |
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@ -165,7 +167,7 @@ void nand_init(void) |
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SUNXI_NFC_BASE + NFC_CTL); |
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if (!check_value_negated(SUNXI_NFC_BASE + NFC_CTL, |
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NFC_CTL_RESET, MAX_RETRIES)) { |
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NFC_CTL_RESET, DEFAULT_TIMEOUT_US)) { |
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printf("Couldn't initialize nand\n"); |
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} |
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@ -175,64 +177,97 @@ void nand_init(void) |
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SUNXI_NFC_BASE + NFC_CMD); |
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if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_INT_FLAG, |
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MAX_RETRIES)) { |
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DEFAULT_TIMEOUT_US)) { |
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printf("Error timeout waiting for nand reset\n"); |
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return; |
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} |
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writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST); |
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} |
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static int nand_read_page(int page_size, int ecc_strength, int ecc_page_size, |
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int addr_cycles, uint32_t real_addr, dma_addr_t dst, int syndrome) |
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static void nand_apply_config(const struct nfc_config *conf) |
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{ |
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uint32_t val; |
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int i, ecc_off = 0; |
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uint16_t ecc_mode = 0; |
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uint16_t rand_seed; |
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uint32_t page; |
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uint16_t column; |
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static const u8 strengths[] = { 16, 24, 28, 32, 40, 48, 56, 60, 64 }; |
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for (i = 0; i < ARRAY_SIZE(strengths); i++) { |
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if (ecc_strength == strengths[i]) { |
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ecc_mode = i; |
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break; |
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} |
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u32 val; |
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val = readl(SUNXI_NFC_BASE + NFC_CTL); |
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val &= ~NFC_CTL_PAGE_SIZE_MASK; |
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writel(val | NFC_CTL_RAM_METHOD | NFC_CTL_PAGE_SIZE(conf->page_size), |
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SUNXI_NFC_BASE + NFC_CTL); |
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writel(conf->ecc_size, SUNXI_NFC_BASE + NFC_CNT); |
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writel(conf->page_size, SUNXI_NFC_BASE + NFC_SPARE_AREA); |
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} |
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static int nand_load_page(const struct nfc_config *conf, u32 offs) |
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{ |
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int page = offs / conf->page_size; |
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writel((NFC_CMD_RNDOUTSTART << NFC_RANDOM_READ_CMD1_OFFSET) | |
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(NFC_CMD_RNDOUT << NFC_RANDOM_READ_CMD0_OFFSET) | |
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(NFC_CMD_READSTART << NFC_READ_CMD_OFFSET), |
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SUNXI_NFC_BASE + NFC_RCMD_SET); |
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writel(((page & 0xFFFF) << 16), SUNXI_NFC_BASE + NFC_ADDR_LOW); |
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writel((page >> 16) & 0xFF, SUNXI_NFC_BASE + NFC_ADDR_HIGH); |
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writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST); |
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writel(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD | NFC_WAIT_FLAG | |
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((conf->addr_cycles - 1) << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADR, |
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SUNXI_NFC_BASE + NFC_CMD); |
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if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_INT_FLAG, |
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DEFAULT_TIMEOUT_US)) { |
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printf("Error while initializing dma interrupt\n"); |
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return -EIO; |
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} |
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/* HW ECC always request ECC bytes for 1024 bytes blocks */ |
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ecc_off = DIV_ROUND_UP(ecc_strength * fls(8 * 1024), 8); |
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/* HW ECC always work with even numbers of ECC bytes */ |
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ecc_off += (ecc_off & 1); |
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ecc_off += 4; /* prepad */ |
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return 0; |
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} |
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static int nand_reset_column(void) |
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{ |
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writel((NFC_CMD_RNDOUTSTART << NFC_RANDOM_READ_CMD1_OFFSET) | |
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(NFC_CMD_RNDOUT << NFC_RANDOM_READ_CMD0_OFFSET) | |
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(NFC_CMD_RNDOUTSTART << NFC_READ_CMD_OFFSET), |
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SUNXI_NFC_BASE + NFC_RCMD_SET); |
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writel(0, SUNXI_NFC_BASE + NFC_ADDR_LOW); |
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writel(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD | |
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(1 << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADR | NFC_CMD_RNDOUT, |
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SUNXI_NFC_BASE + NFC_CMD); |
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page = real_addr / page_size; |
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column = real_addr % page_size; |
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if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_INT_FLAG, |
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DEFAULT_TIMEOUT_US)) { |
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printf("Error while initializing dma interrupt\n"); |
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return -1; |
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} |
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if (syndrome) |
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column += (column / ecc_page_size) * ecc_off; |
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return 0; |
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} |
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static int nand_read_page(const struct nfc_config *conf, u32 offs, |
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void *dest, int len) |
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{ |
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dma_addr_t dst = (dma_addr_t)dest; |
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int nsectors = len / conf->ecc_size; |
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u16 rand_seed; |
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u32 val; |
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int page; |
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page = offs / conf->page_size; |
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if (offs % conf->page_size || len % conf->ecc_size || |
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len > conf->page_size || len < 0) |
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return -EINVAL; |
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/* clear ecc status */ |
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writel(0, SUNXI_NFC_BASE + NFC_ECC_ST); |
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/* Choose correct seed */ |
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if (syndrome) |
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rand_seed = random_seed_syndrome; |
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else |
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rand_seed = random_seed[page % 128]; |
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rand_seed = random_seed[page % conf->nseeds]; |
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writel((rand_seed << 16) | NFC_ECC_RANDOM_EN | NFC_ECC_EN |
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| NFC_ECC_PIPELINE | (ecc_mode << 12), |
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writel((rand_seed << 16) | (conf->ecc_strength << 12) | |
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(conf->randomize ? NFC_ECC_RANDOM_EN : 0) | |
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(conf->ecc_size == 512 ? NFC_ECC_BLOCK_SIZE : 0) | |
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NFC_ECC_EN | NFC_ECC_PIPELINE | NFC_ECC_EXCEPTION, |
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SUNXI_NFC_BASE + NFC_ECC_CTL); |
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val = readl(SUNXI_NFC_BASE + NFC_CTL); |
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writel(val | NFC_CTL_RAM_METHOD, SUNXI_NFC_BASE + NFC_CTL); |
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if (!syndrome) |
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writel(page_size + (column / ecc_page_size) * ecc_off, |
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SUNXI_NFC_BASE + NFC_SPARE_AREA); |
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flush_dcache_range(dst, ALIGN(dst + ecc_page_size, ARCH_DMA_MINALIGN)); |
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flush_dcache_range(dst, ALIGN(dst + conf->ecc_size, ARCH_DMA_MINALIGN)); |
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/* SUNXI_DMA */ |
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writel(0x0, SUNXI_DMA_BASE + SUNXI_DMA_CFG_REG0); /* clr dma cmd */ |
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@ -241,158 +276,261 @@ static int nand_read_page(int page_size, int ecc_strength, int ecc_page_size, |
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SUNXI_DMA_BASE + SUNXI_DMA_SRC_START_ADDR_REG0); |
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/* read to RAM */ |
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writel(dst, SUNXI_DMA_BASE + SUNXI_DMA_DEST_START_ADDRR_REG0); |
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writel(SUNXI_DMA_DDMA_PARA_REG_SRC_WAIT_CYC |
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| SUNXI_DMA_DDMA_PARA_REG_SRC_BLK_SIZE, |
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SUNXI_DMA_BASE + SUNXI_DMA_DDMA_PARA_REG0); |
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writel(ecc_page_size, |
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SUNXI_DMA_BASE + SUNXI_DMA_DDMA_BC_REG0); /* 1kB */ |
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writel(SUNXI_DMA_DDMA_CFG_REG_LOADING |
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| SUNXI_DMA_DDMA_CFG_REG_DMA_DEST_DATA_WIDTH_32 |
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| SUNXI_DMA_DDMA_CFG_REG_DDMA_DST_DRQ_TYPE_DRAM |
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| SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_DATA_WIDTH_32 |
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| SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_ADDR_MODE_IO |
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| SUNXI_DMA_DDMA_CFG_REG_DDMA_SRC_DRQ_TYPE_NFC, |
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SUNXI_DMA_BASE + SUNXI_DMA_CFG_REG0); |
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writel((NFC_CMD_RNDOUTSTART << NFC_RANDOM_READ_CMD1_OFFSET) |
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| (NFC_CMD_RNDOUT << NFC_RANDOM_READ_CMD0_OFFSET) |
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| (NFC_CMD_READSTART | NFC_READ_CMD_OFFSET), SUNXI_NFC_BASE |
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+ NFC_RCMD_SET); |
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writel(1, SUNXI_NFC_BASE + NFC_SECTOR_NUM); |
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writel(((page & 0xFFFF) << 16) | column, |
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SUNXI_NFC_BASE + NFC_ADDR_LOW); |
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writel((page >> 16) & 0xFF, SUNXI_NFC_BASE + NFC_ADDR_HIGH); |
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writel(SUNXI_DMA_DDMA_PARA_REG_SRC_WAIT_CYC | |
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SUNXI_DMA_DDMA_PARA_REG_SRC_BLK_SIZE, |
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SUNXI_DMA_BASE + SUNXI_DMA_DDMA_PARA_REG0); |
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writel(len, SUNXI_DMA_BASE + SUNXI_DMA_DDMA_BC_REG0); |
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writel(SUNXI_DMA_DDMA_CFG_REG_LOADING | |
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SUNXI_DMA_DDMA_CFG_REG_DMA_DEST_DATA_WIDTH_32 | |
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SUNXI_DMA_DDMA_CFG_REG_DDMA_DST_DRQ_TYPE_DRAM | |
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SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_DATA_WIDTH_32 | |
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SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_ADDR_MODE_IO | |
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SUNXI_DMA_DDMA_CFG_REG_DDMA_SRC_DRQ_TYPE_NFC, |
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SUNXI_DMA_BASE + SUNXI_DMA_CFG_REG0); |
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writel(nsectors, SUNXI_NFC_BASE + NFC_SECTOR_NUM); |
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writel(NFC_ST_DMA_INT_FLAG, SUNXI_NFC_BASE + NFC_ST); |
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writel(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_DATA_TRANS | |
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NFC_PAGE_CMD | NFC_WAIT_FLAG | |
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((addr_cycles - 1) << NFC_ADDR_NUM_OFFSET) | |
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NFC_SEND_ADR | NFC_DATA_SWAP_METHOD | (syndrome ? NFC_SEQ : 0), |
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SUNXI_NFC_BASE + NFC_CMD); |
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writel(NFC_DATA_TRANS | NFC_PAGE_CMD | NFC_DATA_SWAP_METHOD, |
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SUNXI_NFC_BASE + NFC_CMD); |
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if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_DMA_INT_FLAG, |
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MAX_RETRIES)) { |
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DEFAULT_TIMEOUT_US)) { |
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printf("Error while initializing dma interrupt\n"); |
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return -1; |
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return -EIO; |
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} |
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writel(NFC_ST_DMA_INT_FLAG, SUNXI_NFC_BASE + NFC_ST); |
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if (!check_value_negated(SUNXI_DMA_BASE + SUNXI_DMA_CFG_REG0, |
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SUNXI_DMA_DDMA_CFG_REG_LOADING, MAX_RETRIES)) { |
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SUNXI_DMA_DDMA_CFG_REG_LOADING, |
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DEFAULT_TIMEOUT_US)) { |
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printf("Error while waiting for dma transfer to finish\n"); |
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return -1; |
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return -EIO; |
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} |
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invalidate_dcache_range(dst, |
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ALIGN(dst + ecc_page_size, ARCH_DMA_MINALIGN)); |
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ALIGN(dst + conf->ecc_size, ARCH_DMA_MINALIGN)); |
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if (readl(SUNXI_NFC_BASE + NFC_ECC_ST)) |
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return -1; |
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val = readl(SUNXI_NFC_BASE + NFC_ECC_ST); |
|
|
|
|
|
|
|
|
|
return 0; |
|
|
|
|
/* ECC error detected. */ |
|
|
|
|
if (val & 0xffff) |
|
|
|
|
return -EIO; |
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Return 1 if the page is empty. |
|
|
|
|
* We consider the page as empty if the first ECC block is marked |
|
|
|
|
* empty. |
|
|
|
|
*/ |
|
|
|
|
return (val & 0x10000) ? 1 : 0; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
static int nand_read_ecc(int page_size, int ecc_strength, int ecc_page_size, |
|
|
|
|
int addr_cycles, uint32_t offs, uint32_t size, void *dest, int syndrome) |
|
|
|
|
static int nand_max_ecc_strength(struct nfc_config *conf) |
|
|
|
|
{ |
|
|
|
|
void *end = dest + size; |
|
|
|
|
static const int ecc_bytes[] = { 32, 46, 54, 60, 74, 88, 102, 110, 116 }; |
|
|
|
|
int max_oobsize, max_ecc_bytes; |
|
|
|
|
int nsectors = conf->page_size / conf->ecc_size; |
|
|
|
|
int i; |
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* ECC strength is limited by the size of the OOB area which is |
|
|
|
|
* correlated with the page size. |
|
|
|
|
*/ |
|
|
|
|
switch (conf->page_size) { |
|
|
|
|
case 2048: |
|
|
|
|
max_oobsize = 64; |
|
|
|
|
break; |
|
|
|
|
case 4096: |
|
|
|
|
max_oobsize = 256; |
|
|
|
|
break; |
|
|
|
|
case 8192: |
|
|
|
|
max_oobsize = 640; |
|
|
|
|
break; |
|
|
|
|
case 16384: |
|
|
|
|
max_oobsize = 1664; |
|
|
|
|
break; |
|
|
|
|
default: |
|
|
|
|
return -EINVAL; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
clrsetbits_le32(SUNXI_NFC_BASE + NFC_CTL, NFC_CTL_PAGE_SIZE_MASK, |
|
|
|
|
NFC_CTL_PAGE_SIZE(page_size)); |
|
|
|
|
max_ecc_bytes = max_oobsize / nsectors; |
|
|
|
|
|
|
|
|
|
for ( ;dest < end; dest += ecc_page_size, offs += ecc_page_size) { |
|
|
|
|
if (nand_read_page(page_size, ecc_strength, ecc_page_size, |
|
|
|
|
addr_cycles, offs, (dma_addr_t)dest, |
|
|
|
|
syndrome)) |
|
|
|
|
return -1; |
|
|
|
|
for (i = 0; i < ARRAY_SIZE(ecc_bytes); i++) { |
|
|
|
|
if (ecc_bytes[i] > max_ecc_bytes) |
|
|
|
|
break; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return 0; |
|
|
|
|
if (!i) |
|
|
|
|
return -EINVAL; |
|
|
|
|
|
|
|
|
|
return i - 1; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
static int nand_read_buffer(uint32_t offs, unsigned int size, void *dest, |
|
|
|
|
int syndrome) |
|
|
|
|
static int nand_detect_ecc_config(struct nfc_config *conf, u32 offs, |
|
|
|
|
void *dest) |
|
|
|
|
{ |
|
|
|
|
const struct { |
|
|
|
|
int page_size; |
|
|
|
|
int ecc_strength; |
|
|
|
|
int ecc_page_size; |
|
|
|
|
int addr_cycles; |
|
|
|
|
} nand_configs[] = { |
|
|
|
|
{ 8192, 40, 1024, 5 }, |
|
|
|
|
{ 16384, 56, 1024, 5 }, |
|
|
|
|
{ 8192, 24, 1024, 5 }, |
|
|
|
|
{ 4096, 24, 1024, 5 }, |
|
|
|
|
}; |
|
|
|
|
static int nand_config = -1; |
|
|
|
|
int i; |
|
|
|
|
/* NAND with pages > 4k will likely require 1k sector size. */ |
|
|
|
|
int min_ecc_size = conf->page_size > 4096 ? 1024 : 512; |
|
|
|
|
int page = offs / conf->page_size; |
|
|
|
|
int ret; |
|
|
|
|
|
|
|
|
|
if (nand_config == -1) { |
|
|
|
|
for (i = 0; i < ARRAY_SIZE(nand_configs); i++) { |
|
|
|
|
debug("nand: trying page %d ecc %d / %d addr %d: ", |
|
|
|
|
nand_configs[i].page_size, |
|
|
|
|
nand_configs[i].ecc_strength, |
|
|
|
|
nand_configs[i].ecc_page_size, |
|
|
|
|
nand_configs[i].addr_cycles); |
|
|
|
|
if (nand_read_ecc(nand_configs[i].page_size, |
|
|
|
|
nand_configs[i].ecc_strength, |
|
|
|
|
nand_configs[i].ecc_page_size, |
|
|
|
|
nand_configs[i].addr_cycles, |
|
|
|
|
offs, size, dest, syndrome) == 0) { |
|
|
|
|
debug("success\n"); |
|
|
|
|
nand_config = i; |
|
|
|
|
/*
|
|
|
|
|
* In most cases, 1k sectors are preferred over 512b ones, start |
|
|
|
|
* testing this config first. |
|
|
|
|
*/ |
|
|
|
|
for (conf->ecc_size = 1024; conf->ecc_size >= min_ecc_size; |
|
|
|
|
conf->ecc_size >>= 1) { |
|
|
|
|
int max_ecc_strength = nand_max_ecc_strength(conf); |
|
|
|
|
|
|
|
|
|
nand_apply_config(conf); |
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* We are starting from the maximum ECC strength because |
|
|
|
|
* most of the time NAND vendors provide an OOB area that |
|
|
|
|
* barely meets the ECC requirements. |
|
|
|
|
*/ |
|
|
|
|
for (conf->ecc_strength = max_ecc_strength; |
|
|
|
|
conf->ecc_strength >= 0; |
|
|
|
|
conf->ecc_strength--) { |
|
|
|
|
conf->randomize = false; |
|
|
|
|
if (nand_reset_column()) |
|
|
|
|
return -EIO; |
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Only read the first sector to speedup detection. |
|
|
|
|
*/ |
|
|
|
|
ret = nand_read_page(conf, offs, dest, conf->ecc_size); |
|
|
|
|
if (!ret) { |
|
|
|
|
return 0; |
|
|
|
|
} else if (ret > 0) { |
|
|
|
|
/*
|
|
|
|
|
* If page is empty we can't deduce anything |
|
|
|
|
* about the ECC config => stop the detection. |
|
|
|
|
*/ |
|
|
|
|
return -EINVAL; |
|
|
|
|
} |
|
|
|
|
debug("failed\n"); |
|
|
|
|
|
|
|
|
|
conf->randomize = true; |
|
|
|
|
conf->nseeds = ARRAY_SIZE(random_seed); |
|
|
|
|
do { |
|
|
|
|
if (nand_reset_column()) |
|
|
|
|
return -EIO; |
|
|
|
|
|
|
|
|
|
if (!nand_read_page(conf, offs, dest, |
|
|
|
|
conf->ecc_size)) |
|
|
|
|
return 0; |
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Find the next ->nseeds value that would |
|
|
|
|
* change the randomizer seed for the page |
|
|
|
|
* we're trying to read. |
|
|
|
|
*/ |
|
|
|
|
while (conf->nseeds >= 16) { |
|
|
|
|
int seed = page % conf->nseeds; |
|
|
|
|
|
|
|
|
|
conf->nseeds >>= 1; |
|
|
|
|
if (seed != page % conf->nseeds) |
|
|
|
|
break; |
|
|
|
|
} |
|
|
|
|
} while (conf->nseeds >= 16); |
|
|
|
|
} |
|
|
|
|
return -1; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return nand_read_ecc(nand_configs[nand_config].page_size, |
|
|
|
|
nand_configs[nand_config].ecc_strength, |
|
|
|
|
nand_configs[nand_config].ecc_page_size, |
|
|
|
|
nand_configs[nand_config].addr_cycles, |
|
|
|
|
offs, size, dest, syndrome); |
|
|
|
|
return -EINVAL; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
int nand_spl_load_image(uint32_t offs, unsigned int size, void *dest) |
|
|
|
|
static int nand_detect_config(struct nfc_config *conf, u32 offs, void *dest) |
|
|
|
|
{ |
|
|
|
|
#if CONFIG_SYS_NAND_U_BOOT_OFFS == CONFIG_SPL_PAD_TO |
|
|
|
|
/*
|
|
|
|
|
* u-boot-dtb.bin appended to SPL, use syndrome (like the BROM does) |
|
|
|
|
* and try different erase block sizes to find the backup. |
|
|
|
|
*/ |
|
|
|
|
const uint32_t boot_offsets[] = { |
|
|
|
|
0 * 1024 * 1024 + CONFIG_SYS_NAND_U_BOOT_OFFS, |
|
|
|
|
1 * 1024 * 1024 + CONFIG_SYS_NAND_U_BOOT_OFFS, |
|
|
|
|
2 * 1024 * 1024 + CONFIG_SYS_NAND_U_BOOT_OFFS, |
|
|
|
|
4 * 1024 * 1024 + CONFIG_SYS_NAND_U_BOOT_OFFS, |
|
|
|
|
}; |
|
|
|
|
const int syndrome = 1; |
|
|
|
|
#else |
|
|
|
|
if (conf->valid) |
|
|
|
|
return 0; |
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* u-boot-dtb.bin on its own partition, do not use syndrome, u-boot |
|
|
|
|
* partition sits after 2 eraseblocks (spl, spl-backup), look for |
|
|
|
|
* backup u-boot 1 erase block further. |
|
|
|
|
* Modern NANDs are more likely than legacy ones, so we start testing |
|
|
|
|
* with 5 address cycles. |
|
|
|
|
*/ |
|
|
|
|
const uint32_t eraseblock_size = CONFIG_SYS_NAND_U_BOOT_OFFS / 2; |
|
|
|
|
const uint32_t boot_offsets[] = { |
|
|
|
|
CONFIG_SYS_NAND_U_BOOT_OFFS, |
|
|
|
|
CONFIG_SYS_NAND_U_BOOT_OFFS + eraseblock_size, |
|
|
|
|
}; |
|
|
|
|
const int syndrome = 0; |
|
|
|
|
#endif |
|
|
|
|
int i; |
|
|
|
|
|
|
|
|
|
if (offs == CONFIG_SYS_NAND_U_BOOT_OFFS) { |
|
|
|
|
for (i = 0; i < ARRAY_SIZE(boot_offsets); i++) { |
|
|
|
|
if (nand_read_buffer(boot_offsets[i], size, |
|
|
|
|
dest, syndrome) == 0) |
|
|
|
|
for (conf->addr_cycles = 5; |
|
|
|
|
conf->addr_cycles >= 4; |
|
|
|
|
conf->addr_cycles--) { |
|
|
|
|
int max_page_size = conf->addr_cycles == 4 ? 2048 : 16384; |
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Ignoring 1k pages cause I'm not even sure this case exist |
|
|
|
|
* in the real world. |
|
|
|
|
*/ |
|
|
|
|
for (conf->page_size = 2048; conf->page_size <= max_page_size; |
|
|
|
|
conf->page_size <<= 1) { |
|
|
|
|
if (nand_load_page(conf, offs)) |
|
|
|
|
return -1; |
|
|
|
|
|
|
|
|
|
if (!nand_detect_ecc_config(conf, offs, dest)) { |
|
|
|
|
conf->valid = true; |
|
|
|
|
return 0; |
|
|
|
|
} |
|
|
|
|
} |
|
|
|
|
return -1; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return nand_read_buffer(offs, size, dest, syndrome); |
|
|
|
|
return -EINVAL; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
static int nand_read_buffer(struct nfc_config *conf, uint32_t offs, |
|
|
|
|
unsigned int size, void *dest) |
|
|
|
|
{ |
|
|
|
|
int first_seed, page, ret; |
|
|
|
|
|
|
|
|
|
size = ALIGN(size, conf->page_size); |
|
|
|
|
page = offs / conf->page_size; |
|
|
|
|
first_seed = page % conf->nseeds; |
|
|
|
|
|
|
|
|
|
for (; size; size -= conf->page_size) { |
|
|
|
|
if (nand_load_page(conf, offs)) |
|
|
|
|
return -1; |
|
|
|
|
|
|
|
|
|
ret = nand_read_page(conf, offs, dest, conf->page_size); |
|
|
|
|
/*
|
|
|
|
|
* The ->nseeds value should be equal to the number of pages |
|
|
|
|
* in an eraseblock. Since we don't know this information in |
|
|
|
|
* advance we might have picked a wrong value. |
|
|
|
|
*/ |
|
|
|
|
if (ret < 0 && conf->randomize) { |
|
|
|
|
int cur_seed = page % conf->nseeds; |
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* We already tried all the seed values => we are |
|
|
|
|
* facing a real corruption. |
|
|
|
|
*/ |
|
|
|
|
if (cur_seed < first_seed) |
|
|
|
|
return -EIO; |
|
|
|
|
|
|
|
|
|
/* Try to adjust ->nseeds and read the page again... */ |
|
|
|
|
conf->nseeds = cur_seed; |
|
|
|
|
|
|
|
|
|
if (nand_reset_column()) |
|
|
|
|
return -EIO; |
|
|
|
|
|
|
|
|
|
/* ... it still fails => it's a real corruption. */ |
|
|
|
|
if (nand_read_page(conf, offs, dest, conf->page_size)) |
|
|
|
|
return -EIO; |
|
|
|
|
} else if (ret && conf->randomize) { |
|
|
|
|
memset(dest, 0xff, conf->page_size); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
page++; |
|
|
|
|
offs += conf->page_size; |
|
|
|
|
dest += conf->page_size; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return 0; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
int nand_spl_load_image(uint32_t offs, unsigned int size, void *dest) |
|
|
|
|
{ |
|
|
|
|
static struct nfc_config conf = { }; |
|
|
|
|
int ret; |
|
|
|
|
|
|
|
|
|
ret = nand_detect_config(&conf, offs, dest); |
|
|
|
|
if (ret) |
|
|
|
|
return ret; |
|
|
|
|
|
|
|
|
|
return nand_read_buffer(&conf, offs, size, dest); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
void nand_deselect(void) |
|
|
|
|