commit
23b7b87a37
@ -0,0 +1,56 @@ |
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#
|
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# (C) Copyright 2003-2008
|
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
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#
|
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# (C) Copyright 2008
|
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# Stelian Pop <stelian.pop@leadtechdesign.com>
|
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# Lead Tech Design <www.leadtechdesign.com>
|
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#
|
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# See file CREDITS for list of people who contributed to this
|
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# project.
|
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#
|
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# This program is free software; you can redistribute it and/or
|
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# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
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#
|
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# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
|
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#
|
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# You should have received a copy of the GNU General Public License
|
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# along with this program; if not, write to the Free Software
|
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
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# MA 02111-1307 USA
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#
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|
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).a
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COBJS-y += afeb9260.o
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COBJS-y += partition.o
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COBJS-$(CONFIG_CMD_NAND) += nand.o
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SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS-y))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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|
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clean: |
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rm -f $(SOBJS) $(OBJS)
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|
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distclean: clean |
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rm -f $(LIB) core *.bak .depend
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|
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#########################################################################
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|
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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|
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#########################################################################
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@ -0,0 +1,243 @@ |
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/*
|
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* (C) Copyright 2007-2008 |
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* Stelian Pop <stelian.pop@leadtechdesign.com> |
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* Lead Tech Design <www.leadtechdesign.com> |
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* (C) Copyright 2008 Sergey Lapin <slapin@ossfans.org> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
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* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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|
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#include <common.h> |
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#include <asm/arch/at91sam9260.h> |
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#include <asm/arch/at91sam9260_matrix.h> |
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#include <asm/arch/at91sam9_smc.h> |
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#include <asm/arch/at91_pmc.h> |
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#include <asm/arch/at91_rstc.h> |
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#include <asm/arch/gpio.h> |
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#include <asm/arch/io.h> |
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#include <asm/arch/hardware.h> |
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#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) |
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#include <netdev.h> |
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#include <net.h> |
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#endif |
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|
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DECLARE_GLOBAL_DATA_PTR; |
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|
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/* ------------------------------------------------------------------------- */ |
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/*
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* Miscelaneous platform dependent initialisations |
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*/ |
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static void afeb9260_serial_hw_init(void) |
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{ |
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#ifdef CONFIG_USART0 |
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at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ |
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at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0); |
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#endif |
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|
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#ifdef CONFIG_USART1 |
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at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ |
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at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1); |
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#endif |
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|
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#ifdef CONFIG_USART2 |
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at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ |
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at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2); |
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#endif |
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|
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#ifdef CONFIG_USART3 /* DBGU */ |
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at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */ |
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at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */ |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); |
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#endif |
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} |
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|
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static void afeb9260_nand_hw_init(void) |
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{ |
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unsigned long csa; |
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|
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/* Enable CS3 */ |
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csa = at91_sys_read(AT91_MATRIX_EBICSA); |
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at91_sys_write(AT91_MATRIX_EBICSA, |
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csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); |
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|
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/* Configure SMC CS3 for NAND/SmartMedia */ |
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at91_sys_write(AT91_SMC_SETUP(3), |
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AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | |
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AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); |
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at91_sys_write(AT91_SMC_PULSE(3), |
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AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | |
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AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); |
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at91_sys_write(AT91_SMC_CYCLE(3), |
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AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); |
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at91_sys_write(AT91_SMC_MODE(3), |
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AT91_SMC_READMODE | AT91_SMC_WRITEMODE | |
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AT91_SMC_EXNWMODE_DISABLE | |
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AT91_SMC_DBW_8 | |
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AT91_SMC_TDF_(2)); |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC); |
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|
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/* Configure RDY/BSY */ |
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at91_set_gpio_input(AT91_PIN_PC13, 1); |
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|
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/* Enable NandFlash */ |
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at91_set_gpio_output(AT91_PIN_PC14, 1); |
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} |
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|
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static void afeb9260_spi_hw_init(void) |
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{ |
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at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */ |
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at91_set_B_periph(AT91_PIN_PC11, 0); /* SPI0_NPCS1 */ |
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at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ |
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at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ |
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at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ |
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|
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/* Enable clock */ |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0); |
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} |
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|
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#ifdef CONFIG_MACB |
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static void afeb9260_macb_hw_init(void) |
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{ |
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/* Enable clock */ |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC); |
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|
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/*
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* Disable pull-up on: |
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* RXDV (PA17) => PHY normal mode (not Test mode) |
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* ERX0 (PA14) => PHY ADDR0 |
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* ERX1 (PA15) => PHY ADDR1 |
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* ERX2 (PA25) => PHY ADDR2 |
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* ERX3 (PA26) => PHY ADDR3 |
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* ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 |
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* |
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* PHY has internal pull-down |
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*/ |
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writel(pin_to_mask(AT91_PIN_PA14) | |
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pin_to_mask(AT91_PIN_PA15) | |
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pin_to_mask(AT91_PIN_PA17) | |
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pin_to_mask(AT91_PIN_PA25) | |
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pin_to_mask(AT91_PIN_PA26) | |
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pin_to_mask(AT91_PIN_PA28), |
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pin_to_controller(AT91_PIN_PA0) + PIO_PUDR); |
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|
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/* Need to reset PHY -> 500ms reset */ |
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at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | |
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AT91_RSTC_ERSTL | (0x0D << 8) | |
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AT91_RSTC_URSTEN); |
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at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); |
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|
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/* Wait for end hardware reset */ |
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while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)); |
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|
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/* Restore NRST value */ |
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at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | |
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AT91_RSTC_ERSTL | (0x0 << 8) | |
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AT91_RSTC_URSTEN); |
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|
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/* Re-enable pull-up */ |
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writel(pin_to_mask(AT91_PIN_PA14) | |
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pin_to_mask(AT91_PIN_PA15) | |
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pin_to_mask(AT91_PIN_PA17) | |
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pin_to_mask(AT91_PIN_PA25) | |
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pin_to_mask(AT91_PIN_PA26) | |
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pin_to_mask(AT91_PIN_PA28), |
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pin_to_controller(AT91_PIN_PA0) + PIO_PUER); |
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|
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at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */ |
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at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */ |
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at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */ |
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at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */ |
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at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */ |
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at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */ |
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at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */ |
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at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */ |
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at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */ |
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at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */ |
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|
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#ifndef CONFIG_RMII |
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at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */ |
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at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */ |
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at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */ |
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at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */ |
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at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */ |
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at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */ |
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at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */ |
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at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */ |
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#endif |
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|
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} |
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#endif |
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|
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int board_init(void) |
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{ |
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/* Enable Ctrlc */ |
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console_init_f(); |
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|
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/* arch number of AT91SAM9260EK-Board */ |
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gd->bd->bi_arch_number = MACH_TYPE_AFEB9260; |
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/* adress of boot parameters */ |
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
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|
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afeb9260_serial_hw_init(); |
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#ifdef CONFIG_CMD_NAND |
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afeb9260_nand_hw_init(); |
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#endif |
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afeb9260_spi_hw_init(); |
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#ifdef CONFIG_MACB |
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afeb9260_macb_hw_init(); |
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#endif |
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|
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return 0; |
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} |
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|
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int dram_init(void) |
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{ |
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gd->bd->bi_dram[0].start = PHYS_SDRAM; |
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gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; |
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return 0; |
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} |
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|
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#ifdef CONFIG_RESET_PHY_R |
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void reset_phy(void) |
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{ |
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#ifdef CONFIG_MACB |
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/*
|
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* Initialize ethernet HW addr prior to starting Linux, |
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* needed for nfsroot |
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*/ |
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eth_init(gd->bd); |
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#endif |
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} |
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#endif |
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|
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int board_eth_init(bd_t *bis) |
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{ |
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int rc = 0; |
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#ifdef CONFIG_MACB |
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rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x00); |
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#endif |
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return rc; |
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} |
@ -0,0 +1 @@ |
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TEXT_BASE = 0x21f00000
|
@ -0,0 +1,78 @@ |
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/*
|
||||
* (C) Copyright 2007-2008 |
||||
* Stelian Pop <stelian.pop@leadtechdesign.com> |
||||
* Lead Tech Design <www.leadtechdesign.com> |
||||
* |
||||
* (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
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#include <asm/arch/at91sam9260.h> |
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#include <asm/arch/gpio.h> |
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#include <asm/arch/at91_pio.h> |
||||
|
||||
#include <nand.h> |
||||
|
||||
/*
|
||||
* hardware specific access to control-lines |
||||
*/ |
||||
#define MASK_ALE (1 << 21) /* our ALE is AD21 */ |
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#define MASK_CLE (1 << 22) /* our CLE is AD22 */ |
||||
|
||||
static void at91sam9260ek_nand_hwcontrol(struct mtd_info *mtd, |
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int cmd, unsigned int ctrl) |
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{ |
||||
struct nand_chip *this = mtd->priv; |
||||
|
||||
if (ctrl & NAND_CTRL_CHANGE) { |
||||
ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; |
||||
IO_ADDR_W &= ~(MASK_ALE | MASK_CLE); |
||||
|
||||
if (ctrl & NAND_CLE) |
||||
IO_ADDR_W |= MASK_CLE; |
||||
if (ctrl & NAND_ALE) |
||||
IO_ADDR_W |= MASK_ALE; |
||||
|
||||
at91_set_gpio_value(AT91_PIN_PC14, !(ctrl & NAND_NCE)); |
||||
this->IO_ADDR_W = (void *) IO_ADDR_W; |
||||
} |
||||
|
||||
if (cmd != NAND_CMD_NONE) |
||||
writeb(cmd, this->IO_ADDR_W); |
||||
} |
||||
|
||||
static int at91sam9260ek_nand_ready(struct mtd_info *mtd) |
||||
{ |
||||
return at91_get_gpio_value(AT91_PIN_PC13); |
||||
} |
||||
|
||||
int board_nand_init(struct nand_chip *nand) |
||||
{ |
||||
nand->ecc.mode = NAND_ECC_SOFT; |
||||
#ifdef CONFIG_SYS_NAND_DBW_16 |
||||
nand->options = NAND_BUSWIDTH_16; |
||||
#endif |
||||
nand->cmd_ctrl = at91sam9260ek_nand_hwcontrol; |
||||
nand->dev_ready = at91sam9260ek_nand_ready; |
||||
nand->chip_delay = 20; |
||||
|
||||
return 0; |
||||
} |
@ -0,0 +1,37 @@ |
||||
/*
|
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
* |
||||
*/ |
||||
#include <common.h> |
||||
#include <config.h> |
||||
#include <asm/hardware.h> |
||||
#include <dataflash.h> |
||||
|
||||
AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; |
||||
|
||||
struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { |
||||
{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ |
||||
{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1, 1} |
||||
}; |
||||
|
||||
/*define the area offsets*/ |
||||
dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { |
||||
{0x00000000, 0x000041FF, FLAG_PROTECT_CLEAR, 0, "Bootstrap"}, |
||||
{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, |
||||
{0x00008400, 0x00041FFF, FLAG_PROTECT_CLEAR, 0, "U-Boot"}, |
||||
}; |
||||
|
@ -0,0 +1,169 @@ |
||||
/*
|
||||
* (C) Copyright 2008 Sergey Lapin <slapin@ossfans.org> |
||||
* |
||||
* Configuation settings for the AFEB9260 board. |
||||
* Based on configuration for AT91SAM9260-EK |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
|
||||
/* ARM asynchronous clock */ |
||||
#define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */ |
||||
#define AT91_MASTER_CLOCK 89999598 /* peripheral = main / 2 */ |
||||
#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ |
||||
|
||||
#define AT91_SLOW_CLOCK 32768 /* slow clock */ |
||||
|
||||
#define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/ |
||||
#define CONFIG_AFEB9260 1 /* on an AFEB9260 Board */ |
||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
||||
|
||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
||||
#define CONFIG_SETUP_MEMORY_TAGS 1 |
||||
#define CONFIG_INITRD_TAG 1 |
||||
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT |
||||
#define CONFIG_SKIP_RELOCATE_UBOOT |
||||
|
||||
/*
|
||||
* Hardware drivers |
||||
*/ |
||||
#define CONFIG_ATMEL_USART 1 |
||||
#undef CONFIG_USART0 |
||||
#undef CONFIG_USART1 |
||||
#undef CONFIG_USART2 |
||||
#define CONFIG_USART3 1 /* USART 3 is DBGU */ |
||||
|
||||
#define CONFIG_BOOTDELAY 3 |
||||
|
||||
/*
|
||||
* BOOTP options |
||||
*/ |
||||
#define CONFIG_BOOTP_BOOTFILESIZE 1 |
||||
#define CONFIG_BOOTP_BOOTPATH 1 |
||||
#define CONFIG_BOOTP_GATEWAY 1 |
||||
#define CONFIG_BOOTP_HOSTNAME 1 |
||||
|
||||
/*
|
||||
* Command line configuration. |
||||
*/ |
||||
#include <config_cmd_default.h> |
||||
#undef CONFIG_CMD_BDI |
||||
#undef CONFIG_CMD_IMI |
||||
#undef CONFIG_CMD_AUTOSCRIPT |
||||
#undef CONFIG_CMD_FPGA |
||||
#undef CONFIG_CMD_LOADS |
||||
#undef CONFIG_CMD_IMLS |
||||
|
||||
#define CONFIG_CMD_PING 1 |
||||
#define CONFIG_CMD_DHCP 1 |
||||
|
||||
#define CONFIG_CMD_NAND 1 |
||||
#define CONFIG_CMD_USB 1 |
||||
|
||||
/* SDRAM */ |
||||
#define CONFIG_NR_DRAM_BANKS 1 |
||||
#define PHYS_SDRAM 0x20000000 |
||||
#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ |
||||
|
||||
/* DataFlash */ |
||||
#define CONFIG_HAS_DATAFLASH 1 |
||||
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) |
||||
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 |
||||
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ |
||||
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ |
||||
#define AT91_SPI_CLK 15000000 |
||||
#define DATAFLASH_TCSS (0x1a << 16) |
||||
#define DATAFLASH_TCHS (0x1 << 24) |
||||
|
||||
/* NAND flash */ |
||||
#define NAND_MAX_CHIPS 1 |
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 |
||||
#define CONFIG_SYS_NAND_BASE 0x40000000 |
||||
#define CONFIG_SYS_NAND_DBW_8 1 |
||||
|
||||
/* NOR flash - no real flash on this board */ |
||||
#define CONFIG_SYS_NO_FLASH 1 |
||||
|
||||
/* Ethernet */ |
||||
#define CONFIG_MACB 1 |
||||
#undef CONFIG_RMII /* We have full MII there */ |
||||
#define CONFIG_RESET_PHY_R 1 |
||||
|
||||
#define CONFIG_NET_MULTI 1 |
||||
#define CONFIG_NET_RETRY_COUNT 20 |
||||
|
||||
/* USB */ |
||||
#define CONFIG_USB_OHCI_NEW 1 |
||||
#define LITTLEENDIAN 1 |
||||
#define CONFIG_DOS_PARTITION 1 |
||||
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 |
||||
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ |
||||
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" |
||||
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 |
||||
#define CONFIG_USB_STORAGE 1 |
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* load address */ |
||||
|
||||
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM |
||||
#define CONFIG_SYS_MEMTEST_END 0x21e00000 |
||||
|
||||
#undef CONFIG_SYS_USE_DATAFLASH_CS0 |
||||
#define CONFIG_SYS_USE_DATAFLASH_CS1 1 |
||||
#undef CONFIG_SYS_USE_NANDFLASH |
||||
|
||||
/* bootstrap + u-boot + env + linux in dataflash on CS1 */ |
||||
#define CONFIG_ENV_IS_IN_DATAFLASH 1 |
||||
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400) |
||||
#define CONFIG_ENV_OFFSET 0x4200 |
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET) |
||||
#define CONFIG_ENV_SIZE 0x4200 |
||||
#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0xa0000 0x200000; bootm" |
||||
#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
||||
"root=/dev/mtdblock2 " \
|
||||
"rw rootfstype=jffs2 panic=20" |
||||
|
||||
#define CONFIG_BAUDRATE 115200 |
||||
#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } |
||||
|
||||
#define CONFIG_SYS_PROMPT "U-Boot> " |
||||
#define CONFIG_SYS_CBSIZE 256 |
||||
#define CONFIG_SYS_MAXARGS 16 |
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
||||
#define CFG_LONGHELP 1 |
||||
#define CONFIG_CMDLINE_EDITING 1 |
||||
|
||||
#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) |
||||
/*
|
||||
* Size of malloc() pool |
||||
*/ |
||||
#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ |
||||
|
||||
#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ |
||||
|
||||
#ifdef CONFIG_USE_IRQ |
||||
#error CONFIG_USE_IRQ not supported |
||||
#endif |
||||
|
||||
#endif |
||||
|
Loading…
Reference in new issue