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@ -132,11 +132,38 @@ char *get_cpu_rev(void) |
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return "unknown"; |
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} |
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char *get_reset_cause(void) |
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{ |
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/* read RCSR register from CCM module */ |
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struct clock_control_regs *ccm = |
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(struct clock_control_regs *)CCM_BASE; |
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u32 cause = readl(&ccm->rcsr) & 0x07; |
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switch (cause) { |
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case 0x0000: |
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return "POR"; |
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break; |
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case 0x0001: |
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return "RST"; |
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break; |
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case 0x0002: |
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return "WDOG"; |
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break; |
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case 0x0006: |
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return "JTAG"; |
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break; |
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default: |
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return "unknown reset"; |
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} |
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} |
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#if defined(CONFIG_DISPLAY_CPUINFO) |
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int print_cpuinfo (void) |
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{ |
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printf("CPU: Freescale i.MX31 rev %s at %d MHz\n", |
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printf("CPU: Freescale i.MX31 rev %s at %d MHz.", |
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get_cpu_rev(), mx31_get_mcu_main_clk() / 1000000); |
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printf("Reset cause: %s\n", get_reset_cause()); |
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return 0; |
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} |
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#endif |
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