Add ddr3 commands: test <start_addr in hex> <end_addr in hex> - test DDR from start\n address to end address\n ddr compare <start_addr in hex> <end_addr in hex> <size in hex> -\n compare DDR data of (size) bytes from start address to end address\n ddr ecc_err <addr in hex> <bit_err in hex> - generate bit errors\n in DDR data at <addr>, the command will read a 32-bit data\n from <addr>, and write (data ^ bit_err) back to <addr>\n Delete CONFIG_MAX_UBOOT_MEM_SIZE, as it was supposed to be used for ddr3 commands and for now it's not needed any more. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>master
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/*
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* Keystone2: DDR3 test commands |
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* |
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* (C) Copyright 2012-2014 |
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* Texas Instruments Incorporated, <www.ti.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <asm/arch/hardware.h> |
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#include <asm/arch/ddr3.h> |
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#include <common.h> |
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#include <command.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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#define DDR_MIN_ADDR CONFIG_SYS_SDRAM_BASE |
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#define DDR_REMAP_ADDR 0x80000000 |
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#define ECC_START_ADDR1 ((DDR_MIN_ADDR - DDR_REMAP_ADDR) >> 17) |
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#define ECC_END_ADDR1 (((gd->start_addr_sp - DDR_REMAP_ADDR - \ |
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CONFIG_STACKSIZE) >> 17) - 2) |
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#define DDR_TEST_BURST_SIZE 1024 |
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static int ddr_memory_test(u32 start_address, u32 end_address, int quick) |
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{ |
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u32 index_start, value, index; |
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index_start = start_address; |
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while (1) { |
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/* Write a pattern */ |
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for (index = index_start; |
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index < index_start + DDR_TEST_BURST_SIZE; |
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index += 4) |
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__raw_writel(index, index); |
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/* Read and check the pattern */ |
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for (index = index_start; |
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index < index_start + DDR_TEST_BURST_SIZE; |
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index += 4) { |
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value = __raw_readl(index); |
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if (value != index) { |
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printf("ddr_memory_test: Failed at address index = 0x%x value = 0x%x *(index) = 0x%x\n", |
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index, value, __raw_readl(index)); |
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return -1; |
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} |
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} |
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index_start += DDR_TEST_BURST_SIZE; |
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if (index_start >= end_address) |
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break; |
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if (quick) |
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continue; |
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/* Write a pattern for complementary values */ |
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for (index = index_start; |
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index < index_start + DDR_TEST_BURST_SIZE; |
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index += 4) |
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__raw_writel((u32)~index, index); |
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/* Read and check the pattern */ |
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for (index = index_start; |
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index < index_start + DDR_TEST_BURST_SIZE; |
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index += 4) { |
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value = __raw_readl(index); |
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if (value != ~index) { |
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printf("ddr_memory_test: Failed at address index = 0x%x value = 0x%x *(index) = 0x%x\n", |
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index, value, __raw_readl(index)); |
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return -1; |
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} |
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} |
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index_start += DDR_TEST_BURST_SIZE; |
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if (index_start >= end_address) |
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break; |
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/* Write a pattern */ |
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for (index = index_start; |
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index < index_start + DDR_TEST_BURST_SIZE; |
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index += 2) |
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__raw_writew((u16)index, index); |
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/* Read and check the pattern */ |
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for (index = index_start; |
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index < index_start + DDR_TEST_BURST_SIZE; |
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index += 2) { |
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value = __raw_readw(index); |
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if (value != (u16)index) { |
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printf("ddr_memory_test: Failed at address index = 0x%x value = 0x%x *(index) = 0x%x\n", |
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index, value, __raw_readw(index)); |
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return -1; |
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} |
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} |
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index_start += DDR_TEST_BURST_SIZE; |
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if (index_start >= end_address) |
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break; |
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/* Write a pattern */ |
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for (index = index_start; |
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index < index_start + DDR_TEST_BURST_SIZE; |
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index += 1) |
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__raw_writeb((u8)index, index); |
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/* Read and check the pattern */ |
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for (index = index_start; |
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index < index_start + DDR_TEST_BURST_SIZE; |
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index += 1) { |
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value = __raw_readb(index); |
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if (value != (u8)index) { |
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printf("ddr_memory_test: Failed at address index = 0x%x value = 0x%x *(index) = 0x%x\n", |
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index, value, __raw_readb(index)); |
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return -1; |
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} |
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} |
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index_start += DDR_TEST_BURST_SIZE; |
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if (index_start >= end_address) |
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break; |
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} |
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puts("ddr memory test PASSED!\n"); |
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return 0; |
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} |
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static int ddr_memory_compare(u32 address1, u32 address2, u32 size) |
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{ |
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u32 index, value, index2, value2; |
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for (index = address1, index2 = address2; |
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index < address1 + size; |
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index += 4, index2 += 4) { |
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value = __raw_readl(index); |
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value2 = __raw_readl(index2); |
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if (value != value2) { |
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printf("ddr_memory_test: Compare failed at address = 0x%x value = 0x%x, address2 = 0x%x value2 = 0x%x\n", |
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index, value, index2, value2); |
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return -1; |
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} |
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} |
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puts("ddr memory compare PASSED!\n"); |
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return 0; |
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} |
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static int ddr_memory_ecc_err(u32 base, u32 address, u32 ecc_err) |
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{ |
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u32 value1, value2, value3; |
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puts("Disabling DDR ECC ...\n"); |
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ddr3_disable_ecc(base); |
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value1 = __raw_readl(address); |
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value2 = value1 ^ ecc_err; |
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__raw_writel(value2, address); |
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value3 = __raw_readl(address); |
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printf("ECC err test, addr 0x%x, read data 0x%x, wrote data 0x%x, err pattern: 0x%x, read after write data 0x%x\n", |
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address, value1, value2, ecc_err, value3); |
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__raw_writel(ECC_START_ADDR1 | (ECC_END_ADDR1 << 16), |
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base + KS2_DDR3_ECC_ADDR_RANGE1_OFFSET); |
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puts("Enabling DDR ECC ...\n"); |
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ddr3_enable_ecc(base, 1); |
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value1 = __raw_readl(address); |
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printf("ECC err test, addr 0x%x, read data 0x%x\n", address, value1); |
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ddr3_check_ecc_int(base); |
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return 0; |
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} |
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static int do_ddr_test(cmd_tbl_t *cmdtp, |
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int flag, int argc, char * const argv[]) |
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{ |
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u32 start_addr, end_addr, size, ecc_err; |
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if ((argc == 4) && (strncmp(argv[1], "ecc_err", 8) == 0)) { |
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if (!ddr3_ecc_support_rmw(KS2_DDR3A_EMIF_CTRL_BASE)) { |
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puts("ECC RMW isn't supported for this SOC\n"); |
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return 1; |
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} |
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start_addr = simple_strtoul(argv[2], NULL, 16); |
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ecc_err = simple_strtoul(argv[3], NULL, 16); |
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if ((start_addr < CONFIG_SYS_SDRAM_BASE) || |
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(start_addr > (CONFIG_SYS_SDRAM_BASE + |
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CONFIG_MAX_RAM_BANK_SIZE - 1))) { |
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puts("Invalid address!\n"); |
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return cmd_usage(cmdtp); |
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} |
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ddr_memory_ecc_err(KS2_DDR3A_EMIF_CTRL_BASE, |
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start_addr, ecc_err); |
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return 0; |
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} |
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if (!(((argc == 4) && (strncmp(argv[1], "test", 5) == 0)) || |
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((argc == 5) && (strncmp(argv[1], "compare", 8) == 0)))) |
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return cmd_usage(cmdtp); |
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start_addr = simple_strtoul(argv[2], NULL, 16); |
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end_addr = simple_strtoul(argv[3], NULL, 16); |
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if ((start_addr < CONFIG_SYS_SDRAM_BASE) || |
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(start_addr > (CONFIG_SYS_SDRAM_BASE + |
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CONFIG_MAX_RAM_BANK_SIZE - 1)) || |
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(end_addr < CONFIG_SYS_SDRAM_BASE) || |
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(end_addr > (CONFIG_SYS_SDRAM_BASE + |
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CONFIG_MAX_RAM_BANK_SIZE - 1)) || (start_addr >= end_addr)) { |
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puts("Invalid start or end address!\n"); |
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return cmd_usage(cmdtp); |
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} |
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puts("Please wait ...\n"); |
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if (argc == 5) { |
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size = simple_strtoul(argv[4], NULL, 16); |
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ddr_memory_compare(start_addr, end_addr, size); |
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} else { |
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ddr_memory_test(start_addr, end_addr, 0); |
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} |
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return 0; |
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} |
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U_BOOT_CMD(ddr, 5, 1, do_ddr_test, |
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"DDR3 test", |
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"test <start_addr in hex> <end_addr in hex> - test DDR from start\n" |
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" address to end address\n" |
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"ddr compare <start_addr in hex> <end_addr in hex> <size in hex> -\n" |
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" compare DDR data of (size) bytes from start address to end\n" |
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" address\n" |
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"ddr ecc_err <addr in hex> <bit_err in hex> - generate bit errors\n" |
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" in DDR data at <addr>, the command will read a 32-bit data\n" |
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" from <addr>, and write (data ^ bit_err) back to <addr>\n" |
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); |
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