The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>master
Masahiro Yamada
9 years ago
parent
323d1f9d5b
commit
28f40d4a4d
@ -0,0 +1,64 @@ |
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/* |
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* Device Tree Source for UniPhier PH1-Pro5 4KBOX Board (EVB-Pro5-4KBOX-M-V0) |
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* |
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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/dts-v1/; |
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/include/ "uniphier-ph1-pro5.dtsi" |
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/ { |
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model = "UniPhier PH1-Pro5 4KBOX Board"; |
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compatible = "socionext,ph1-pro5-4kbox", "socionext,ph1-pro5"; |
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memory { |
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device_type = "memory"; |
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reg = <0x80000000 0x40000000>; |
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}; |
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|
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chosen { |
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bootargs = "console=ttyS1,115200"; |
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stdout-path = &serial1; |
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}; |
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aliases { |
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serial1 = &serial1; |
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serial2 = &serial2; |
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i2c0 = &i2c0; |
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i2c5 = &i2c5; |
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i2c6 = &i2c6; |
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}; |
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}; |
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|
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&serial1 { |
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status = "okay"; |
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}; |
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&serial2 { |
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status = "okay"; |
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}; |
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&i2c0 { |
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status = "okay"; |
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}; |
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|
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/* for U-boot only */ |
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/ { |
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soc { |
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u-boot,dm-pre-reloc; |
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}; |
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}; |
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|
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&serial1 { |
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u-boot,dm-pre-reloc; |
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}; |
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|
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&pinctrl { |
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u-boot,dm-pre-reloc; |
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}; |
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&pinctrl_uart1 { |
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u-boot,dm-pre-reloc; |
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}; |
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@ -0,0 +1,75 @@ |
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/*
|
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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#include <common.h> |
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#include <spl.h> |
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#include <linux/io.h> |
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#include <mach/boot-device.h> |
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#include <mach/sbc-regs.h> |
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#include <mach/sg-regs.h> |
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|
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static struct boot_device_info boot_device_table[] = { |
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128MB, Addr 4)"}, |
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{BOOT_DEVICE_NONE, "Reserved"}, |
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{BOOT_DEVICE_NONE, "Reserved"}, |
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{BOOT_DEVICE_NONE, "Reserved"}, |
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{BOOT_DEVICE_NONE, "Reserved"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512MB, Addr 5)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"}, |
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{BOOT_DEVICE_NONE, "Reserved"}, |
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{BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"}, |
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{BOOT_DEVICE_NONE, "Reserved"}, |
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{BOOT_DEVICE_NONE, "Reserved"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128MB, Addr 5)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, |
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, |
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{ /* sentinel */ } |
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}; |
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static int get_boot_mode_sel(void) |
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{ |
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return (readl(SG_PINMON0) >> 1) & 0x1f; |
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} |
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u32 ph1_pro5_boot_device(void) |
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{ |
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int boot_mode; |
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boot_mode = get_boot_mode_sel(); |
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return boot_device_table[boot_mode].type; |
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} |
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void ph1_pro5_boot_mode_show(void) |
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{ |
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int mode_sel, i; |
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mode_sel = get_boot_mode_sel(); |
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puts("Boot Mode Pin:\n"); |
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for (i = 0; i < ARRAY_SIZE(boot_device_table); i++) |
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printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i, |
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boot_device_table[i].info); |
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} |
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@ -0,0 +1,44 @@ |
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/*
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <linux/io.h> |
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#include <mach/init.h> |
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#include <mach/sc-regs.h> |
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void ph1_pro5_clk_init(void) |
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{ |
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u32 tmp; |
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/* deassert reset */ |
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tmp = readl(SC_RSTCTRL); |
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#ifdef CONFIG_USB_XHCI_UNIPHIER |
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tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; |
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#endif |
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#ifdef CONFIG_NAND_DENALI |
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tmp |= SC_RSTCTRL_NRST_NAND; |
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#endif |
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writel(tmp, SC_RSTCTRL); |
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readl(SC_RSTCTRL); /* dummy read */ |
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#ifdef CONFIG_USB_XHCI_UNIPHIER |
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tmp = readl(SC_RSTCTRL2); |
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tmp |= SC_RSTCTRL2_NRST_USB3B1; |
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writel(tmp, SC_RSTCTRL2); |
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readl(SC_RSTCTRL2); /* dummy read */ |
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#endif |
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/* privide clocks */ |
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tmp = readl(SC_CLKCTRL); |
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#ifdef CONFIG_USB_XHCI_UNIPHIER |
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tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | |
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SC_CLKCTRL_CEN_GIO; |
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#endif |
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#ifdef CONFIG_NAND_DENALI |
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tmp |= SC_CLKCTRL_CEN_NAND; |
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#endif |
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writel(tmp, SC_CLKCTRL); |
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readl(SC_CLKCTRL); /* dummy read */ |
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} |
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@ -0,0 +1,39 @@ |
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/*
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* Copyright (C) 2015 Masahiro Yamada <yamada.m@jp.panasonic.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <linux/io.h> |
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#include <mach/init.h> |
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#include <mach/sc-regs.h> |
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int ph1_pro5_early_clk_init(const struct uniphier_board_data *bd) |
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{ |
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u32 tmp; |
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/*
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* deassert reset |
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* UMCA2: Ch1 (DDR3) |
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* UMCA1, UMC31: Ch0 (WIO1) |
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* UMCA0, UMC30: Ch0 (WIO0) |
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*/ |
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tmp = readl(SC_RSTCTRL4); |
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tmp |= SC_RSTCTRL4_NRST_UMCSB | SC_RSTCTRL4_NRST_UMCA2 | |
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SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 | |
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SC_RSTCTRL4_NRST_UMC31 | SC_RSTCTRL4_NRST_UMC30; |
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writel(tmp, SC_RSTCTRL4); |
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readl(SC_RSTCTRL); /* dummy read */ |
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/* privide clocks */ |
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tmp = readl(SC_CLKCTRL); |
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tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; |
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writel(tmp, SC_CLKCTRL); |
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tmp = readl(SC_CLKCTRL4); |
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tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC1 | |
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SC_CLKCTRL4_CEN_UMC0; |
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writel(tmp, SC_CLKCTRL4); |
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readl(SC_CLKCTRL4); /* dummy read */ |
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return 0; |
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} |
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@ -0,0 +1,42 @@ |
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/*
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <spl.h> |
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#include <linux/compiler.h> |
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#include <mach/init.h> |
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#include <mach/micro-support-card.h> |
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int ph1_pro5_init(const struct uniphier_board_data *bd) |
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{ |
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ph1_pro4_sbc_init(bd); |
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support_card_reset(); |
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support_card_init(); |
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led_puts("L0"); |
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memconf_init(bd); |
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led_puts("L1"); |
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ph1_pro5_early_clk_init(bd); |
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led_puts("L2"); |
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led_puts("L3"); |
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#ifdef CONFIG_SPL_SERIAL_SUPPORT |
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preloader_console_init(); |
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#endif |
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led_puts("L4"); |
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led_puts("L5"); |
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return 0; |
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} |
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@ -0,0 +1,43 @@ |
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/*
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <linux/io.h> |
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#include <mach/init.h> |
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#include <mach/sg-regs.h> |
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void ph1_pro5_pin_init(void) |
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{ |
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/* Comment format: PAD Name -> Function Name */ |
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#ifdef CONFIG_NAND_DENALI |
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sg_set_pinsel(19, 0, 4, 8); /* XNFRE -> XNFRE */ |
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sg_set_pinsel(20, 0, 4, 8); /* XNFWE -> XNFWE */ |
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sg_set_pinsel(21, 0, 4, 8); /* NFALE -> NFALE */ |
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sg_set_pinsel(22, 0, 4, 8); /* NFCLE -> NFCLE */ |
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sg_set_pinsel(23, 0, 4, 8); /* XNFWP -> XNFWP */ |
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sg_set_pinsel(24, 0, 4, 8); /* XNFCE0 -> XNFCE0 */ |
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sg_set_pinsel(25, 0, 4, 8); /* NRYBY0 -> NRYBY0 */ |
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sg_set_pinsel(26, 0, 4, 8); /* XNFCE1 -> XNFCE1 */ |
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sg_set_pinsel(27, 0, 4, 8); /* NRYBY1 -> NRYBY1 */ |
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sg_set_pinsel(28, 0, 4, 8); /* NFD0 -> NFD0 */ |
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sg_set_pinsel(29, 0, 4, 8); /* NFD1 -> NFD1 */ |
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sg_set_pinsel(30, 0, 4, 8); /* NFD2 -> NFD2 */ |
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sg_set_pinsel(31, 0, 4, 8); /* NFD3 -> NFD3 */ |
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sg_set_pinsel(32, 0, 4, 8); /* NFD4 -> NFD4 */ |
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sg_set_pinsel(33, 0, 4, 8); /* NFD5 -> NFD5 */ |
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sg_set_pinsel(34, 0, 4, 8); /* NFD6 -> NFD6 */ |
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sg_set_pinsel(35, 0, 4, 8); /* NFD7 -> NFD7 */ |
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#endif |
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#ifdef CONFIG_USB_XHCI_UNIPHIER |
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sg_set_pinsel(124, 0, 4, 8); /* USB0VBUS -> USB0VBUS */ |
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sg_set_pinsel(125, 0, 4, 8); /* USB0OD -> USB0OD */ |
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sg_set_pinsel(126, 0, 4, 8); /* USB1VBUS -> USB1VBUS */ |
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sg_set_pinsel(127, 0, 4, 8); /* USB1OD -> USB1OD */ |
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#endif |
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writel(1, SG_LOADPINCTRL); |
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} |
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@ -0,0 +1,30 @@ |
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CONFIG_ARM=y |
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CONFIG_ARCH_UNIPHIER=y |
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CONFIG_ARCH_UNIPHIER_PH1_PRO5=y |
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CONFIG_SYS_MALLOC_F_LEN=0x2000 |
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CONFIG_MICRO_SUPPORT_CARD=y |
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CONFIG_SYS_TEXT_BASE=0x84000000 |
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CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro5-4kbox" |
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CONFIG_HUSH_PARSER=y |
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# CONFIG_CMD_XIMG is not set |
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# CONFIG_CMD_ENV_EXISTS is not set |
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CONFIG_CMD_NAND=y |
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CONFIG_CMD_I2C=y |
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CONFIG_CMD_USB=y |
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# CONFIG_CMD_FPGA is not set |
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CONFIG_CMD_TFTPPUT=y |
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CONFIG_CMD_PING=y |
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CONFIG_CMD_TIME=y |
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# CONFIG_CMD_MISC is not set |
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CONFIG_NET_RANDOM_ETHADDR=y |
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CONFIG_SPL_SIMPLE_BUS=y |
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CONFIG_NAND_DENALI=y |
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CONFIG_SYS_NAND_DENALI_64BIT=y |
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CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 |
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CONFIG_SPL_NAND_DENALI=y |
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CONFIG_UNIPHIER_SERIAL=y |
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CONFIG_PINCTRL=y |
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CONFIG_SPL_PINCTRL=y |
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CONFIG_USB=y |
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CONFIG_USB_XHCI_HCD=y |
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CONFIG_USB_STORAGE=y |
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