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@ -27,16 +27,13 @@ |
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#ifdef CONFIG_HARD_SPI |
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#define SPI_EV_NE 0x80000000 >> 22 /* Receiver Not Empty */ |
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#define SPI_EV_NF 0x80000000 >> 23 /* Transmitter Not Full */ |
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#define SPI_EV_NE (0x80000000 >> 22) /* Receiver Not Empty */ |
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#define SPI_EV_NF (0x80000000 >> 23) /* Transmitter Not Full */ |
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#define SPI_MODE_LOOP 0x80000000 >> 1 /* Loopback mode */ |
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#define SPI_MODE_REV 0x80000000 >> 5 /* Reverse mode - MSB first */ |
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#define SPI_MODE_MS 0x80000000 >> 6 /* Always master */ |
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#define SPI_MODE_EN 0x80000000 >> 7 /* Enable interface */ |
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#define SPI_PRESCALER(reg, div) (reg)=((reg) & 0xfff0ffff) | ((div)<<16) |
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#define SPI_CHARLENGTH(reg, div) (reg)=((reg) & 0xff0fffff) | ((div)<<20) |
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#define SPI_MODE_LOOP (0x80000000 >> 1) /* Loopback mode */ |
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#define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */ |
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#define SPI_MODE_MS (0x80000000 >> 6) /* Always master */ |
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#define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */ |
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#define SPI_TIMEOUT 1000 |
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@ -44,18 +41,19 @@ void spi_init(void) |
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{ |
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volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; |
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/* ------------------------------------------------
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/*
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* SPI pins on the MPC83xx are not muxed, so all we do is initialize |
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* some registers |
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* ------------------------------------------------ */ |
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*/ |
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spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN; |
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SPI_PRESCALER(spi->mode, 1); /* Use SYSCLK / 8 (16.67MHz typ.) */ |
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spi->mode = (spi->mode & 0xfff0ffff) | (1 << 16); /* Use SYSCLK / 8
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(16.67MHz typ.) */ |
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spi->event = 0xffffffff; /* Clear all SPI events */ |
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spi->mask = 0x00000000; /* Mask all SPI interrupts */ |
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spi->com = 0; /* LST bit doesn't do anything, so disregard */ |
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} |
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int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar * dout, uchar * din) |
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int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) |
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{ |
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volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; |
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unsigned int tmpdout, tmpdin, event; |
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@ -81,16 +79,21 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar * dout, uchar * din) |
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/* The LEN field of the SPMODE register is set as follows:
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* |
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* Bit length setting |
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* l <= 4 3 |
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* 4 < l <= 16 l - 1 |
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* l > 16 0 |
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* Bit length setting |
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* len <= 4 3 |
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* 4 < len <= 16 len - 1 |
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* len > 16 0 |
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*/ |
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if (bitlen <= 16) |
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SPI_CHARLENGTH(spi->mode, bitlen <= 4 ? 3 : bitlen - 1); |
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else { |
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SPI_CHARLENGTH(spi->mode, 0); |
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if (bitlen <= 16) { |
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if (bitlen <= 4) |
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spi->mode = (spi->mode & 0xff0fffff) | |
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(3 << 20); |
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else |
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spi->mode = (spi->mode & 0xff0fffff) | |
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((bitlen - 1) << 20); |
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} else { |
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spi->mode = (spi->mode & 0xff0fffff); |
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/* Set up the next iteration if sending > 32 bits */ |
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bitlen -= 32; |
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dout += 4; |
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@ -99,11 +102,11 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar * dout, uchar * din) |
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spi->tx = tmpdout; /* Write the data out */ |
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debug("*** spi_xfer: ... %08x written\n", tmpdout); |
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/* --------------------------------
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/*
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* Wait for SPI transmit to get out |
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* or time out (1 second = 1000 ms) |
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* The NE event must be read and cleared first |
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* -------------------------------- */ |
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*/ |
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for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) { |
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event = spi->event; |
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if (event & SPI_EV_NE) { |
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@ -117,10 +120,12 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar * dout, uchar * din) |
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din += 4; |
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} |
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} |
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/* Only bail when we've had both NE and NF events.
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/*
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* Only bail when we've had both NE and NF events. |
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* This will cause timeouts on RO devices, so maybe |
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* in the future put an arbitrary delay after writing |
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* the device. Arbitrary delays suck, though... */ |
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* the device. Arbitrary delays suck, though... |
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*/ |
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if (isRead && (event & SPI_EV_NF)) |
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break; |
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} |
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@ -132,7 +137,7 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar * dout, uchar * din) |
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if (chipsel != NULL) |
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(*chipsel) (0); /* deselect the target chip */ |
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return 0; |
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} |
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#endif /* CONFIG_HARD_SPI */ |
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