x86: Drop asm/arch/gpio.h

asm/arch/gpio.h is not needed anymore as we get the GPIO base from
PCH driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

arch/x86/include/asm/arch-baytrail/gpio.h

@@ -1,13 +0,0 @@
-/*
- * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef _X86_ARCH_GPIO_H_
-#define _X86_ARCH_GPIO_H_
-
-/* Where in config space is the register that points to the GPIO registers? */
-#define PCI_CFG_GPIOBASE 0x48
-
-#endif /* _X86_ARCH_GPIO_H_ */

arch/x86/include/asm/arch-coreboot/gpio.h

@@ -1,13 +0,0 @@
-/*
- * Copyright (c) 2014, Google Inc.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef _X86_ARCH_GPIO_H_
-#define _X86_ARCH_GPIO_H_
-
-/* Where in config space is the register that points to the GPIO registers? */
-#define PCI_CFG_GPIOBASE 0x48
-
-#endif /* _X86_ARCH_GPIO_H_ */

arch/x86/include/asm/arch-efi/gpio.h

@@ -1,10 +0,0 @@
-/*
- * Copyright (c) 2015 Google, Inc.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef _X86_ARCH_GPIO_H_
-#define _X86_ARCH_GPIO_H_
-
-#endif /* _X86_ARCH_GPIO_H_ */

arch/x86/include/asm/arch-ivybridge/gpio.h

@@ -1,13 +0,0 @@
-/*
- * Copyright (c) 2014, Google Inc.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef _X86_ARCH_GPIO_H_
-#define _X86_ARCH_GPIO_H_
-
-/* Where in config space is the register that points to the GPIO registers? */
-#define PCI_CFG_GPIOBASE 0x48
-
-#endif /* _X86_ARCH_GPIO_H_ */

arch/x86/include/asm/arch-qemu/gpio.h

@@ -1,13 +0,0 @@
-/*
- * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef _X86_ARCH_GPIO_H_
-#define _X86_ARCH_GPIO_H_
-
-/* Where in config space is the register that points to the GPIO registers? */
-#define PCI_CFG_GPIOBASE 0x44
-
-#endif /* _X86_ARCH_GPIO_H_ */

arch/x86/include/asm/arch-quark/gpio.h

@@ -1,13 +0,0 @@
-/*
- * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef _X86_ARCH_GPIO_H_
-#define _X86_ARCH_GPIO_H_
-
-/* Where in config space is the register that points to the GPIO registers? */
-#define PCI_CFG_GPIOBASE 0x44
-
-#endif /* _X86_ARCH_GPIO_H_ */

arch/x86/include/asm/arch-queensbay/gpio.h

@@ -1,13 +0,0 @@
-/*
- * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef _X86_ARCH_GPIO_H_
-#define _X86_ARCH_GPIO_H_
-
-/* Where in config space is the register that points to the GPIO registers? */
-#define PCI_CFG_GPIOBASE 0x44
-
-#endif /* _X86_ARCH_GPIO_H_ */

arch/x86/include/asm/gpio.h

@@ -7,7 +7,6 @@
 #define _X86_GPIO_H_
 
 #include <linux/compiler.h>
-#include <asm/arch/gpio.h>
 #include <asm-generic/gpio.h>
 
 struct ich6_bank_platdata {

board/intel/galileo/galileo.c

@@ -7,7 +7,6 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/device.h>
-#include <asm/arch/gpio.h>
 #include <asm/arch/quark.h>
 
 int board_early_init_f(void)
@@ -30,7 +29,7 @@ void board_assert_perst(void)
 	u32 base, port, val;
 
 	/* retrieve the GPIO IO base */
-	qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, PCI_CFG_GPIOBASE, &base);
+	qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base);
 	base = (base & 0xffff) & ~0x7f;
 
 	/* enable the pin */
@@ -57,7 +56,7 @@ void board_deassert_perst(void)
 	u32 base, port, val;
 
 	/* retrieve the GPIO IO base */
-	qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, PCI_CFG_GPIOBASE, &base);
+	qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base);
 	base = (base & 0xffff) & ~0x7f;
 
 	/* pull it up (de-assert) */