Signed-off-by: Kumar Gala <galak@kernel.crashing.org>master
Kumar Gala
17 years ago
parent
7232a2724c
commit
2cfaa1aa1a
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/*
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* Copyright 2008 Freescale Semiconductor, Inc. |
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* |
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* (C) Copyright 2000 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/fsl_law.h> |
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#include <asm/mmu.h> |
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/*
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* LAW(Local Access Window) configuration: |
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* |
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* 0x0000_0000 0x7fff_ffff DDR 2G |
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* 0x8000_0000 0x9fff_ffff PCI1 MEM 512M |
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* 0xa000_0000 0xbfff_ffff PCI2 MEM 512M |
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* 0xe000_0000 0xe000_ffff CCSR 1M |
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* 0xe200_0000 0xe20f_ffff PCI1 IO 1M |
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* 0xe210_0000 0xe21f_ffff PCI2 IO 1M |
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* 0xf000_0000 0xf7ff_ffff SDRAM 128M |
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* 0xf800_0000 0xf80f_ffff NVRAM/CADMUS (*) 1M |
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* 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M |
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* 0xff80_0000 0xffff_ffff FLASH (boot bank) 8M |
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* |
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* Notes: |
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* CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. |
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* If flash is 8M at default position (last 8M), no LAW needed. |
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*/ |
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struct law_entry law_table[] = { |
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SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI), |
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SET_LAW_ENTRY(3, CFG_PCI2_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), |
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SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), |
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SET_LAW_ENTRY(5, CFG_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2), |
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/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ |
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SET_LAW_ENTRY(6, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), |
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}; |
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int num_law_entries = ARRAY_SIZE(law_table); |
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@ -0,0 +1,73 @@ |
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/*
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* Copyright 2008 Freescale Semiconductor, Inc. |
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* |
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* (C) Copyright 2000 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/fsl_law.h> |
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#include <asm/mmu.h> |
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|
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/*
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* LAW(Local Access Window) configuration: |
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* |
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* 0x0000_0000 0x7fff_ffff DDR 2G |
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* 0x8000_0000 0x9fff_ffff PCI1 MEM 512M |
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* 0xa000_0000 0xbfff_ffff PCIe MEM 512M |
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* 0xc000_0000 0xdfff_ffff RapidIO 512M |
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* 0xe000_0000 0xe000_ffff CCSR 1M |
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* 0xe200_0000 0xe10f_ffff PCI1 IO 1M |
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* 0xe280_0000 0xe20f_ffff PCI2 IO 1M |
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* 0xe300_0000 0xe30f_ffff PCIe IO 1M |
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* 0xf000_0000 0xf3ff_ffff SDRAM 64M |
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* 0xf800_0000 0xf80f_ffff NVRAM/CADMUS (*) 1M |
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* 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M |
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* 0xff80_0000 0xffff_ffff FLASH (boot bank) 8M |
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* |
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* Notes: |
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* CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. |
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* If flash is 8M at default position (last 8M), no LAW needed. |
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* |
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* LAW 0 is reserved for boot mapping |
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*/ |
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struct law_entry law_table[] = { |
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#ifdef CFG_PCI1_MEM_PHYS |
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SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI), |
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SET_LAW_ENTRY(3, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), |
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#endif |
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#ifdef CFG_PCI2_MEM_PHYS |
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SET_LAW_ENTRY(4, CFG_PCI2_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), |
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SET_LAW_ENTRY(5, CFG_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2), |
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#endif |
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#ifdef CFG_PCIE1_MEM_PHYS |
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SET_LAW_ENTRY(6, CFG_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1), |
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SET_LAW_ENTRY(7, CFG_PCIE1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_1), |
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#endif |
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/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ |
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SET_LAW_ENTRY(8, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), |
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#ifdef CFG_RIO_MEM_PHYS |
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SET_LAW_ENTRY(9, CFG_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO), |
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#endif |
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}; |
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int num_law_entries = ARRAY_SIZE(law_table); |
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@ -0,0 +1,58 @@ |
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/*
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* Copyright 2008 Freescale Semiconductor, Inc. |
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* |
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* (C) Copyright 2000 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/fsl_law.h> |
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#include <asm/mmu.h> |
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/*
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* LAW(Local Access Window) configuration: |
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* |
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* 0x0000_0000 0x7fff_ffff DDR 2G |
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* 0x8000_0000 0x9fff_ffff PCI1 MEM 512M |
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* 0xa000_0000 0xbfff_ffff PCI2 MEM 512M |
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* 0xe000_0000 0xe000_ffff CCSR 1M |
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* 0xe200_0000 0xe20f_ffff PCI1 IO 1M |
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* 0xe210_0000 0xe21f_ffff PCI2 IO 1M |
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* 0xf000_0000 0xf7ff_ffff SDRAM 128M |
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* 0xf800_0000 0xf80f_ffff NVRAM/CADMUS (*) 1M |
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* 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M |
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* 0xff80_0000 0xffff_ffff FLASH (boot bank) 8M |
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* |
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* Notes: |
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* CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. |
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* If flash is 8M at default position (last 8M), no LAW needed. |
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*/ |
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struct law_entry law_table[] = { |
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SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI), |
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SET_LAW_ENTRY(3, CFG_PCI2_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), |
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SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), |
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SET_LAW_ENTRY(5, CFG_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2), |
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/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ |
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SET_LAW_ENTRY(6, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), |
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}; |
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int num_law_entries = ARRAY_SIZE(law_table); |
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