|
|
|
@ -67,10 +67,10 @@ |
|
|
|
|
#define LAWBAR4 ((0xf8100000>>12) & 0xffffff) |
|
|
|
|
#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_2M)) |
|
|
|
|
|
|
|
|
|
#define LAWBAR5 ((CFG_PCI1_IO_BASE>>12) & 0xffffff) |
|
|
|
|
#define LAWBAR5 ((CFG_PCI1_IO_PHYS>>12) & 0xffffff) |
|
|
|
|
#define LAWAR5 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M)) |
|
|
|
|
|
|
|
|
|
#define LAWBAR6 ((CFG_PCI2_IO_BASE>>12) & 0xffffff) |
|
|
|
|
#define LAWBAR6 ((CFG_PCI2_IO_PHYS>>12) & 0xffffff) |
|
|
|
|
#define LAWAR6 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M)) |
|
|
|
|
|
|
|
|
|
#define LAWBAR7 ((0xfe000000 >>12) & 0xffffff) |
|
|
|
@ -84,7 +84,7 @@ |
|
|
|
|
#define LAWAR8 ((LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_512M)) & ~LAWAR_EN) |
|
|
|
|
#endif |
|
|
|
|
|
|
|
|
|
#define LAWBAR9 ((CFG_RIO_MEM_BASE>>12) & 0xfffff) |
|
|
|
|
#define LAWBAR9 ((CFG_RIO_MEM_PHYS>>12) & 0xfffff) |
|
|
|
|
#define LAWAR9 (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M)) |
|
|
|
|
|
|
|
|
|
.section .bootpg, "ax" |
|
|
|
|