Marek Vasut
15 years ago
parent
18a00dfd76
commit
2e49984bd1
@ -0,0 +1,45 @@ |
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#
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# Toradex Colibri PXA270 Support
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#
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# Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = lib$(BOARD).a
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OBJS := colibri_pxa270.o
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SOBJS := lowlevel_init.o
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$(LIB): $(OBJS) $(SOBJS) |
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$(AR) crv $@ $(OBJS) $(SOBJS)
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak .depend
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#########################################################################
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.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) |
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$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
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-include .depend |
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#########################################################################
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@ -0,0 +1,118 @@ |
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/*
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* Toradex Colibri PXA270 Support |
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* |
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* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/arch/hardware.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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/* ------------------------------------------------------------------------- */ |
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/*
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* Miscelaneous platform dependent initialisations |
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*/ |
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extern struct serial_device serial_ffuart_device; |
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extern struct serial_device serial_btuart_device; |
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extern struct serial_device serial_stuart_device; |
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struct serial_device *default_serial_console (void) |
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{ |
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return &serial_ffuart_device; |
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} |
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int board_init (void) |
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{ |
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/* memory and cpu-speed are setup before relocation */ |
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/* so we do _nothing_ here */ |
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/* arch number of vpac270 */ |
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gd->bd->bi_arch_number = MACH_TYPE_COLIBRI; |
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/* adress of boot parameters */ |
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gd->bd->bi_boot_params = 0xa0000100; |
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return 0; |
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} |
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int dram_init (void) |
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{ |
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; |
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return 0; |
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} |
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#ifdef CONFIG_CMD_USB |
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int usb_board_init(void) |
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{ |
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UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) & |
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~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE); |
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UHCHR |= UHCHR_FSBIR; |
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while (UHCHR & UHCHR_FSBIR); |
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UHCHR &= ~UHCHR_SSE; |
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UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE); |
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/* Clear any OTG Pin Hold */ |
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if (PSSR & PSSR_OTGPH) |
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PSSR |= PSSR_OTGPH; |
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UHCRHDA &= ~(0x200); |
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UHCRHDA |= 0x100; |
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/* Set port power control mask bits, only 3 ports. */ |
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UHCRHDB |= (0x7<<17); |
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/* enable port 2 */ |
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UP2OCR |= UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE; |
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return 0; |
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} |
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void usb_board_init_fail(void) |
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{ |
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return; |
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} |
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void usb_board_stop(void) |
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{ |
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UHCHR |= UHCHR_FHR; |
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udelay(11); |
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UHCHR &= ~UHCHR_FHR; |
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UHCCOMS |= 1; |
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udelay(10); |
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CKEN &= ~CKEN10_USBHOST; |
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return; |
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} |
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#endif |
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#ifdef CONFIG_DRIVER_DM9000 |
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int board_eth_init(bd_t *bis) |
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{ |
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return dm9000_initialize(bis); |
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} |
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#endif |
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@ -0,0 +1 @@ |
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TEXT_BASE = 0xa1000000
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@ -0,0 +1,36 @@ |
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/* |
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* Toradex Colibri PXA270 Lowlevel Hardware Initialization |
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* |
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* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
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* |
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of
|
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <config.h> |
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#include <version.h> |
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#include <asm/arch/pxa-regs.h> |
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#include <asm/arch/macro.h> |
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.globl lowlevel_init
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lowlevel_init: |
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pxa_gpio_setup |
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pxa_wait_ticks 0x8000 |
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pxa_mem_setup |
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pxa_wakeup |
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pxa_intr_setup |
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pxa_clock_setup |
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mov pc, lr |
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@ -0,0 +1,278 @@ |
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/*
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* Toradex Colibri PXA270 configuration file |
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* |
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* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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/*
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* High Level Board Configuration Options |
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*/ |
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#define CONFIG_PXA27X 1 /* Marvell PXA270 CPU */ |
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#define CONFIG_VPAC270 1 /* Toradex Colibri PXA270 board */ |
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#undef BOARD_LATE_INIT |
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#undef CONFIG_SKIP_RELOCATE_UBOOT |
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#undef CONFIG_USE_IRQ |
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#undef CONFIG_SKIP_LOWLEVEL_INIT |
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/*
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* Environment settings |
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*/ |
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#define CONFIG_ENV_SIZE 0x4000 |
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
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#define CONFIG_SYS_GBL_DATA_SIZE 128 |
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#define CONFIG_ENV_OVERWRITE /* override default environment */ |
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#define CONFIG_BOOTCOMMAND \ |
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"if mmc init && fatload mmc 0 0xa0000000 uImage; then " \
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"bootm 0xa0000000; " \
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"fi; " \
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"if usb reset && fatload usb 0 0xa0000000 uImage; then " \
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"bootm 0xa0000000; " \
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"fi; " \
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"bootm 0x80000;" |
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#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200" |
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#define CONFIG_TIMESTAMP |
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#define CONFIG_BOOTDELAY 2 /* Autoboot delay */ |
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#define CONFIG_CMDLINE_TAG |
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#define CONFIG_SETUP_MEMORY_TAGS |
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#define CONFIG_LZMA /* LZMA compression support */ |
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/*
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* Serial Console Configuration |
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*/ |
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#define CONFIG_PXA_SERIAL |
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#define CONFIG_FFUART 1 |
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#define CONFIG_BAUDRATE 115200 |
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
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/*
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* Bootloader Components Configuration |
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*/ |
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#include <config_cmd_default.h> |
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#define CONFIG_CMD_NET |
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#define CONFIG_CMD_ENV |
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#undef CONFIG_CMD_IMLS |
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#define CONFIG_CMD_MMC |
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#define CONFIG_CMD_USB |
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#define CONFIG_CMD_FLASH |
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/*
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* Networking Configuration |
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* chip on the Voipac PXA270 board |
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*/ |
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#ifdef CONFIG_CMD_NET |
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#define CONFIG_CMD_PING |
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#define CONFIG_CMD_DHCP |
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#define CONFIG_NET_MULTI 1 |
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#define CONFIG_DRIVER_DM9000 1 |
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#define CONFIG_DM9000_BASE 0x08000000 |
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#define DM9000_IO (CONFIG_DM9000_BASE) |
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#define DM9000_DATA (CONFIG_DM9000_BASE + 4) |
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#define CONFIG_NET_RETRY_COUNT 10 |
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#define CONFIG_BOOTP_BOOTFILESIZE |
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#define CONFIG_BOOTP_BOOTPATH |
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#define CONFIG_BOOTP_GATEWAY |
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#define CONFIG_BOOTP_HOSTNAME |
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#endif |
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/*
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* MMC Card Configuration |
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*/ |
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#ifdef CONFIG_CMD_MMC |
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#define CONFIG_MMC |
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#define CONFIG_PXA_MMC |
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#define CONFIG_SYS_MMC_BASE 0xF0000000 |
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#define CONFIG_CMD_FAT |
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#define CONFIG_DOS_PARTITION |
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#endif |
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/*
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* KGDB |
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*/ |
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#ifdef CONFIG_CMD_KGDB |
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#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ |
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#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ |
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#endif |
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/*
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* HUSH Shell Configuration |
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*/ |
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#define CONFIG_SYS_HUSH_PARSER 1 |
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
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#define CONFIG_SYS_LONGHELP /* undef to save memory */ |
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#ifdef CONFIG_SYS_HUSH_PARSER |
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#define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */ |
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#else |
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#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ |
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#endif |
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
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#define CONFIG_SYS_DEVICE_NULLDEV 1 |
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/*
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* Clock Configuration |
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*/ |
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#undef CONFIG_SYS_CLKS_IN_HZ |
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#define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */ |
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#define CONFIG_SYS_CPUSPEED 0x290 /* 520 MHz */ |
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/*
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* Stack sizes |
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* |
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* The stack sizes are set up in start.S using the settings below |
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*/ |
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#define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
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#ifdef CONFIG_USE_IRQ |
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
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#endif |
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/*
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* DRAM Map |
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*/ |
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#define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */ |
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#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ |
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#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ |
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#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ |
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#define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */ |
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#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ |
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#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ |
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#define CONFIG_SYS_LOAD_ADDR (0xa1000000) |
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/*
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* NOR FLASH |
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*/ |
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#ifdef CONFIG_CMD_FLASH |
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#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ |
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
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#define CONFIG_SYS_FLASH_CFI |
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#define CONFIG_FLASH_CFI_DRIVER 1 |
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#define CONFIG_SYS_MAX_FLASH_SECT (4 + 255) |
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 |
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#define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ) |
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#define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ) |
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 |
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#define CONFIG_SYS_FLASH_PROTECTION 1 |
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#define CONFIG_ENV_IS_IN_FLASH 1 |
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#else /* No flash */ |
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#define CONFIG_SYS_NO_FLASH |
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#define CONFIG_SYS_ENV_IS_NOWHERE |
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#endif |
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#define CONFIG_SYS_MONITOR_BASE 0x000000 |
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#define CONFIG_SYS_MONITOR_LEN 0x40000 |
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#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_LEN) |
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#define CONFIG_ENV_SECT_SIZE 0x40000 |
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#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) |
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#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) |
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/*
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* GPIO settings |
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*/ |
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#define CONFIG_SYS_GPSR0_VAL 0x00000000 |
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#define CONFIG_SYS_GPSR1_VAL 0x00020000 |
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#define CONFIG_SYS_GPSR2_VAL 0x0002C000 |
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#define CONFIG_SYS_GPSR3_VAL 0x00000000 |
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#define CONFIG_SYS_GPCR0_VAL 0x00000000 |
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#define CONFIG_SYS_GPCR1_VAL 0x00000000 |
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#define CONFIG_SYS_GPCR2_VAL 0x00000000 |
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#define CONFIG_SYS_GPCR3_VAL 0x00000000 |
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#define CONFIG_SYS_GPDR0_VAL 0x08000000 |
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#define CONFIG_SYS_GPDR1_VAL 0x0002A981 |
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#define CONFIG_SYS_GPDR2_VAL 0x0202FC00 |
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#define CONFIG_SYS_GPDR3_VAL 0x00000000 |
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#define CONFIG_SYS_GAFR0_L_VAL 0x00100000 |
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#define CONFIG_SYS_GAFR0_U_VAL 0x00C00010 |
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#define CONFIG_SYS_GAFR1_L_VAL 0x999A901A |
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#define CONFIG_SYS_GAFR1_U_VAL 0xAAA00008 |
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#define CONFIG_SYS_GAFR2_L_VAL 0xAAAAAAAA |
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#define CONFIG_SYS_GAFR2_U_VAL 0x0109A000 |
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#define CONFIG_SYS_GAFR3_L_VAL 0x54000300 |
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#define CONFIG_SYS_GAFR3_U_VAL 0x00024001 |
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#define CONFIG_SYS_PSSR_VAL 0x30 |
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/*
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* Clock settings |
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*/ |
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#define CONFIG_SYS_CKEN 0x00500240 |
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#define CONFIG_SYS_CCCR 0x02000290 |
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/*
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* Memory settings |
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*/ |
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#define CONFIG_SYS_MSC0_VAL 0x000095f2 |
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#define CONFIG_SYS_MSC1_VAL 0x00007ff4 |
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#define CONFIG_SYS_MSC2_VAL 0x00000000 |
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#define CONFIG_SYS_MDCNFG_VAL 0x08000ac9 |
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#define CONFIG_SYS_MDREFR_VAL 0x2013e01e |
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#define CONFIG_SYS_MDMRS_VAL 0x00320032 |
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#define CONFIG_SYS_FLYCNFG_VAL 0x00000000 |
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#define CONFIG_SYS_SXCNFG_VAL 0x40044004 |
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/*
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* PCMCIA and CF Interfaces |
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*/ |
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#define CONFIG_SYS_MECR_VAL 0x00000001 |
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#define CONFIG_SYS_MCMEM0_VAL 0x00014307 |
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#define CONFIG_SYS_MCMEM1_VAL 0x00014307 |
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#define CONFIG_SYS_MCATT0_VAL 0x0001c787 |
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#define CONFIG_SYS_MCATT1_VAL 0x0001c787 |
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#define CONFIG_SYS_MCIO0_VAL 0x0001430f |
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#define CONFIG_SYS_MCIO1_VAL 0x0001430f |
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/*
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* USB |
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*/ |
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#ifdef CONFIG_CMD_USB |
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#define CONFIG_USB_OHCI_NEW |
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#define CONFIG_SYS_USB_OHCI_CPU_INIT |
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#define CONFIG_SYS_USB_OHCI_BOARD_INIT |
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
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#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000 |
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "tdex270" |
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#define CONFIG_USB_STORAGE |
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#endif |
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#endif /* __CONFIG_H */ |
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