The OXC board has long been unmaintained, and is broken. Remove it. Signed-off-by: Wolfgang Denk <wd@denx.de>master
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).o
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COBJS = $(BOARD).o flash.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) |
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -1,372 +0,0 @@ |
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/*
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* (C) Copyright 2000 |
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* Marius Groeger <mgroeger@sysgo.de> |
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
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* |
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* (C) Copyright 2000 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* Flash Routines for STM29W320DB/STM29W800D flash chips |
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* |
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*-------------------------------------------------------------------- |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <mpc8xx.h> |
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
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/*-----------------------------------------------------------------------
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* Functions |
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*/ |
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static ulong flash_get_size (vu_char *addr, flash_info_t *info); |
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static int write_byte (flash_info_t *info, ulong dest, uchar data); |
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/*-----------------------------------------------------------------------
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*/ |
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unsigned long flash_init (void) |
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{ |
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unsigned long size; |
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int i; |
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/* Init: no FLASHes known */ |
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for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { |
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flash_info[i].flash_id = FLASH_UNKNOWN; |
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} |
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/*
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* We use the following trick here: since flash is cyclically |
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* mapped in the 0xFF800000-0xFFFFFFFF area, we detect the type |
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* and the size of flash using 0xFF800000 as the base address, |
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* and then call flash_get_size() again to fill flash_info. |
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*/ |
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size = flash_get_size((vu_char *)CONFIG_SYS_FLASH_PRELIMBASE, &flash_info[0]); |
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if (size) |
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{ |
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flash_get_size((vu_char *)(-size), &flash_info[0]); |
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} |
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#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_PRELIMBASE) |
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/* monitor protection ON by default */ |
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flash_protect(FLAG_PROTECT_SET, |
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CONFIG_SYS_MONITOR_BASE, |
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CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, |
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&flash_info[0]); |
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#endif |
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#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR) |
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# ifndef CONFIG_ENV_SIZE |
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# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE |
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# endif |
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flash_protect(FLAG_PROTECT_SET, |
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CONFIG_ENV_ADDR, |
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CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, |
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&flash_info[0]); |
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#endif |
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return (size); |
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} |
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/*-----------------------------------------------------------------------
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*/ |
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void flash_print_info (flash_info_t *info) |
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{ |
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int i; |
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if (info->flash_id == FLASH_UNKNOWN) { |
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printf ("missing or unknown FLASH type\n"); |
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return; |
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} |
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switch (info->flash_id & FLASH_VENDMASK) { |
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case FLASH_MAN_STM: |
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printf ("ST "); |
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break; |
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default: |
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printf ("Unknown Vendor "); |
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break; |
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} |
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switch (info->flash_id & FLASH_TYPEMASK) { |
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case FLASH_STM320DB: |
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printf ("M29W320DB (32 Mbit)\n"); |
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break; |
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case FLASH_STM800DB: |
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printf ("M29W800DB (8 Mbit, bottom boot block)\n"); |
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break; |
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case FLASH_STM800DT: |
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printf ("M29W800DT (8 Mbit, top boot block)\n"); |
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break; |
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default: |
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printf ("Unknown Chip Type\n"); |
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break; |
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} |
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printf (" Size: %ld KB in %d Sectors\n", |
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info->size >> 10, info->sector_count); |
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printf (" Sector Start Addresses:"); |
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for (i=0; i<info->sector_count; ++i) { |
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if ((i % 5) == 0) |
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printf ("\n "); |
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printf (" %08lX%s", |
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info->start[i], |
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info->protect[i] ? " (RO)" : " " |
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); |
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} |
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printf ("\n"); |
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return; |
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} |
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/*
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* The following code cannot be run from FLASH! |
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*/ |
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static ulong flash_get_size (vu_char *addr, flash_info_t *info) |
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{ |
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short i; |
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uchar vendor, devid; |
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ulong base = (ulong)addr; |
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/* Write auto select command: read Manufacturer ID */ |
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addr[0x0AAA] = 0xAA; |
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addr[0x0555] = 0x55; |
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addr[0x0AAA] = 0x90; |
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udelay(1000); |
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vendor = addr[0]; |
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devid = addr[2]; |
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/* only support STM */ |
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if ((vendor << 16) != FLASH_MAN_STM) { |
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return 0; |
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} |
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if (devid == FLASH_STM320DB) { |
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/* MPC8240 can address maximum 2Mb of flash, that is why the MSB
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* lead is grounded and we can access only 2 first Mb */ |
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info->flash_id = vendor << 16 | devid; |
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info->sector_count = 32; |
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info->size = info->sector_count * 0x10000; |
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for (i = 0; i < info->sector_count; i++) { |
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info->start[i] = base + i * 0x10000; |
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} |
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} |
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else if (devid == FLASH_STM800DB) { |
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info->flash_id = vendor << 16 | devid; |
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info->sector_count = 19; |
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info->size = 0x100000; |
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info->start[0] = 0x0000; |
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info->start[1] = 0x4000; |
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info->start[2] = 0x6000; |
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info->start[3] = 0x8000; |
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for (i = 4; i < info->sector_count; i++) { |
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info->start[i] = base + (i-3) * 0x10000; |
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} |
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} |
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else if (devid == FLASH_STM800DT) { |
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info->flash_id = vendor << 16 | devid; |
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info->sector_count = 19; |
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info->size = 0x100000; |
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for (i = 0; i < info->sector_count-4; i++) { |
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info->start[i] = base + i * 0x10000; |
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} |
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info->start[i] = base + i * 0x10000; |
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info->start[i+1] = base + i * 0x10000 + 0x8000; |
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info->start[i+2] = base + i * 0x10000 + 0xa000; |
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info->start[i+3] = base + i * 0x10000 + 0xc000; |
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} |
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else { |
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return 0; |
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} |
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/* mark all sectors as unprotected */ |
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for (i = 0; i < info->sector_count; i++) { |
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info->protect[i] = 0; |
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} |
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/* Issue the reset command */ |
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if (info->flash_id != FLASH_UNKNOWN) { |
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addr[0] = 0xF0; /* reset bank */ |
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} |
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return (info->size); |
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} |
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/*-----------------------------------------------------------------------
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*/ |
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int flash_erase (flash_info_t *info, int s_first, int s_last) |
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{ |
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vu_char *addr = (vu_char *)(info->start[0]); |
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int flag, prot, sect, l_sect; |
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ulong start, now, last; |
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if ((s_first < 0) || (s_first > s_last)) { |
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if (info->flash_id == FLASH_UNKNOWN) { |
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printf ("- missing\n"); |
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} else { |
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printf ("- no sectors to erase\n"); |
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} |
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return 1; |
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} |
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prot = 0; |
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for (sect = s_first; sect <= s_last; sect++) { |
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if (info->protect[sect]) { |
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prot++; |
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} |
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} |
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if (prot) { |
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printf ("- Warning: %d protected sectors will not be erased!\n", |
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prot); |
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} else { |
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printf ("\n"); |
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} |
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l_sect = -1; |
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/* Disable interrupts which might cause a timeout here */ |
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flag = disable_interrupts(); |
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addr[0x0AAA] = 0xAA; |
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addr[0x0555] = 0x55; |
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addr[0x0AAA] = 0x80; |
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addr[0x0AAA] = 0xAA; |
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addr[0x0555] = 0x55; |
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/* wait at least 80us - let's wait 1 ms */ |
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udelay (1000); |
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/* Start erase on unprotected sectors */ |
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for (sect = s_first; sect<=s_last; sect++) { |
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if (info->protect[sect] == 0) { /* not protected */ |
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addr = (vu_char *)(info->start[sect]); |
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addr[0] = 0x30; |
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l_sect = sect; |
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} |
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} |
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/* re-enable interrupts if necessary */ |
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if (flag) |
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enable_interrupts(); |
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/* wait at least 80us - let's wait 1 ms */ |
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udelay (1000); |
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/*
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* We wait for the last triggered sector |
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*/ |
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if (l_sect < 0) |
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goto DONE; |
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start = get_timer (0); |
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last = start; |
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addr = (vu_char *)(info->start[l_sect]); |
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while ((addr[0] & 0x80) != 0x80) { |
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if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { |
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printf ("Timeout\n"); |
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return 1; |
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} |
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/* show that we're waiting */ |
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if ((now - last) > 1000) { /* every second */ |
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serial_putc ('.'); |
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last = now; |
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} |
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} |
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DONE: |
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/* reset to read mode */ |
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addr = (volatile unsigned char *)info->start[0]; |
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addr[0] = 0xF0; /* reset bank */ |
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printf (" done\n"); |
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return 0; |
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} |
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/*-----------------------------------------------------------------------
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* Copy memory to flash, returns: |
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* 0 - OK |
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* 1 - write timeout |
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* 2 - Flash not erased |
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*/ |
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int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) |
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{ |
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int rc; |
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while (cnt > 0) { |
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if ((rc = write_byte(info, addr, *src)) != 0) { |
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return (rc); |
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} |
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addr++; |
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src++; |
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cnt--; |
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} |
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return (0); |
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} |
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/*-----------------------------------------------------------------------
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* Write a byte to Flash, returns: |
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* 0 - OK |
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* 1 - write timeout |
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* 2 - Flash not erased |
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*/ |
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static int write_byte (flash_info_t *info, ulong dest, uchar data) |
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{ |
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vu_char *addr = (vu_char *)(info->start[0]); |
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ulong start; |
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int flag; |
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/* Check if Flash is (sufficiently) erased */ |
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if ((*((vu_char *)dest) & data) != data) { |
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return (2); |
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} |
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/* Disable interrupts which might cause a timeout here */ |
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flag = disable_interrupts(); |
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addr[0x0AAA] = 0xAA; |
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addr[0x0555] = 0x55; |
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addr[0x0AAA] = 0xA0; |
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*((vu_char *)dest) = data; |
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/* re-enable interrupts if necessary */ |
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if (flag) |
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enable_interrupts(); |
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/* data polling for D7 */ |
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start = get_timer (0); |
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while ((*((vu_char *)dest) & 0x80) != (data & 0x80)) { |
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if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { |
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return (1); |
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} |
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} |
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return (0); |
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} |
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/*-----------------------------------------------------------------------
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*/ |
@ -1,223 +0,0 @@ |
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/*
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* (C) Copyright 2000 |
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* Rob Taylor, Flying Pig Systems. robt@flyingpig.com. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <mpc824x.h> |
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#include <pci.h> |
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#include <i2c.h> |
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#include <netdev.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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int checkboard (void) |
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{ |
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puts ( "Board: OXC8240\n" ); |
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return 0; |
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} |
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phys_size_t initdram (int board_type) |
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{ |
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#ifndef CONFIG_SYS_RAMBOOT |
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long size; |
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long new_bank0_end; |
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long mear1; |
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long emear1; |
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size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE); |
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new_bank0_end = size - 1; |
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mear1 = mpc824x_mpc107_getreg(MEAR1); |
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emear1 = mpc824x_mpc107_getreg(EMEAR1); |
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mear1 = (mear1 & 0xFFFFFF00) | |
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((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT); |
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emear1 = (emear1 & 0xFFFFFF00) | |
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((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT); |
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mpc824x_mpc107_setreg(MEAR1, mear1); |
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mpc824x_mpc107_setreg(EMEAR1, emear1); |
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return (size); |
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#else |
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/* if U-Boot starts from RAM, then suppose we have 16Mb of RAM */ |
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return (16 << 20); |
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#endif |
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} |
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|
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/*
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* Initialize PCI Devices, report devices found. |
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*/ |
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#ifndef CONFIG_PCI_PNP |
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static struct pci_config_table pci_oxc_config_table[] = { |
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x14, PCI_ANY_ID, |
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pci_cfgfunc_config_device, { PCI_ENET0_IOADDR, |
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PCI_ENET0_MEMADDR, |
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PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }}, |
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x15, PCI_ANY_ID, |
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pci_cfgfunc_config_device, { PCI_ENET1_IOADDR, |
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PCI_ENET1_MEMADDR, |
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PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }}, |
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{ } |
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}; |
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#endif |
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|
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static struct pci_controller hose = { |
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#ifndef CONFIG_PCI_PNP |
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config_table: pci_oxc_config_table, |
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#endif |
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}; |
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|
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void pci_init_board (void) |
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{ |
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pci_mpc824x_init(&hose); |
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} |
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|
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int board_early_init_f (void) |
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{ |
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*(volatile unsigned char *)(CONFIG_SYS_CPLD_RESET) = 0x89; |
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return 0; |
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} |
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|
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#ifdef CONFIG_WATCHDOG |
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void oxc_wdt_reset(void) |
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{ |
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*(volatile unsigned char *)(CONFIG_SYS_CPLD_WATCHDOG) = 0xff; |
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} |
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|
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void watchdog_reset(void) |
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{ |
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int re_enable = disable_interrupts(); |
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|
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oxc_wdt_reset(); |
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if (re_enable) |
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enable_interrupts(); |
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} |
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#endif |
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|
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static int oxc_get_expander(unsigned char addr, unsigned char * val) |
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{ |
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return i2c_read(addr, 0, 0, val, 1); |
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} |
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|
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static int oxc_set_expander(unsigned char addr, unsigned char val) |
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{ |
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return i2c_write(addr, 0, 0, &val, 1); |
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} |
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|
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static int expander0alive = 0; |
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|
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#ifdef CONFIG_SHOW_ACTIVITY |
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static int ledtoggle = 0; |
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static int ledstatus = 1; |
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|
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void oxc_toggle_activeled(void) |
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{ |
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ledtoggle++; |
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} |
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|
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void board_show_activity (ulong timestamp) |
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{ |
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if ((timestamp % (CONFIG_SYS_HZ / 10)) == 0) |
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oxc_toggle_activeled (); |
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} |
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|
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void show_activity(int arg) |
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{ |
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static unsigned char led = 0; |
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unsigned char val; |
||||
|
||||
if (!expander0alive) return; |
||||
|
||||
if ((ledtoggle > (2 * arg)) && ledstatus) { |
||||
led ^= 0x80; |
||||
oxc_get_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, &val); |
||||
udelay(200); |
||||
oxc_set_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, (val & 0x7F) | led); |
||||
ledtoggle = 0; |
||||
} |
||||
} |
||||
#endif |
||||
|
||||
#ifdef CONFIG_SHOW_BOOT_PROGRESS |
||||
void show_boot_progress(int arg) |
||||
{ |
||||
unsigned char val; |
||||
|
||||
if (!expander0alive) return; |
||||
|
||||
if (arg > 0 && ledstatus) { |
||||
ledstatus = 0; |
||||
oxc_get_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, &val); |
||||
udelay(200); |
||||
oxc_set_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, val | 0x80); |
||||
} else if (arg < 0) { |
||||
oxc_get_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, &val); |
||||
udelay(200); |
||||
oxc_set_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, val & 0x7F); |
||||
ledstatus = 1; |
||||
} |
||||
} |
||||
#endif |
||||
|
||||
int misc_init_r (void) |
||||
{ |
||||
/* check whether the i2c expander #0 is accessible */ |
||||
if (!oxc_set_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, 0x7F)) { |
||||
udelay(200); |
||||
expander0alive = 1; |
||||
} |
||||
|
||||
#ifdef CONFIG_SYS_OXC_GENERATE_IP |
||||
{ |
||||
char str[32]; |
||||
unsigned long ip = CONFIG_SYS_OXC_IPMASK; |
||||
bd_t *bd = gd->bd; |
||||
|
||||
if (expander0alive) { |
||||
unsigned char val; |
||||
|
||||
if (!oxc_get_expander(CONFIG_SYS_I2C_EXPANDER0_ADDR, &val)) { |
||||
ip = (ip & 0xffffff00) | ((val & 0x7c) >> 2); |
||||
} |
||||
} |
||||
|
||||
if ((ip & 0xff) < 3) { |
||||
/* if fail, set x.x.x.254 */ |
||||
ip = (ip & 0xffffff00) | 0xfe; |
||||
} |
||||
|
||||
bd->bi_ip_addr = ip; |
||||
sprintf(str, "%ld.%ld.%ld.%ld", |
||||
(bd->bi_ip_addr & 0xff000000) >> 24, |
||||
(bd->bi_ip_addr & 0x00ff0000) >> 16, |
||||
(bd->bi_ip_addr & 0x0000ff00) >> 8, |
||||
(bd->bi_ip_addr & 0x000000ff)); |
||||
setenv("ipaddr", str); |
||||
printf("ip: %s\n", str); |
||||
} |
||||
#endif |
||||
return (0); |
||||
} |
||||
|
||||
int board_eth_init(bd_t *bis) |
||||
{ |
||||
return pci_eth_init(bis); |
||||
} |
@ -1,317 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2001 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/* ------------------------------------------------------------------------- */ |
||||
|
||||
/*
|
||||
* board/config.h - configuration options, board specific |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
|
||||
/*
|
||||
* High Level Configuration Options |
||||
* (easy to change) |
||||
*/ |
||||
|
||||
#define CONFIG_MPC824X 1 |
||||
#define CONFIG_MPC8240 1 |
||||
#define CONFIG_OXC 1 |
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFFF00000 |
||||
|
||||
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ |
||||
|
||||
#define CONFIG_IDENT_STRING " [oxc] " |
||||
|
||||
#define CONFIG_WATCHDOG 1 |
||||
#define CONFIG_SHOW_ACTIVITY 1 |
||||
#define CONFIG_SHOW_BOOT_PROGRESS 1 |
||||
|
||||
#define CONFIG_CONS_INDEX 1 |
||||
#define CONFIG_BAUDRATE 9600 |
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
||||
|
||||
|
||||
/*
|
||||
* BOOTP options |
||||
*/ |
||||
#define CONFIG_BOOTP_BOOTFILESIZE |
||||
#define CONFIG_BOOTP_BOOTPATH |
||||
#define CONFIG_BOOTP_GATEWAY |
||||
#define CONFIG_BOOTP_HOSTNAME |
||||
|
||||
|
||||
/*
|
||||
* Command line configuration. |
||||
*/ |
||||
#include <config_cmd_default.h> |
||||
|
||||
#define CONFIG_CMD_ELF |
||||
|
||||
|
||||
/*
|
||||
* Miscellaneous configurable options |
||||
*/ |
||||
#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */ |
||||
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ |
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
||||
#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */ |
||||
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ |
||||
|
||||
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() on init */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Boot options |
||||
*/ |
||||
|
||||
#define CONFIG_SERVERIP 10.0.0.1 |
||||
#define CONFIG_GATEWAYIP 10.0.0.1 |
||||
#define CONFIG_NETMASK 255.255.255.0 |
||||
#define CONFIG_LOADADDR 0x10000 |
||||
#define CONFIG_BOOTFILE "/mnt/ide0/p2/usr/tftp/oxc.elf" |
||||
#define CONFIG_BOOTCOMMAND "tftp 0x10000 ; bootelf 0x10000" |
||||
#define CONFIG_BOOTDELAY 10 |
||||
|
||||
#define CONFIG_SYS_OXC_GENERATE_IP 1 /* Generate IP automatically */ |
||||
#define CONFIG_SYS_OXC_IPMASK 0x0A000000 /* 10.0.0.x */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* PCI stuff |
||||
*/ |
||||
|
||||
#define CONFIG_PCI /* include pci support */ |
||||
|
||||
|
||||
#define CONFIG_EEPRO100 /* Ethernet Express PRO 100 */ |
||||
#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ |
||||
|
||||
#define PCI_ENET0_IOADDR 0x80000000 |
||||
#define PCI_ENET0_MEMADDR 0x80000000 |
||||
#define PCI_ENET1_IOADDR 0x81000000 |
||||
#define PCI_ENET1_MEMADDR 0x81000000 |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH |
||||
*/ |
||||
|
||||
#define CONFIG_SYS_FLASH_PRELIMBASE 0xFF800000 |
||||
#define CONFIG_SYS_FLASH_BASE (0-flash_info[0].size) |
||||
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
||||
#define CONFIG_SYS_MAX_FLASH_SECT 32 /* max number of sectors on one chip */ |
||||
|
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* RAM |
||||
*/ |
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x00000000 |
||||
#define CONFIG_SYS_MAX_RAM_SIZE 0x10000000 |
||||
|
||||
#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 |
||||
|
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
||||
#define CONFIG_SYS_MONITOR_LEN 0x00030000 |
||||
|
||||
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_PRELIMBASE) |
||||
# define CONFIG_SYS_RAMBOOT 1 |
||||
#else |
||||
# undef CONFIG_SYS_RAMBOOT |
||||
#endif |
||||
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 |
||||
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 |
||||
|
||||
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
||||
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
||||
|
||||
#define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc() */ |
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ |
||||
#define CONFIG_SYS_MEMTEST_END 0x04000000 /* 0 ... 32 MB in DRAM */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Memory mapping |
||||
*/ |
||||
|
||||
#define CONFIG_SYS_CPLD_BASE 0xff000000 /* CPLD registers */ |
||||
#define CONFIG_SYS_CPLD_WATCHDOG (CONFIG_SYS_CPLD_BASE) /* Watchdog */ |
||||
#define CONFIG_SYS_CPLD_RESET (CONFIG_SYS_CPLD_BASE + 0x040000) /* Minor resets */ |
||||
#define CONFIG_SYS_UART_BASE (CONFIG_SYS_CPLD_BASE + 0x700000) /* debug UART */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* NS16550 Configuration |
||||
*/ |
||||
|
||||
#define CONFIG_SYS_NS16550 |
||||
#define CONFIG_SYS_NS16550_SERIAL |
||||
#define CONFIG_SYS_NS16550_REG_SIZE -4 |
||||
#define CONFIG_SYS_NS16550_CLK 1843200 |
||||
#define CONFIG_SYS_NS16550_COM1 CONFIG_SYS_UART_BASE |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* I2C Bus |
||||
*/ |
||||
|
||||
#define CONFIG_I2C 1 /* I2C support on ... */ |
||||
#define CONFIG_HARD_I2C 1 /* ... hardware one */ |
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ |
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ |
||||
|
||||
#define CONFIG_SYS_I2C_EXPANDER0_ADDR 0x20 /* PCF8574 expander 0 addrerr */ |
||||
#define CONFIG_SYS_I2C_EXPANDER1_ADDR 0x21 /* PCF8574 expander 1 addrerr */ |
||||
#define CONFIG_SYS_I2C_EXPANDER2_ADDR 0x26 /* PCF8574 expander 2 addrerr */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Environment |
||||
*/ |
||||
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1 |
||||
#define CONFIG_ENV_ADDR 0xFFF30000 /* Offset of Environment Sector */ |
||||
#define CONFIG_ENV_SIZE 0x00010000 /* Total Size of Environment Sector */ |
||||
#define CONFIG_ENV_OVERWRITE 1 /* Allow modifying the environment */ |
||||
|
||||
/*
|
||||
* Low Level Configuration Settings |
||||
* (address mappings, register initial values, etc.) |
||||
* You should know what you are doing if you make changes here. |
||||
*/ |
||||
|
||||
#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ |
||||
#define CONFIG_PLL_PCI_TO_MEM_MULTIPLIER 2 |
||||
|
||||
#define CONFIG_SYS_EUMB_ADDR 0xFC000000 |
||||
|
||||
/* MCCR1 */ |
||||
#define CONFIG_SYS_ROMNAL 0 /* rom/flash next access time */ |
||||
#define CONFIG_SYS_ROMFAL 19 /* rom/flash access time */ |
||||
|
||||
/* MCCR2 */ |
||||
#define CONFIG_SYS_ASRISE 15 /* ASRISE=15 clocks */ |
||||
#define CONFIG_SYS_ASFALL 3 /* ASFALL=3 clocks */ |
||||
#define CONFIG_SYS_REFINT 1000 /* REFINT=1000 clocks */ |
||||
|
||||
/* MCCR3 */ |
||||
#define CONFIG_SYS_BSTOPRE 0x35c /* Burst To Precharge */ |
||||
#define CONFIG_SYS_REFREC 7 /* Refresh to activate interval */ |
||||
#define CONFIG_SYS_RDLAT 4 /* data latency from read command */ |
||||
|
||||
/* MCCR4 */ |
||||
#define CONFIG_SYS_PRETOACT 2 /* Precharge to activate interval */ |
||||
#define CONFIG_SYS_ACTTOPRE 5 /* Activate to Precharge interval */ |
||||
#define CONFIG_SYS_ACTORW 2 /* Activate to R/W */ |
||||
#define CONFIG_SYS_SDMODE_CAS_LAT 3 /* SDMODE CAS latency */ |
||||
#define CONFIG_SYS_SDMODE_WRAP 0 /* SDMODE wrap type */ |
||||
#define CONFIG_SYS_SDMODE_BURSTLEN 3 /* SDMODE Burst length 2=4, 3=8 */ |
||||
#define CONFIG_SYS_REGISTERD_TYPE_BUFFER 1 |
||||
|
||||
/* memory bank settings*/ |
||||
/*
|
||||
* only bits 20-29 are actually used from these vales to set the |
||||
* start/end address the upper two bits will be 0, and the lower 20 |
||||
* bits will be set to 0x00000 for a start address, or 0xfffff for an |
||||
* end address |
||||
*/ |
||||
#define CONFIG_SYS_BANK0_START 0x00000000 |
||||
#define CONFIG_SYS_BANK0_END (CONFIG_SYS_MAX_RAM_SIZE - 1) |
||||
#define CONFIG_SYS_BANK0_ENABLE 1 |
||||
#define CONFIG_SYS_BANK1_START 0x00000000 |
||||
#define CONFIG_SYS_BANK1_END 0x00000000 |
||||
#define CONFIG_SYS_BANK1_ENABLE 0 |
||||
#define CONFIG_SYS_BANK2_START 0x00000000 |
||||
#define CONFIG_SYS_BANK2_END 0x00000000 |
||||
#define CONFIG_SYS_BANK2_ENABLE 0 |
||||
#define CONFIG_SYS_BANK3_START 0x00000000 |
||||
#define CONFIG_SYS_BANK3_END 0x00000000 |
||||
#define CONFIG_SYS_BANK3_ENABLE 0 |
||||
#define CONFIG_SYS_BANK4_START 0x00000000 |
||||
#define CONFIG_SYS_BANK4_END 0x00000000 |
||||
#define CONFIG_SYS_BANK4_ENABLE 0 |
||||
#define CONFIG_SYS_BANK5_START 0x00000000 |
||||
#define CONFIG_SYS_BANK5_END 0x00000000 |
||||
#define CONFIG_SYS_BANK5_ENABLE 0 |
||||
#define CONFIG_SYS_BANK6_START 0x00000000 |
||||
#define CONFIG_SYS_BANK6_END 0x00000000 |
||||
#define CONFIG_SYS_BANK6_ENABLE 0 |
||||
#define CONFIG_SYS_BANK7_START 0x00000000 |
||||
#define CONFIG_SYS_BANK7_END 0x00000000 |
||||
#define CONFIG_SYS_BANK7_ENABLE 0 |
||||
/*
|
||||
* Memory bank enable bitmask, specifying which of the banks defined above |
||||
are actually present. MSB is for bank #7, LSB is for bank #0. |
||||
*/ |
||||
#define CONFIG_SYS_BANK_ENABLE 0x01 |
||||
|
||||
#define CONFIG_SYS_ODCR 0xff /* configures line driver impedances, */ |
||||
/* see 8240 book for bit definitions */ |
||||
#define CONFIG_SYS_PGMAX 0x32 /* how long the 8240 retains the */ |
||||
/* currently accessed page in memory */ |
||||
/* see 8240 book for details */ |
||||
|
||||
/* SDRAM 0 - 256MB */ |
||||
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) |
||||
#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) |
||||
|
||||
/* stack in DCACHE @ 1GB (no backing mem) */ |
||||
#define CONFIG_SYS_IBAT1L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE) |
||||
#define CONFIG_SYS_IBAT1U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP) |
||||
|
||||
/* PCI memory */ |
||||
#define CONFIG_SYS_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT) |
||||
#define CONFIG_SYS_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP) |
||||
|
||||
/* Flash, config addrs, etc */ |
||||
#define CONFIG_SYS_IBAT3L (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT) |
||||
#define CONFIG_SYS_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) |
||||
|
||||
#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L |
||||
#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U |
||||
#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L |
||||
#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U |
||||
#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L |
||||
#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U |
||||
#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L |
||||
#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U |
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data |
||||
* have to be in the first 8 MB of memory, since this is |
||||
* the maximum mapped by the Linux kernel during initialization. |
||||
*/ |
||||
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Cache Configuration |
||||
*/ |
||||
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC8240 CPU */ |
||||
#if defined(CONFIG_CMD_KGDB) |
||||
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ |
||||
#endif |
||||
#endif /* __CONFIG_H */ |
Loading…
Reference in new issue