Please pull another update for Broadcom MIPS. This contains new SoC's, new boards and new drivers and some bugfixes.master
Tom Rini
7 years ago
commit
31493dd5ff
@ -0,0 +1,154 @@ |
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/* |
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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#include <dt-bindings/clock/bcm3380-clock.h> |
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#include <dt-bindings/gpio/gpio.h> |
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#include <dt-bindings/reset/bcm3380-reset.h> |
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#include "skeleton.dtsi" |
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|
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/ { |
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compatible = "brcm,bcm3380"; |
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|
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cpus { |
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reg = <0x14e00000 0x4>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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u-boot,dm-pre-reloc; |
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|
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cpu@0 { |
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compatible = "brcm,bcm3380-cpu", "mips,mips4Kc"; |
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device_type = "cpu"; |
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reg = <0>; |
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u-boot,dm-pre-reloc; |
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}; |
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|
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cpu@1 { |
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compatible = "brcm,bcm3380-cpu", "mips,mips4Kc"; |
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device_type = "cpu"; |
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reg = <1>; |
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u-boot,dm-pre-reloc; |
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}; |
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}; |
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|
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clocks { |
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compatible = "simple-bus"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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u-boot,dm-pre-reloc; |
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|
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periph_osc: periph-osc { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <48000000>; |
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u-boot,dm-pre-reloc; |
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}; |
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|
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periph_clk0: periph-clk@14e00004 { |
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compatible = "brcm,bcm6345-clk"; |
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reg = <0x14e00004 0x4>; |
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#clock-cells = <1>; |
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}; |
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|
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periph_clk1: periph-clk@14e00008 { |
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compatible = "brcm,bcm6345-clk"; |
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reg = <0x14e00008 0x4>; |
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#clock-cells = <1>; |
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}; |
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}; |
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|
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ubus { |
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compatible = "simple-bus"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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u-boot,dm-pre-reloc; |
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|
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memory-controller@12000000 { |
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compatible = "brcm,bcm6328-mc"; |
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reg = <0x12000000 0x1000>; |
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u-boot,dm-pre-reloc; |
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}; |
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|
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periph_rst0: reset-controller@14e0008c { |
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compatible = "brcm,bcm6345-reset"; |
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reg = <0x14e0008c 0x4>; |
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#reset-cells = <1>; |
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}; |
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|
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periph_rst1: reset-controller@14e00090 { |
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compatible = "brcm,bcm6345-reset"; |
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reg = <0x14e00090 0x4>; |
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#reset-cells = <1>; |
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}; |
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|
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pll_cntl: syscon@14e00094 { |
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compatible = "syscon"; |
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reg = <0x14e00094 0x4>; |
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}; |
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syscon-reboot { |
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compatible = "syscon-reboot"; |
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regmap = <&pll_cntl>; |
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offset = <0x0>; |
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mask = <0x1>; |
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}; |
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|
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wdt: watchdog@14e000dc { |
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compatible = "brcm,bcm6345-wdt"; |
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reg = <0x14e000dc 0xc>; |
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clocks = <&periph_osc>; |
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}; |
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|
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wdt-reboot { |
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compatible = "wdt-reboot"; |
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wdt = <&wdt>; |
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}; |
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gpio0: gpio-controller@14e00100 { |
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compatible = "brcm,bcm6345-gpio"; |
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reg = <0x14e00100 0x4>, <0x14e00108 0x4>; |
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gpio-controller; |
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#gpio-cells = <2>; |
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status = "disabled"; |
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}; |
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gpio1: gpio-controller@14e00104 { |
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compatible = "brcm,bcm6345-gpio"; |
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reg = <0x14e00104 0x4>, <0x14e0010c 0x4>; |
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gpio-controller; |
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#gpio-cells = <2>; |
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ngpios = <3>; |
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status = "disabled"; |
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}; |
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uart0: serial@14e00200 { |
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compatible = "brcm,bcm6345-uart"; |
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reg = <0x14e00200 0x18>; |
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clocks = <&periph_osc>; |
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status = "disabled"; |
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}; |
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uart1: serial@14e00220 { |
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compatible = "brcm,bcm6345-uart"; |
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reg = <0x14e00220 0x18>; |
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clocks = <&periph_osc>; |
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status = "disabled"; |
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}; |
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leds: led-controller@14e00f00 { |
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compatible = "brcm,bcm6328-leds"; |
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reg = <0x14e00f00 0x1c>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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status = "disabled"; |
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}; |
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}; |
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}; |
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@ -0,0 +1,118 @@ |
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/* |
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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#include <dt-bindings/clock/bcm6338-clock.h> |
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#include <dt-bindings/gpio/gpio.h> |
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#include <dt-bindings/reset/bcm6338-reset.h> |
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#include "skeleton.dtsi" |
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|
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/ { |
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compatible = "brcm,bcm6338"; |
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|
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cpus { |
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reg = <0xfffe0000 0x4>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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u-boot,dm-pre-reloc; |
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|
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cpu@0 { |
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compatible = "brcm,bcm6338-cpu", "mips,mips4Kc"; |
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device_type = "cpu"; |
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reg = <0>; |
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u-boot,dm-pre-reloc; |
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}; |
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}; |
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|
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clocks { |
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compatible = "simple-bus"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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u-boot,dm-pre-reloc; |
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|
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periph_osc: periph-osc { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <50000000>; |
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u-boot,dm-pre-reloc; |
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}; |
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periph_clk: periph-clk { |
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compatible = "brcm,bcm6345-clk"; |
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reg = <0xfffe0004 0x4>; |
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#clock-cells = <1>; |
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}; |
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}; |
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pflash: nor@1fc00000 { |
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compatible = "cfi-flash"; |
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reg = <0x1fc00000 0x400000>; |
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bank-width = <2>; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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status = "disabled"; |
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}; |
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ubus { |
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compatible = "simple-bus"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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u-boot,dm-pre-reloc; |
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pll_cntl: syscon@fffe0008 { |
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compatible = "syscon"; |
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reg = <0xfffe0008 0x4>; |
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}; |
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syscon-reboot { |
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compatible = "syscon-reboot"; |
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regmap = <&pll_cntl>; |
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offset = <0x0>; |
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mask = <0x1>; |
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}; |
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|
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periph_rst: reset-controller@fffe0028 { |
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compatible = "brcm,bcm6345-reset"; |
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reg = <0xfffe0028 0x4>; |
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#reset-cells = <1>; |
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}; |
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wdt: watchdog@fffe021c { |
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compatible = "brcm,bcm6345-wdt"; |
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reg = <0xfffe021c 0xc>; |
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clocks = <&periph_osc>; |
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}; |
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|
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wdt-reboot { |
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compatible = "wdt-reboot"; |
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wdt = <&wdt>; |
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}; |
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uart0: serial@fffe0300 { |
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compatible = "brcm,bcm6345-uart"; |
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reg = <0xfffe0300 0x18>; |
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clocks = <&periph_osc>; |
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status = "disabled"; |
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}; |
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gpio: gpio-controller@fffe0404 { |
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compatible = "brcm,bcm6345-gpio"; |
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reg = <0xfffe0404 0x4>, <0xfffe040c 0x4>; |
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gpio-controller; |
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#gpio-cells = <2>; |
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ngpios = <8>; |
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status = "disabled"; |
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}; |
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memory-controller@fffe3100 { |
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compatible = "brcm,bcm6338-mc"; |
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reg = <0xfffe3100 0x38>; |
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u-boot,dm-pre-reloc; |
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}; |
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}; |
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}; |
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@ -0,0 +1,127 @@ |
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/* |
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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#include <dt-bindings/clock/bcm6348-clock.h> |
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#include <dt-bindings/gpio/gpio.h> |
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#include <dt-bindings/reset/bcm6348-reset.h> |
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#include "skeleton.dtsi" |
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|
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/ { |
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compatible = "brcm,bcm6348"; |
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|
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cpus { |
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reg = <0xfffe0000 0x4>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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u-boot,dm-pre-reloc; |
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|
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cpu@0 { |
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compatible = "brcm,bcm6348-cpu", "mips,mips4Kc"; |
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device_type = "cpu"; |
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reg = <0>; |
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u-boot,dm-pre-reloc; |
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}; |
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}; |
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|
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clocks { |
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compatible = "simple-bus"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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u-boot,dm-pre-reloc; |
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|
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periph_osc: periph-osc { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <50000000>; |
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u-boot,dm-pre-reloc; |
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}; |
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|
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periph_clk: periph-clk { |
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compatible = "brcm,bcm6345-clk"; |
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reg = <0xfffe0004 0x4>; |
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#clock-cells = <1>; |
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}; |
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}; |
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pflash: nor@1fc00000 { |
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compatible = "cfi-flash"; |
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reg = <0x1fc00000 0x2000000>; |
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bank-width = <2>; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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status = "disabled"; |
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}; |
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ubus { |
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compatible = "simple-bus"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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u-boot,dm-pre-reloc; |
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|
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pll_cntl: syscon@fffe0008 { |
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compatible = "syscon"; |
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reg = <0xfffe0008 0x4>; |
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}; |
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syscon-reboot { |
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compatible = "syscon-reboot"; |
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regmap = <&pll_cntl>; |
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offset = <0x0>; |
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mask = <0x1>; |
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}; |
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|
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periph_rst: reset-controller@fffe0028 { |
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compatible = "brcm,bcm6345-reset"; |
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reg = <0xfffe0028 0x4>; |
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#reset-cells = <1>; |
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}; |
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wdt: watchdog@fffe021c { |
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compatible = "brcm,bcm6345-wdt"; |
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reg = <0xfffe021c 0xc>; |
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clocks = <&periph_osc>; |
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}; |
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wdt-reboot { |
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compatible = "wdt-reboot"; |
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wdt = <&wdt>; |
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}; |
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uart0: serial@fffe0300 { |
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compatible = "brcm,bcm6345-uart"; |
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reg = <0xfffe0300 0x18>; |
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clocks = <&periph_osc>; |
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|
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status = "disabled"; |
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}; |
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gpio1: gpio-controller@fffe0400 { |
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compatible = "brcm,bcm6345-gpio"; |
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reg = <0xfffe0400 0x4>, <0xfffe0408 0x4>; |
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gpio-controller; |
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#gpio-cells = <2>; |
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ngpios = <5>; |
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|
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status = "disabled"; |
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}; |
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|
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gpio0: gpio-controller@fffe0404 { |
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compatible = "brcm,bcm6345-gpio"; |
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reg = <0xfffe0404 0x4>, <0xfffe040c 0x4>; |
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gpio-controller; |
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#gpio-cells = <2>; |
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|
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status = "disabled"; |
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}; |
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|
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memory-controller@fffe2300 { |
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compatible = "brcm,bcm6338-mc"; |
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reg = <0xfffe2300 0x38>; |
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u-boot,dm-pre-reloc; |
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}; |
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}; |
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}; |
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@ -0,0 +1,49 @@ |
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/* |
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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/dts-v1/; |
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|
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#include "brcm,bcm6348.dtsi" |
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|
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/ { |
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model = "Comtrend CT-5361"; |
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compatible = "comtrend,ct-5361", "brcm,bcm6348"; |
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|
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aliases { |
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serial0 = &uart0; |
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}; |
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|
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chosen { |
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stdout-path = "serial0:115200n8"; |
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}; |
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|
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gpio-leds { |
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compatible = "gpio-leds"; |
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|
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power_green { |
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label = "CT-5361:green:power"; |
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gpios = <&gpio0 0 1>; |
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}; |
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alarm_red { |
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label = "CT-5361:red:alarm"; |
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gpios = <&gpio0 2 1>; |
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}; |
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}; |
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}; |
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|
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&gpio0 { |
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status = "okay"; |
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}; |
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|
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&pflash { |
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status = "okay"; |
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}; |
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|
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&uart0 { |
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u-boot,dm-pre-reloc; |
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status = "okay"; |
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}; |
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@ -0,0 +1,96 @@ |
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/* |
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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/dts-v1/; |
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|
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#include "brcm,bcm3380.dtsi" |
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|
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/ { |
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model = "Netgear CG3100D"; |
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compatible = "netgear,cg3100d", "brcm,bcm3380"; |
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|
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aliases { |
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serial0 = &uart0; |
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}; |
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|
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chosen { |
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stdout-path = "serial0:115200n8"; |
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}; |
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|
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gpio-leds { |
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compatible = "gpio-leds"; |
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|
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wifi_green { |
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label = "CG3100D:green:wifi"; |
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gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>; |
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}; |
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|
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wps_green { |
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label = "CG3100D:green:wps"; |
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gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>; |
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}; |
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|
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power_red { |
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label = "CG3100D:red:power"; |
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gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; |
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}; |
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}; |
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}; |
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|
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&leds { |
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status = "okay"; |
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|
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led@0 { |
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reg = <0>; |
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active-low; |
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label = "CG3100D:green:power"; |
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}; |
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|
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led@1 { |
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reg = <1>; |
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active-low; |
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label = "CG3100D:green:downlink"; |
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}; |
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|
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led@2 { |
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reg = <2>; |
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active-low; |
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label = "CG3100D:orange:downlink"; |
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}; |
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|
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led@3 { |
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reg = <3>; |
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active-low; |
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label = "CG3100D:green:uplink"; |
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}; |
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|
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led@4 { |
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reg = <4>; |
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active-low; |
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label = "CG3100D:orange:uplink"; |
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}; |
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|
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led@6 { |
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reg = <6>; |
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active-low; |
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label = "CG3100D:green:inet"; |
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}; |
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|
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led@7 { |
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reg = <7>; |
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active-low; |
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label = "CG3100D:green:stby"; |
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}; |
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}; |
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|
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&gpio0 { |
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status = "okay"; |
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}; |
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|
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&uart0 { |
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u-boot,dm-pre-reloc; |
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status = "okay"; |
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}; |
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@ -0,0 +1,50 @@ |
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/* |
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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/dts-v1/; |
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|
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#include "brcm,bcm6338.dtsi" |
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|
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/ { |
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model = "Sagem F@ST1704"; |
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compatible = "sagem,f@st1704", "brcm,bcm6338"; |
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|
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aliases { |
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serial0 = &uart0; |
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}; |
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|
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chosen { |
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stdout-path = "serial0:115200n8"; |
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}; |
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|
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gpio-leds { |
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compatible = "gpio-leds"; |
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|
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inet_green { |
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label = "F@ST1704:green:inet"; |
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gpios = <&gpio 0 GPIO_ACTIVE_LOW>; |
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}; |
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|
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power_green { |
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label = "F@ST1704:green:power"; |
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gpios = <&gpio 1 GPIO_ACTIVE_LOW>; |
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}; |
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|
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inet_red { |
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label = "F@ST1704:red:inet"; |
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gpios = <&gpio 2 GPIO_ACTIVE_LOW>; |
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}; |
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}; |
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}; |
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|
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&gpio { |
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status = "okay"; |
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}; |
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|
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&uart0 { |
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u-boot,dm-pre-reloc; |
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status = "okay"; |
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}; |
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@ -0,0 +1,12 @@ |
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if BOARD_COMTREND_CT5361 |
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|
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config SYS_BOARD |
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default "ct5361" |
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|
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config SYS_VENDOR |
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default "comtrend" |
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|
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config SYS_CONFIG_NAME |
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default "comtrend_ct5361" |
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|
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endif |
||||
@ -0,0 +1,6 @@ |
||||
COMTREND CT-5361 BOARD |
||||
M: Álvaro Fernández Rojas <noltari@gmail.com> |
||||
S: Maintained |
||||
F: board/comtrend/ct-5361/ |
||||
F: include/configs/comtrend_ct5361.h |
||||
F: configs/comtrend_ct5361_ram_defconfig |
||||
@ -0,0 +1,5 @@ |
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
obj-y += ct-5361.o
|
||||
@ -0,0 +1,7 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
@ -0,0 +1,12 @@ |
||||
if BOARD_NETGEAR_CG3100D |
||||
|
||||
config SYS_BOARD |
||||
default "cg3100d" |
||||
|
||||
config SYS_VENDOR |
||||
default "netgear" |
||||
|
||||
config SYS_CONFIG_NAME |
||||
default "netgear_cg3100d" |
||||
|
||||
endif |
||||
@ -0,0 +1,6 @@ |
||||
NETGEAR CG3100D BOARD |
||||
M: Álvaro Fernández Rojas <noltari@gmail.com> |
||||
S: Maintained |
||||
F: board/netgear/cg3100d/ |
||||
F: include/configs/netgear_cg3100d.h |
||||
F: configs/netgear_cg3100d_ram_defconfig |
||||
@ -0,0 +1,5 @@ |
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
obj-y += cg3100d.o
|
||||
@ -0,0 +1,7 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
@ -0,0 +1,12 @@ |
||||
if BOARD_SAGEM_FAST1704 |
||||
|
||||
config SYS_BOARD |
||||
default "f@st1704" |
||||
|
||||
config SYS_VENDOR |
||||
default "sagem" |
||||
|
||||
config SYS_CONFIG_NAME |
||||
default "sagem_f@st1704" |
||||
|
||||
endif |
||||
@ -0,0 +1,6 @@ |
||||
SAGEM F@ST1704 BOARD |
||||
M: Álvaro Fernández Rojas <noltari@gmail.com> |
||||
S: Maintained |
||||
F: board/sagem/f@st1704/ |
||||
F: include/configs/sagem_f@st1704.h |
||||
F: configs/sagem_f@st1704_ram_defconfig |
||||
@ -0,0 +1,5 @@ |
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
obj-y += f@st1704.o
|
||||
@ -0,0 +1,7 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
@ -0,0 +1,57 @@ |
||||
CONFIG_ARCH_BMIPS=y |
||||
CONFIG_BAUDRATE=115200 |
||||
CONFIG_BCM6345_CLK=y |
||||
CONFIG_BCM6345_GPIO=y |
||||
CONFIG_BCM6345_SERIAL=y |
||||
CONFIG_BMIPS_BOOT_RAM=y |
||||
CONFIG_BOARD_COMTREND_CT5361=y |
||||
CONFIG_CFI_FLASH=y |
||||
# CONFIG_CMD_BOOTD is not set |
||||
CONFIG_CMD_BOOTM=y |
||||
CONFIG_CMD_CPU=y |
||||
# CONFIG_CMD_CRC32 is not set |
||||
# CONFIG_CMD_EDITENV is not set |
||||
# CONFIG_CMD_ELF is not set |
||||
# CONFIG_CMD_ENV_EXISTS is not set |
||||
# CONFIG_CMD_EXPORTENV is not set |
||||
CONFIG_CMD_FLASH=y |
||||
# CONFIG_CMD_FPGA is not set |
||||
# CONFIG_CMD_GPIO is not set |
||||
# CONFIG_CMD_IMLS is not set |
||||
# CONFIG_CMD_IMPORTENV is not set |
||||
CONFIG_CMD_LED=y |
||||
CONFIG_CMD_LICENSE=y |
||||
CONFIG_CMD_LOADB=y |
||||
# CONFIG_CMD_LOADS is not set |
||||
CONFIG_CMD_MEMINFO=y |
||||
# CONFIG_CMD_MISC is not set |
||||
# CONFIG_CMD_NET is not set |
||||
# CONFIG_CMD_NFS is not set |
||||
# CONFIG_CMD_SAVEENV is not set |
||||
# CONFIG_CMD_XIMG is not set |
||||
CONFIG_DEFAULT_DEVICE_TREE="comtrend,ct-5361" |
||||
CONFIG_DISPLAY_CPUINFO=y |
||||
# CONFIG_DM_DEVICE_REMOVE is not set |
||||
CONFIG_DM_GPIO=y |
||||
CONFIG_DM_RESET=y |
||||
CONFIG_DM_SERIAL=y |
||||
CONFIG_HUSH_PARSER=y |
||||
CONFIG_LED=y |
||||
CONFIG_LED_GPIO=y |
||||
CONFIG_MIPS=y |
||||
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set |
||||
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set |
||||
CONFIG_MIPS_BOOT_FDT=y |
||||
CONFIG_MTD=y |
||||
CONFIG_MTD_DEVICE=y |
||||
CONFIG_MTD_NOR_FLASH=y |
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y |
||||
CONFIG_RESET=y |
||||
CONFIG_RESET_BCM6345=y |
||||
CONFIG_SOC_BMIPS_BCM6348=y |
||||
# CONFIG_SPL_SERIAL_PRESENT is not set |
||||
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
||||
CONFIG_SYS_PROMPT="CT-5361 # " |
||||
CONFIG_SYS_TEXT_BASE=0x80010000 |
||||
CONFIG_WDT=y |
||||
CONFIG_WDT_BCM6345=y |
||||
@ -0,0 +1,56 @@ |
||||
CONFIG_ARCH_BMIPS=y |
||||
CONFIG_BAUDRATE=115200 |
||||
CONFIG_BCM6345_CLK=y |
||||
CONFIG_BCM6345_GPIO=y |
||||
CONFIG_BCM6345_SERIAL=y |
||||
CONFIG_BMIPS_BOOT_RAM=y |
||||
CONFIG_BOARD_NETGEAR_CG3100D=y |
||||
# CONFIG_CMD_BOOTD is not set |
||||
CONFIG_CMD_BOOTM=y |
||||
CONFIG_CMD_CPU=y |
||||
# CONFIG_CMD_CRC32 is not set |
||||
# CONFIG_CMD_EDITENV is not set |
||||
# CONFIG_CMD_ELF is not set |
||||
# CONFIG_CMD_ENV_EXISTS is not set |
||||
# CONFIG_CMD_EXPORTENV is not set |
||||
# CONFIG_CMD_FLASH is not set |
||||
# CONFIG_CMD_FPGA is not set |
||||
# CONFIG_CMD_GPIO is not set |
||||
# CONFIG_CMD_IMLS is not set |
||||
# CONFIG_CMD_IMPORTENV is not set |
||||
CONFIG_CMD_LED=y |
||||
CONFIG_CMD_LICENSE=y |
||||
CONFIG_CMD_LOADB=y |
||||
# CONFIG_CMD_LOADS is not set |
||||
CONFIG_CMD_MEMINFO=y |
||||
# CONFIG_CMD_MISC is not set |
||||
# CONFIG_CMD_NET is not set |
||||
# CONFIG_CMD_NFS is not set |
||||
# CONFIG_CMD_SAVEENV is not set |
||||
# CONFIG_CMD_XIMG is not set |
||||
CONFIG_DEFAULT_DEVICE_TREE="netgear,cg3100d" |
||||
CONFIG_DISPLAY_CPUINFO=y |
||||
# CONFIG_DM_DEVICE_REMOVE is not set |
||||
CONFIG_DM_GPIO=y |
||||
CONFIG_DM_RESET=y |
||||
CONFIG_DM_SERIAL=y |
||||
CONFIG_HUSH_PARSER=y |
||||
CONFIG_LED=y |
||||
CONFIG_LED_BCM6328=y |
||||
CONFIG_LED_BLINK=y |
||||
CONFIG_LED_GPIO=y |
||||
CONFIG_MIPS=y |
||||
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set |
||||
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set |
||||
CONFIG_MIPS_BOOT_FDT=y |
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y |
||||
CONFIG_RESET=y |
||||
CONFIG_RESET_BCM6345=y |
||||
CONFIG_SOC_BMIPS_BCM3380=y |
||||
# CONFIG_SPL_SERIAL_PRESENT is not set |
||||
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
||||
CONFIG_SYS_NO_FLASH=y |
||||
CONFIG_SYS_PROMPT="CG3100D # " |
||||
CONFIG_SYS_TEXT_BASE=0x80010000 |
||||
CONFIG_WDT=y |
||||
CONFIG_WDT_BCM6345=y |
||||
@ -0,0 +1,52 @@ |
||||
CONFIG_ARCH_BMIPS=y |
||||
CONFIG_BAUDRATE=115200 |
||||
CONFIG_BCM6345_CLK=y |
||||
CONFIG_BCM6345_GPIO=y |
||||
CONFIG_BCM6345_SERIAL=y |
||||
CONFIG_BMIPS_BOOT_RAM=y |
||||
CONFIG_BOARD_SAGEM_FAST1704=y |
||||
# CONFIG_CMD_BOOTD is not set |
||||
CONFIG_CMD_BOOTM=y |
||||
CONFIG_CMD_CPU=y |
||||
# CONFIG_CMD_CRC32 is not set |
||||
# CONFIG_CMD_EDITENV is not set |
||||
# CONFIG_CMD_ELF is not set |
||||
# CONFIG_CMD_ENV_EXISTS is not set |
||||
# CONFIG_CMD_EXPORTENV is not set |
||||
# CONFIG_CMD_FLASH is not set |
||||
# CONFIG_CMD_FPGA is not set |
||||
# CONFIG_CMD_GPIO is not set |
||||
# CONFIG_CMD_IMLS is not set |
||||
# CONFIG_CMD_IMPORTENV is not set |
||||
CONFIG_CMD_LED=y |
||||
CONFIG_CMD_LICENSE=y |
||||
CONFIG_CMD_LOADB=y |
||||
# CONFIG_CMD_LOADS is not set |
||||
CONFIG_CMD_MEMINFO=y |
||||
# CONFIG_CMD_MISC is not set |
||||
# CONFIG_CMD_NET is not set |
||||
# CONFIG_CMD_NFS is not set |
||||
# CONFIG_CMD_SAVEENV is not set |
||||
# CONFIG_CMD_XIMG is not set |
||||
CONFIG_DEFAULT_DEVICE_TREE="sagem,f@st1704" |
||||
CONFIG_DISPLAY_CPUINFO=y |
||||
# CONFIG_DM_DEVICE_REMOVE is not set |
||||
CONFIG_DM_GPIO=y |
||||
CONFIG_DM_RESET=y |
||||
CONFIG_DM_SERIAL=y |
||||
CONFIG_HUSH_PARSER=y |
||||
CONFIG_LED=y |
||||
CONFIG_LED_GPIO=y |
||||
CONFIG_MIPS=y |
||||
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set |
||||
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set |
||||
CONFIG_MIPS_BOOT_FDT=y |
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y |
||||
CONFIG_RESET=y |
||||
CONFIG_RESET_BCM6345=y |
||||
CONFIG_SOC_BMIPS_BCM6338=y |
||||
# CONFIG_SPL_SERIAL_PRESENT is not set |
||||
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
||||
CONFIG_SYS_NO_FLASH=y |
||||
CONFIG_SYS_PROMPT="F@ST1704 # " |
||||
CONFIG_SYS_TEXT_BASE=0x80010000 |
||||
@ -0,0 +1,60 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <dm.h> |
||||
#include <errno.h> |
||||
#include <sysreset.h> |
||||
#include <wdt.h> |
||||
|
||||
struct wdt_reboot_priv { |
||||
struct udevice *wdt; |
||||
}; |
||||
|
||||
static int wdt_reboot_request(struct udevice *dev, enum sysreset_t type) |
||||
{ |
||||
struct wdt_reboot_priv *priv = dev_get_priv(dev); |
||||
int ret; |
||||
|
||||
ret = wdt_expire_now(priv->wdt, 0); |
||||
if (ret) |
||||
return ret; |
||||
|
||||
return -EINPROGRESS; |
||||
} |
||||
|
||||
static struct sysreset_ops wdt_reboot_ops = { |
||||
.request = wdt_reboot_request, |
||||
}; |
||||
|
||||
int wdt_reboot_probe(struct udevice *dev) |
||||
{ |
||||
struct wdt_reboot_priv *priv = dev_get_priv(dev); |
||||
int err; |
||||
|
||||
err = uclass_get_device_by_phandle(UCLASS_WDT, dev, |
||||
"wdt", &priv->wdt); |
||||
if (err) { |
||||
error("unable to find wdt device\n"); |
||||
return err; |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static const struct udevice_id wdt_reboot_ids[] = { |
||||
{ .compatible = "wdt-reboot" }, |
||||
{ /* sentinel */ } |
||||
}; |
||||
|
||||
U_BOOT_DRIVER(wdt_reboot) = { |
||||
.name = "wdt_reboot", |
||||
.id = UCLASS_SYSRESET, |
||||
.of_match = wdt_reboot_ids, |
||||
.ops = &wdt_reboot_ops, |
||||
.priv_auto_alloc_size = sizeof(struct wdt_reboot_priv), |
||||
.probe = wdt_reboot_probe, |
||||
}; |
||||
@ -0,0 +1,110 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* Derived from linux/drivers/watchdog/bcm63xx_wdt.c: |
||||
* Copyright (C) 2007 Miguel Gaio <miguel.gaio@efixo.com> |
||||
* Copyright (C) 2008 Florian Fainelli <florian@openwrt.org> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <dm.h> |
||||
#include <wdt.h> |
||||
#include <asm/io.h> |
||||
|
||||
/* WDT Value register */ |
||||
#define WDT_VAL_REG 0x0 |
||||
#define WDT_VAL_MIN 0x00000002 |
||||
#define WDT_VAL_MAX 0xfffffffe |
||||
|
||||
/* WDT Control register */ |
||||
#define WDT_CTL_REG 0x4 |
||||
#define WDT_CTL_START1_MASK 0x0000ff00 |
||||
#define WDT_CTL_START2_MASK 0x000000ff |
||||
#define WDT_CTL_STOP1_MASK 0x0000ee00 |
||||
#define WDT_CTL_STOP2_MASK 0x000000ee |
||||
|
||||
struct bcm6345_wdt_priv { |
||||
void __iomem *regs; |
||||
}; |
||||
|
||||
static int bcm6345_wdt_reset(struct udevice *dev) |
||||
{ |
||||
struct bcm6345_wdt_priv *priv = dev_get_priv(dev); |
||||
|
||||
writel_be(WDT_CTL_START1_MASK, priv->regs + WDT_CTL_REG); |
||||
writel_be(WDT_CTL_START2_MASK, priv->regs + WDT_CTL_REG); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static int bcm6345_wdt_start(struct udevice *dev, u64 timeout, ulong flags) |
||||
{ |
||||
struct bcm6345_wdt_priv *priv = dev_get_priv(dev); |
||||
|
||||
if (timeout < WDT_VAL_MIN) { |
||||
debug("watchdog won't fire with less than 2 ticks\n"); |
||||
timeout = WDT_VAL_MIN; |
||||
} else if (timeout > WDT_VAL_MAX) { |
||||
debug("maximum watchdog timeout exceeded\n"); |
||||
timeout = WDT_VAL_MAX; |
||||
} |
||||
|
||||
writel_be(timeout, priv->regs + WDT_VAL_REG); |
||||
|
||||
return bcm6345_wdt_reset(dev); |
||||
} |
||||
|
||||
static int bcm6345_wdt_expire_now(struct udevice *dev, ulong flags) |
||||
{ |
||||
return bcm6345_wdt_start(dev, WDT_VAL_MIN, flags); |
||||
} |
||||
|
||||
static int bcm6345_wdt_stop(struct udevice *dev) |
||||
{ |
||||
struct bcm6345_wdt_priv *priv = dev_get_priv(dev); |
||||
|
||||
writel_be(WDT_CTL_STOP1_MASK, priv->regs + WDT_CTL_REG); |
||||
writel_be(WDT_CTL_STOP2_MASK, priv->regs + WDT_CTL_REG); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static const struct wdt_ops bcm6345_wdt_ops = { |
||||
.expire_now = bcm6345_wdt_expire_now, |
||||
.reset = bcm6345_wdt_reset, |
||||
.start = bcm6345_wdt_start, |
||||
.stop = bcm6345_wdt_stop, |
||||
}; |
||||
|
||||
static const struct udevice_id bcm6345_wdt_ids[] = { |
||||
{ .compatible = "brcm,bcm6345-wdt" }, |
||||
{ /* sentinel */ } |
||||
}; |
||||
|
||||
static int bcm6345_wdt_probe(struct udevice *dev) |
||||
{ |
||||
struct bcm6345_wdt_priv *priv = dev_get_priv(dev); |
||||
fdt_addr_t addr; |
||||
fdt_size_t size; |
||||
|
||||
addr = dev_get_addr_size_index(dev, 0, &size); |
||||
if (addr == FDT_ADDR_T_NONE) |
||||
return -EINVAL; |
||||
|
||||
priv->regs = ioremap(addr, size); |
||||
|
||||
bcm6345_wdt_stop(dev); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
U_BOOT_DRIVER(wdt_bcm6345) = { |
||||
.name = "wdt_bcm6345", |
||||
.id = UCLASS_WDT, |
||||
.of_match = bcm6345_wdt_ids, |
||||
.ops = &bcm6345_wdt_ops, |
||||
.priv_auto_alloc_size = sizeof(struct bcm6345_wdt_priv), |
||||
.probe = bcm6345_wdt_probe, |
||||
}; |
||||
@ -0,0 +1,25 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_BMIPS_BCM3380_H |
||||
#define __CONFIG_BMIPS_BCM3380_H |
||||
|
||||
/* CPU */ |
||||
#define CONFIG_SYS_MIPS_TIMER_FREQ 166500000 |
||||
|
||||
/* RAM */ |
||||
#define CONFIG_NR_DRAM_BANKS 1 |
||||
#define CONFIG_SYS_SDRAM_BASE 0x80000000 |
||||
|
||||
/* U-Boot */ |
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000 |
||||
|
||||
#if defined(CONFIG_BMIPS_BOOT_RAM) |
||||
#define CONFIG_SKIP_LOWLEVEL_INIT |
||||
#define CONFIG_SYS_INIT_SP_OFFSET 0x2000 |
||||
#endif |
||||
|
||||
#endif /* __CONFIG_BMIPS_BCM3380_H */ |
||||
@ -0,0 +1,30 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_BMIPS_BCM6338_H |
||||
#define __CONFIG_BMIPS_BCM6338_H |
||||
|
||||
/* CPU */ |
||||
#define CONFIG_SYS_MIPS_TIMER_FREQ 120000000 |
||||
|
||||
/* RAM */ |
||||
#define CONFIG_NR_DRAM_BANKS 1 |
||||
#define CONFIG_SYS_SDRAM_BASE 0x80000000 |
||||
|
||||
/* U-Boot */ |
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000 |
||||
|
||||
#if defined(CONFIG_BMIPS_BOOT_RAM) |
||||
#define CONFIG_SKIP_LOWLEVEL_INIT |
||||
#define CONFIG_SYS_INIT_SP_OFFSET 0x2000 |
||||
#endif |
||||
|
||||
#define CONFIG_SYS_FLASH_BASE 0xbfc00000 |
||||
#define CONFIG_SYS_FLASH_EMPTY_INFO |
||||
#define CONFIG_SYS_FLASH_PROTECTION |
||||
#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 |
||||
|
||||
#endif /* __CONFIG_BMIPS_BCM6338_H */ |
||||
@ -0,0 +1,30 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_BMIPS_BCM6348_H |
||||
#define __CONFIG_BMIPS_BCM6348_H |
||||
|
||||
/* CPU */ |
||||
#define CONFIG_SYS_MIPS_TIMER_FREQ 128000000 |
||||
|
||||
/* RAM */ |
||||
#define CONFIG_NR_DRAM_BANKS 1 |
||||
#define CONFIG_SYS_SDRAM_BASE 0x80000000 |
||||
|
||||
/* U-Boot */ |
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000 |
||||
|
||||
#if defined(CONFIG_BMIPS_BOOT_RAM) |
||||
#define CONFIG_SKIP_LOWLEVEL_INIT |
||||
#define CONFIG_SYS_INIT_SP_OFFSET 0x2000 |
||||
#endif |
||||
|
||||
#define CONFIG_SYS_FLASH_BASE 0xbfc00000 |
||||
#define CONFIG_SYS_FLASH_EMPTY_INFO |
||||
#define CONFIG_SYS_FLASH_PROTECTION |
||||
#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 |
||||
|
||||
#endif /* __CONFIG_BMIPS_BCM6348_H */ |
||||
@ -0,0 +1,20 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <configs/bmips_common.h> |
||||
#include <configs/bmips_bcm6348.h> |
||||
|
||||
#define CONFIG_REMAKE_ELF |
||||
|
||||
#define CONFIG_ENV_IS_NOWHERE |
||||
#define CONFIG_ENV_SIZE (8 * 1024) |
||||
|
||||
#define CONFIG_AUTO_COMPLETE |
||||
#define CONFIG_CMDLINE_EDITING |
||||
#define CONFIG_SYS_LONGHELP |
||||
|
||||
#define CONFIG_SYS_FLASH_CFI 1 |
||||
#define CONFIG_FLASH_CFI_DRIVER 1 |
||||
@ -0,0 +1,15 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <configs/bmips_common.h> |
||||
#include <configs/bmips_bcm3380.h> |
||||
|
||||
#define CONFIG_ENV_IS_NOWHERE |
||||
#define CONFIG_ENV_SIZE (8 * 1024) |
||||
|
||||
#define CONFIG_AUTO_COMPLETE |
||||
#define CONFIG_CMDLINE_EDITING |
||||
#define CONFIG_SYS_LONGHELP |
||||
@ -0,0 +1,15 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <configs/bmips_common.h> |
||||
#include <configs/bmips_bcm6338.h> |
||||
|
||||
#define CONFIG_ENV_IS_NOWHERE |
||||
#define CONFIG_ENV_SIZE (8 * 1024) |
||||
|
||||
#define CONFIG_AUTO_COMPLETE |
||||
#define CONFIG_CMDLINE_EDITING |
||||
#define CONFIG_SYS_LONGHELP |
||||
@ -0,0 +1,23 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* Derived from Broadcom GPL Source Code: |
||||
* Copyright (C) Broadcom Corporation |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __DT_BINDINGS_CLOCK_BCM3380_H |
||||
#define __DT_BINDINGS_CLOCK_BCM3380_H |
||||
|
||||
#define BCM3380_CLK0_DDR 0 |
||||
#define BCM3380_CLK0_FPM 1 |
||||
#define BCM3380_CLK0_CRYPTO 2 |
||||
#define BCM3380_CLK0_EPHY 3 |
||||
#define BCM3380_CLK0_PCIE 16 |
||||
#define BCM3380_CLK0_SPI 17 |
||||
#define BCM3380_CLK0_ENET0 18 |
||||
#define BCM3380_CLK0_ENET1 19 |
||||
#define BCM3380_CLK0_PCM 27 |
||||
|
||||
#endif /* __DT_BINDINGS_CLOCK_BCM3380_H */ |
||||
@ -0,0 +1,19 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __DT_BINDINGS_CLOCK_BCM6338_H |
||||
#define __DT_BINDINGS_CLOCK_BCM6338_H |
||||
|
||||
#define BCM6338_CLK_ADSL 0 |
||||
#define BCM6338_CLK_MPI 1 |
||||
#define BCM6338_CLK_SDRAM 2 |
||||
#define BCM6338_CLK_ENET 4 |
||||
#define BCM6338_CLK_SAR 5 |
||||
#define BCM6338_CLK_SPI 9 |
||||
|
||||
#endif /* __DT_BINDINGS_CLOCK_BCM6338_H */ |
||||
@ -0,0 +1,22 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __DT_BINDINGS_CLOCK_BCM6348_H |
||||
#define __DT_BINDINGS_CLOCK_BCM6348_H |
||||
|
||||
#define BCM6348_CLK_ADSL 0 |
||||
#define BCM6348_CLK_MPI 1 |
||||
#define BCM6348_CLK_SDRAM 2 |
||||
#define BCM6348_CLK_M2M 3 |
||||
#define BCM6348_CLK_ENET 4 |
||||
#define BCM6348_CLK_SAR 5 |
||||
#define BCM6348_CLK_USBS 6 |
||||
#define BCM6348_CLK_USBH 8 |
||||
#define BCM6348_CLK_SPI 9 |
||||
|
||||
#endif /* __DT_BINDINGS_CLOCK_BCM6348_H */ |
||||
@ -0,0 +1,16 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* Derived from Broadcom GPL Source Code: |
||||
* Copyright (C) Broadcom Corporation |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __DT_BINDINGS_RESET_BCM3380_H |
||||
#define __DT_BINDINGS_RESET_BCM3380_H |
||||
|
||||
#define BCM3380_RST0_SPI 0 |
||||
#define BCM3380_RST0_PCM 13 |
||||
|
||||
#endif /* __DT_BINDINGS_RESET_BCM3380_H */ |
||||
@ -0,0 +1,22 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __DT_BINDINGS_RESET_BCM6338_H |
||||
#define __DT_BINDINGS_RESET_BCM6338_H |
||||
|
||||
#define BCM6338_RST_SPI 0 |
||||
#define BCM6338_RST_ENET 2 |
||||
#define BCM6338_RST_USBH 3 |
||||
#define BCM6338_RST_USBS 4 |
||||
#define BCM6338_RST_ADSL 5 |
||||
#define BCM6338_RST_DMAMEM 6 |
||||
#define BCM6338_RST_SAR 7 |
||||
#define BCM6338_RST_ACLC 8 |
||||
#define BCM6338_RST_ADSL_MIPS 10 |
||||
|
||||
#endif /* __DT_BINDINGS_RESET_BCM6338_H */ |
||||
@ -0,0 +1,22 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
||||
* |
||||
* Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __DT_BINDINGS_RESET_BCM6348_H |
||||
#define __DT_BINDINGS_RESET_BCM6348_H |
||||
|
||||
#define BCM6348_RST_SPI 0 |
||||
#define BCM6348_RST_ENET 2 |
||||
#define BCM6348_RST_USBH 3 |
||||
#define BCM6348_RST_USBS 4 |
||||
#define BCM6348_RST_ADSL 5 |
||||
#define BCM6348_RST_DMAMEM 6 |
||||
#define BCM6348_RST_SAR 7 |
||||
#define BCM6348_RST_ACLC 8 |
||||
#define BCM6348_RST_ADSL_MIPS 10 |
||||
|
||||
#endif /* __DT_BINDINGS_RESET_BCM6348_H */ |
||||
Loading…
Reference in new issue