Whitebox
/
u-boot
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

mach-omap2: add AM335x Display PLL register definition

Browse Source 
Adds the register definition of the Display DPLL

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
master
Hannes Schmelzer 6 years ago committed by Anatolij Gustschin
parent f3dd87e0b9
commit 3215192922
2 changed files with 8 additions and 0 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Show Stats Download Patch File Download Diff File
  1. 1
      arch/arm/include/asm/arch-am33xx/clock.h
  2. 7
      arch/arm/mach-omap2/am33xx/clock_am33xx.c

1
arch/arm/include/asm/arch-am33xx/clock.h
Unescape View File

@ -104,6 +104,7 @@ extern const struct dpll_regs dpll_mpu_regs;
extern const struct dpll_regs dpll_core_regs;
extern const struct dpll_regs dpll_per_regs;
extern const struct dpll_regs dpll_ddr_regs;
extern const struct dpll_regs dpll_disp_regs;
extern const struct dpll_params dpll_mpu_opp[NUM_CRYSTAL_FREQ][NUM_OPPS];
extern const struct dpll_params dpll_core_1000MHz[NUM_CRYSTAL_FREQ];
extern const struct dpll_params dpll_per_192MHz[NUM_CRYSTAL_FREQ];

7
arch/arm/mach-omap2/am33xx/clock_am33xx.c
Unescape View File

@ -52,6 +52,13 @@ const struct dpll_regs dpll_ddr_regs = {
.cm_div_m2_dpll = CM_WKUP + 0xA0,
};
const struct dpll_regs dpll_disp_regs = {
.cm_clkmode_dpll = CM_WKUP + 0x98,
.cm_idlest_dpll = CM_WKUP + 0x48,
.cm_clksel_dpll = CM_WKUP + 0x54,
.cm_div_m2_dpll = CM_WKUP + 0xA4,
};
struct dpll_params dpll_mpu_opp100 = {
CONFIG_SYS_MPUCLK, OSC-1, 1, -1, -1, -1, -1};
const struct dpll_params dpll_core_opp100 = {

Write Preview
Loading…
Cancel
Save