This driver allows I/O operations on the Samsung S2MPS11 PMIC, which provides lots of LDO/BUCK outputs. To enable it, update defconfig with: - CONFIG_PMIC_S2MPS11 and additional, if were not defined: - CONFIG_CMD_PMIC - CONFIG_ERRNO_STR The binding info: doc/device-tree-bindings/pmic/s2mps11.txt Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>master
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SAMSUNG, S2MPS11 PMIC |
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This file describes the binding info for the PMIC driver: |
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- drivers/power/pmic/s2mps11.c |
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Required properties: |
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- compatible: "samsung,s2mps11-pmic" |
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- reg = 0x66 |
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With those two properties, the pmic device can be used for read/write only. |
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Example: |
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s2mps11@66 { |
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compatible = "samsung,s2mps11-pmic"; |
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reg = <0x66>; |
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}; |
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/*
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* Copyright (C) 2015 Samsung Electronics |
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* Przemyslaw Marczak <p.marczak@samsung.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <fdtdec.h> |
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#include <errno.h> |
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#include <dm.h> |
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#include <i2c.h> |
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#include <power/pmic.h> |
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#include <power/s2mps11.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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static int s2mps11_reg_count(struct udevice *dev) |
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{ |
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return S2MPS11_REG_COUNT; |
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} |
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static int s2mps11_write(struct udevice *dev, uint reg, const uint8_t *buff, |
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int len) |
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{ |
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int ret; |
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ret = dm_i2c_write(dev, reg, buff, len); |
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if (ret) |
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error("write error to device: %p register: %#x!", dev, reg); |
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return ret; |
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} |
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static int s2mps11_read(struct udevice *dev, uint reg, uint8_t *buff, int len) |
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{ |
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int ret; |
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ret = dm_i2c_read(dev, reg, buff, len); |
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if (ret) |
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error("read error from device: %p register: %#x!", dev, reg); |
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return ret; |
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} |
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static struct dm_pmic_ops s2mps11_ops = { |
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.reg_count = s2mps11_reg_count, |
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.read = s2mps11_read, |
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.write = s2mps11_write, |
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}; |
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static const struct udevice_id s2mps11_ids[] = { |
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{ .compatible = "samsung,s2mps11-pmic" }, |
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{ } |
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}; |
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U_BOOT_DRIVER(pmic_s2mps11) = { |
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.name = "s2mps11_pmic", |
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.id = UCLASS_PMIC, |
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.of_match = s2mps11_ids, |
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.ops = &s2mps11_ops, |
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}; |
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#ifndef __S2MPS11__H__ |
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#define __S2MPS11__H__ |
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enum s2mps11_reg { |
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S2MPS11_REG_ID = 0, |
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S2MPS11_REG_INT1, |
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S2MPS11_REG_INT2, |
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S2MPS11_REG_INT3, |
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S2MPS11_REG_INT1M, |
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S2MPS11_REG_INT2M, |
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S2MPS11_REG_INT3M, |
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S2MPS11_REG_STATUS1, |
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S2MPS11_REG_STATUS2, |
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S2MPS11_REG_OFFSRC, |
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S2MPS11_REG_PWRONSRC, |
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S2MPS11_REG_RTC_CTRL, |
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S2MPS11_REG_CTRL1, |
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S2MPS11_REG_ETC_TEST, |
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S2MPS11_REG_RSVD3, |
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S2MPS11_REG_BU_CHG, |
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S2MPS11_REG_RAMP, |
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S2MPS11_REG_RAMP_BUCK, |
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S2MPS11_REG_LDO1_8, |
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S2MPS11_REG_LDO9_16, |
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S2MPS11_REG_LDO17_24, |
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S2MPS11_REG_LDO25_32, |
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S2MPS11_REG_LDO33_38, |
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S2MPS11_REG_LDO1_8_OVC, |
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S2MPS11_REG_LDO9_16_OVC, |
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S2MPS11_REG_LDO17_24_OVC, |
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S2MPS11_REG_LDO25_32_OVC, |
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S2MPS11_REG_LDO33_38_OVC, |
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S2MPS11_REG_RESERVED1, |
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S2MPS11_REG_RESERVED2, |
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S2MPS11_REG_RESERVED3, |
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S2MPS11_REG_RESERVED4, |
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S2MPS11_REG_RESERVED5, |
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S2MPS11_REG_RESERVED6, |
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S2MPS11_REG_RESERVED7, |
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S2MPS11_REG_RESERVED8, |
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S2MPS11_REG_WDRSTEN_CTRL, |
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S2MPS11_REG_B1CTRL1, |
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S2MPS11_REG_B1CTRL2, |
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S2MPS11_REG_B2CTRL1, |
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S2MPS11_REG_B2CTRL2, |
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S2MPS11_REG_B3CTRL1, |
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S2MPS11_REG_B3CTRL2, |
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S2MPS11_REG_B4CTRL1, |
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S2MPS11_REG_B4CTRL2, |
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S2MPS11_REG_B5CTRL1, |
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S2MPS11_REG_BUCK5_SW, |
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S2MPS11_REG_B5CTRL2, |
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S2MPS11_REG_B5CTRL3, |
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S2MPS11_REG_B5CTRL4, |
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S2MPS11_REG_B5CTRL5, |
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S2MPS11_REG_B6CTRL1, |
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S2MPS11_REG_B6CTRL2, |
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S2MPS11_REG_B7CTRL1, |
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S2MPS11_REG_B7CTRL2, |
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S2MPS11_REG_B8CTRL1, |
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S2MPS11_REG_B8CTRL2, |
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S2MPS11_REG_B9CTRL1, |
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S2MPS11_REG_B9CTRL2, |
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S2MPS11_REG_B10CTRL1, |
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S2MPS11_REG_B10CTRL2, |
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S2MPS11_REG_L1CTRL, |
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S2MPS11_REG_L2CTRL, |
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S2MPS11_REG_L3CTRL, |
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S2MPS11_REG_L4CTRL, |
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S2MPS11_REG_L5CTRL, |
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S2MPS11_REG_L6CTRL, |
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S2MPS11_REG_L7CTRL, |
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S2MPS11_REG_L8CTRL, |
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S2MPS11_REG_L9CTRL, |
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S2MPS11_REG_L10CTRL, |
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S2MPS11_REG_L11CTRL, |
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S2MPS11_REG_L12CTRL, |
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S2MPS11_REG_L13CTRL, |
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S2MPS11_REG_L14CTRL, |
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S2MPS11_REG_L15CTRL, |
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S2MPS11_REG_L16CTRL, |
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S2MPS11_REG_L17CTRL, |
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S2MPS11_REG_L18CTRL, |
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S2MPS11_REG_L19CTRL, |
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S2MPS11_REG_L20CTRL, |
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S2MPS11_REG_L21CTRL, |
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S2MPS11_REG_L22CTRL, |
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S2MPS11_REG_L23CTRL, |
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S2MPS11_REG_L24CTRL, |
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S2MPS11_REG_L25CTRL, |
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S2MPS11_REG_L26CTRL, |
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S2MPS11_REG_L27CTRL, |
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S2MPS11_REG_L28CTRL, |
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S2MPS11_REG_L29CTRL, |
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S2MPS11_REG_L30CTRL, |
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S2MPS11_REG_L31CTRL, |
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S2MPS11_REG_L32CTRL, |
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S2MPS11_REG_L33CTRL, |
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S2MPS11_REG_L34CTRL, |
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S2MPS11_REG_L35CTRL, |
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S2MPS11_REG_L36CTRL, |
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S2MPS11_REG_L37CTRL, |
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S2MPS11_REG_L38CTRL, |
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S2MPS11_REG_COUNT, |
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}; |
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#define S2MPS11_LDO26_ENABLE 0xec |
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#endif |
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