Backend driver for MUSB OTG controllers found on TI AM33xx and TI81xx SoCs (tested with AM33xx only). Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>master
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/*
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* Board data structure for musb gadget on OMAPs |
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* |
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* Copyright (C) 2012, Ilya Yanok <ilya.yanok@gmail.com> |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the |
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* GNU General Public License for more details. |
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*/ |
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#ifndef __ASM_ARM_OMAP_MUSB_H |
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#define __ASM_ARM_OMAP_MUSB_H |
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extern struct musb_platform_ops musb_dsps_ops; |
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struct omap_musb_board_data { |
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void (*set_phy_power)(u8 on); |
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}; |
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#endif /* __ASM_ARM_OMAP_MUSB_H */ |
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/*
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* Texas Instruments DSPS platforms "glue layer" |
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* |
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* Copyright (C) 2012, by Texas Instruments |
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* |
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* Based on the am35x "glue layer" code. |
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* |
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* This file is part of the Inventra Controller Driver for Linux. |
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* |
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* The Inventra Controller Driver for Linux is free software; you |
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* can redistribute it and/or modify it under the terms of the GNU |
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* General Public License version 2 as published by the Free Software |
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* Foundation. |
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* |
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* The Inventra Controller Driver for Linux is distributed in |
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* the hope that it will be useful, but WITHOUT ANY WARRANTY; |
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* without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
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* License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with The Inventra Controller Driver for Linux ; if not, |
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* write to the Free Software Foundation, Inc., 59 Temple Place, |
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* Suite 330, Boston, MA 02111-1307 USA |
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* |
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* musb_dsps.c will be a common file for all the TI DSPS platforms |
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* such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. |
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* For now only ti81x is using this and in future davinci.c, am35x.c |
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* da8xx.c would be merged to this file after testing. |
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*/ |
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#define __UBOOT__ |
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#ifndef __UBOOT__ |
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#include <linux/init.h> |
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#include <linux/io.h> |
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#include <linux/err.h> |
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#include <linux/platform_device.h> |
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#include <linux/dma-mapping.h> |
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#include <linux/pm_runtime.h> |
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#include <linux/module.h> |
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#include <linux/of.h> |
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#include <linux/of_device.h> |
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#include <linux/of_address.h> |
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#include <plat/usb.h> |
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#else |
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#include <common.h> |
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#include <asm/omap_musb.h> |
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#include "linux-compat.h" |
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#endif |
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#include "musb_core.h" |
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/**
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* avoid using musb_readx()/musb_writex() as glue layer should not be |
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* dependent on musb core layer symbols. |
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*/ |
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static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) |
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{ return __raw_readb(addr + offset); } |
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static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) |
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{ return __raw_readl(addr + offset); } |
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static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) |
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{ __raw_writeb(data, addr + offset); } |
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static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) |
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{ __raw_writel(data, addr + offset); } |
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/**
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* DSPS musb wrapper register offset. |
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* FIXME: This should be expanded to have all the wrapper registers from TI DSPS |
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* musb ips. |
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*/ |
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struct dsps_musb_wrapper { |
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u16 revision; |
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u16 control; |
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u16 status; |
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u16 eoi; |
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u16 epintr_set; |
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u16 epintr_clear; |
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u16 epintr_status; |
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u16 coreintr_set; |
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u16 coreintr_clear; |
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u16 coreintr_status; |
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u16 phy_utmi; |
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u16 mode; |
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/* bit positions for control */ |
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unsigned reset:5; |
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/* bit positions for interrupt */ |
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unsigned usb_shift:5; |
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u32 usb_mask; |
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u32 usb_bitmap; |
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unsigned drvvbus:5; |
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unsigned txep_shift:5; |
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u32 txep_mask; |
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u32 txep_bitmap; |
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unsigned rxep_shift:5; |
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u32 rxep_mask; |
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u32 rxep_bitmap; |
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/* bit positions for phy_utmi */ |
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unsigned otg_disable:5; |
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/* bit positions for mode */ |
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unsigned iddig:5; |
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/* miscellaneous stuff */ |
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u32 musb_core_offset; |
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u8 poll_seconds; |
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}; |
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static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = { |
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.revision = 0x00, |
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.control = 0x14, |
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.status = 0x18, |
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.eoi = 0x24, |
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.epintr_set = 0x38, |
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.epintr_clear = 0x40, |
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.epintr_status = 0x30, |
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.coreintr_set = 0x3c, |
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.coreintr_clear = 0x44, |
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.coreintr_status = 0x34, |
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.phy_utmi = 0xe0, |
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.mode = 0xe8, |
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.reset = 0, |
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.otg_disable = 21, |
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.iddig = 8, |
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.usb_shift = 0, |
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.usb_mask = 0x1ff, |
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.usb_bitmap = (0x1ff << 0), |
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.drvvbus = 8, |
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.txep_shift = 0, |
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.txep_mask = 0xffff, |
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.txep_bitmap = (0xffff << 0), |
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.rxep_shift = 16, |
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.rxep_mask = 0xfffe, |
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.rxep_bitmap = (0xfffe << 16), |
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.musb_core_offset = 0x400, |
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.poll_seconds = 2, |
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}; |
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/**
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* DSPS glue structure. |
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*/ |
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struct dsps_glue { |
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struct device *dev; |
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struct platform_device *musb; /* child musb pdev */ |
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const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ |
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struct timer_list timer; /* otg_workaround timer */ |
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}; |
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/**
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* dsps_musb_enable - enable interrupts |
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*/ |
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static void dsps_musb_enable(struct musb *musb) |
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{ |
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#ifndef __UBOOT__ |
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struct device *dev = musb->controller; |
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struct platform_device *pdev = to_platform_device(dev->parent); |
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struct dsps_glue *glue = platform_get_drvdata(pdev); |
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const struct dsps_musb_wrapper *wrp = glue->wrp; |
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#else |
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const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data; |
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#endif |
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void __iomem *reg_base = musb->ctrl_base; |
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u32 epmask, coremask; |
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/* Workaround: setup IRQs through both register sets. */ |
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epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | |
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((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); |
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coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); |
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dsps_writel(reg_base, wrp->epintr_set, epmask); |
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dsps_writel(reg_base, wrp->coreintr_set, coremask); |
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/* Force the DRVVBUS IRQ so we can start polling for ID change. */ |
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#ifndef __UBOOT__ |
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if (is_otg_enabled(musb)) |
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dsps_writel(reg_base, wrp->coreintr_set, |
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(1 << wrp->drvvbus) << wrp->usb_shift); |
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#endif |
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} |
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/**
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* dsps_musb_disable - disable HDRC and flush interrupts |
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*/ |
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static void dsps_musb_disable(struct musb *musb) |
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{ |
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#ifndef __UBOOT__ |
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struct device *dev = musb->controller; |
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struct platform_device *pdev = to_platform_device(dev->parent); |
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struct dsps_glue *glue = platform_get_drvdata(pdev); |
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const struct dsps_musb_wrapper *wrp = glue->wrp; |
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void __iomem *reg_base = musb->ctrl_base; |
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dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); |
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dsps_writel(reg_base, wrp->epintr_clear, |
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wrp->txep_bitmap | wrp->rxep_bitmap); |
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dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); |
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dsps_writel(reg_base, wrp->eoi, 0); |
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#endif |
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} |
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#ifndef __UBOOT__ |
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static void otg_timer(unsigned long _musb) |
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{ |
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struct musb *musb = (void *)_musb; |
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void __iomem *mregs = musb->mregs; |
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struct device *dev = musb->controller; |
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struct platform_device *pdev = to_platform_device(dev->parent); |
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struct dsps_glue *glue = platform_get_drvdata(pdev); |
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const struct dsps_musb_wrapper *wrp = glue->wrp; |
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u8 devctl; |
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unsigned long flags; |
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/*
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* We poll because DSPS IP's won't expose several OTG-critical |
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* status change events (from the transceiver) otherwise. |
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*/ |
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devctl = dsps_readb(mregs, MUSB_DEVCTL); |
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dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, |
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otg_state_string(musb->xceiv->state)); |
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spin_lock_irqsave(&musb->lock, flags); |
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switch (musb->xceiv->state) { |
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case OTG_STATE_A_WAIT_BCON: |
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devctl &= ~MUSB_DEVCTL_SESSION; |
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dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl); |
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devctl = dsps_readb(musb->mregs, MUSB_DEVCTL); |
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if (devctl & MUSB_DEVCTL_BDEVICE) { |
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musb->xceiv->state = OTG_STATE_B_IDLE; |
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MUSB_DEV_MODE(musb); |
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} else { |
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musb->xceiv->state = OTG_STATE_A_IDLE; |
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MUSB_HST_MODE(musb); |
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} |
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break; |
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case OTG_STATE_A_WAIT_VFALL: |
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musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; |
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dsps_writel(musb->ctrl_base, wrp->coreintr_set, |
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MUSB_INTR_VBUSERROR << wrp->usb_shift); |
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break; |
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case OTG_STATE_B_IDLE: |
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if (!is_peripheral_enabled(musb)) |
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break; |
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devctl = dsps_readb(mregs, MUSB_DEVCTL); |
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if (devctl & MUSB_DEVCTL_BDEVICE) |
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mod_timer(&glue->timer, |
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jiffies + wrp->poll_seconds * HZ); |
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else |
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musb->xceiv->state = OTG_STATE_A_IDLE; |
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break; |
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default: |
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break; |
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} |
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spin_unlock_irqrestore(&musb->lock, flags); |
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} |
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static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) |
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{ |
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struct device *dev = musb->controller; |
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struct platform_device *pdev = to_platform_device(dev->parent); |
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struct dsps_glue *glue = platform_get_drvdata(pdev); |
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static unsigned long last_timer; |
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if (!is_otg_enabled(musb)) |
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return; |
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if (timeout == 0) |
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timeout = jiffies + msecs_to_jiffies(3); |
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/* Never idle if active, or when VBUS timeout is not set as host */ |
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if (musb->is_active || (musb->a_wait_bcon == 0 && |
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musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { |
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dev_dbg(musb->controller, "%s active, deleting timer\n", |
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otg_state_string(musb->xceiv->state)); |
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del_timer(&glue->timer); |
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last_timer = jiffies; |
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return; |
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} |
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if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) { |
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dev_dbg(musb->controller, |
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"Longer idle timer already pending, ignoring...\n"); |
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return; |
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} |
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last_timer = timeout; |
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dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", |
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otg_state_string(musb->xceiv->state), |
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jiffies_to_msecs(timeout - jiffies)); |
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mod_timer(&glue->timer, timeout); |
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} |
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#endif |
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static irqreturn_t dsps_interrupt(int irq, void *hci) |
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{ |
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struct musb *musb = hci; |
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void __iomem *reg_base = musb->ctrl_base; |
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#ifndef __UBOOT__ |
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struct device *dev = musb->controller; |
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struct platform_device *pdev = to_platform_device(dev->parent); |
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struct dsps_glue *glue = platform_get_drvdata(pdev); |
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const struct dsps_musb_wrapper *wrp = glue->wrp; |
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#else |
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const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data; |
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#endif |
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unsigned long flags; |
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irqreturn_t ret = IRQ_NONE; |
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u32 epintr, usbintr; |
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spin_lock_irqsave(&musb->lock, flags); |
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/* Get endpoint interrupts */ |
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epintr = dsps_readl(reg_base, wrp->epintr_status); |
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musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; |
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musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; |
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if (epintr) |
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dsps_writel(reg_base, wrp->epintr_status, epintr); |
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/* Get usb core interrupts */ |
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usbintr = dsps_readl(reg_base, wrp->coreintr_status); |
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if (!usbintr && !epintr) |
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goto eoi; |
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musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; |
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if (usbintr) |
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dsps_writel(reg_base, wrp->coreintr_status, usbintr); |
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dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", |
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usbintr, epintr); |
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#ifndef __UBOOT__ |
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/*
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* DRVVBUS IRQs are the only proxy we have (a very poor one!) for |
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* DSPS IP's missing ID change IRQ. We need an ID change IRQ to |
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* switch appropriately between halves of the OTG state machine. |
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* Managing DEVCTL.SESSION per Mentor docs requires that we know its |
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* value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. |
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* Also, DRVVBUS pulses for SRP (but not at 5V) ... |
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*/ |
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if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb)) |
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pr_info("CAUTION: musb: Babble Interrupt Occured\n"); |
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if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { |
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int drvvbus = dsps_readl(reg_base, wrp->status); |
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void __iomem *mregs = musb->mregs; |
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u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); |
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int err; |
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err = is_host_enabled(musb) && (musb->int_usb & |
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MUSB_INTR_VBUSERROR); |
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if (err) { |
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/*
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* The Mentor core doesn't debounce VBUS as needed |
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* to cope with device connect current spikes. This |
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* means it's not uncommon for bus-powered devices |
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* to get VBUS errors during enumeration. |
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* |
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* This is a workaround, but newer RTL from Mentor |
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* seems to allow a better one: "re"-starting sessions |
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* without waiting for VBUS to stop registering in |
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* devctl. |
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*/ |
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musb->int_usb &= ~MUSB_INTR_VBUSERROR; |
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musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; |
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mod_timer(&glue->timer, |
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jiffies + wrp->poll_seconds * HZ); |
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WARNING("VBUS error workaround (delay coming)\n"); |
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} else if (is_host_enabled(musb) && drvvbus) { |
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musb->is_active = 1; |
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MUSB_HST_MODE(musb); |
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musb->xceiv->otg->default_a = 1; |
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musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; |
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del_timer(&glue->timer); |
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} else { |
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musb->is_active = 0; |
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MUSB_DEV_MODE(musb); |
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musb->xceiv->otg->default_a = 0; |
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musb->xceiv->state = OTG_STATE_B_IDLE; |
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} |
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/* NOTE: this must complete power-on within 100 ms. */ |
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dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", |
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drvvbus ? "on" : "off", |
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otg_state_string(musb->xceiv->state), |
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err ? " ERROR" : "", |
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devctl); |
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ret = IRQ_HANDLED; |
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} |
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#endif |
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if (musb->int_tx || musb->int_rx || musb->int_usb) |
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ret |= musb_interrupt(musb); |
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eoi: |
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/* EOI needs to be written for the IRQ to be re-asserted. */ |
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if (ret == IRQ_HANDLED || epintr || usbintr) |
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dsps_writel(reg_base, wrp->eoi, 1); |
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#ifndef __UBOOT__ |
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/* Poll for ID change */ |
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if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE) |
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mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); |
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#endif |
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spin_unlock_irqrestore(&musb->lock, flags); |
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return ret; |
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} |
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static int dsps_musb_init(struct musb *musb) |
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{ |
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#ifndef __UBOOT__ |
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struct device *dev = musb->controller; |
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struct musb_hdrc_platform_data *plat = dev->platform_data; |
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struct platform_device *pdev = to_platform_device(dev->parent); |
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struct dsps_glue *glue = platform_get_drvdata(pdev); |
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const struct dsps_musb_wrapper *wrp = glue->wrp; |
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struct omap_musb_board_data *data = plat->board_data; |
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#else |
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struct omap_musb_board_data *data = |
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(struct omap_musb_board_data *)musb->controller; |
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const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data; |
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#endif |
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void __iomem *reg_base = musb->ctrl_base; |
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u32 rev, val; |
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int status; |
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/* mentor core register starts at offset of 0x400 from musb base */ |
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musb->mregs += wrp->musb_core_offset; |
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#ifndef __UBOOT__ |
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/* NOP driver needs change if supporting dual instance */ |
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usb_nop_xceiv_register(); |
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musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); |
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if (IS_ERR_OR_NULL(musb->xceiv)) |
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return -ENODEV; |
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#endif |
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/* Returns zero if e.g. not clocked */ |
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rev = dsps_readl(reg_base, wrp->revision); |
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if (!rev) { |
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status = -ENODEV; |
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goto err0; |
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} |
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#ifndef __UBOOT__ |
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if (is_host_enabled(musb)) |
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setup_timer(&glue->timer, otg_timer, (unsigned long) musb); |
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#endif |
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/* Reset the musb */ |
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dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); |
||||
|
||||
/* Start the on-chip PHY and its PLL. */ |
||||
if (data->set_phy_power) |
||||
data->set_phy_power(1); |
||||
|
||||
musb->isr = dsps_interrupt; |
||||
|
||||
/* reset the otgdisable bit, needed for host mode to work */ |
||||
val = dsps_readl(reg_base, wrp->phy_utmi); |
||||
val &= ~(1 << wrp->otg_disable); |
||||
dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); |
||||
|
||||
/* clear level interrupt */ |
||||
dsps_writel(reg_base, wrp->eoi, 0); |
||||
|
||||
return 0; |
||||
err0: |
||||
#ifndef __UBOOT__ |
||||
usb_put_phy(musb->xceiv); |
||||
usb_nop_xceiv_unregister(); |
||||
#endif |
||||
return status; |
||||
} |
||||
|
||||
static int dsps_musb_exit(struct musb *musb) |
||||
{ |
||||
#ifndef __UBOOT__ |
||||
struct device *dev = musb->controller; |
||||
struct musb_hdrc_platform_data *plat = dev->platform_data; |
||||
struct omap_musb_board_data *data = plat->board_data; |
||||
struct platform_device *pdev = to_platform_device(dev->parent); |
||||
struct dsps_glue *glue = platform_get_drvdata(pdev); |
||||
#else |
||||
struct omap_musb_board_data *data = |
||||
(struct omap_musb_board_data *)musb->controller; |
||||
#endif |
||||
|
||||
#ifndef __UBOOT__ |
||||
if (is_host_enabled(musb)) |
||||
del_timer_sync(&glue->timer); |
||||
#endif |
||||
|
||||
/* Shutdown the on-chip PHY and its PLL. */ |
||||
if (data->set_phy_power) |
||||
data->set_phy_power(0); |
||||
|
||||
#ifndef __UBOOT__ |
||||
/* NOP driver needs change if supporting dual instance */ |
||||
usb_put_phy(musb->xceiv); |
||||
usb_nop_xceiv_unregister(); |
||||
#endif |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
#ifndef __UBOOT__ |
||||
static struct musb_platform_ops dsps_ops = { |
||||
#else |
||||
struct musb_platform_ops musb_dsps_ops = { |
||||
#endif |
||||
.init = dsps_musb_init, |
||||
.exit = dsps_musb_exit, |
||||
|
||||
.enable = dsps_musb_enable, |
||||
.disable = dsps_musb_disable, |
||||
|
||||
#ifndef __UBOOT__ |
||||
.try_idle = dsps_musb_try_idle, |
||||
#endif |
||||
}; |
||||
|
||||
#ifndef __UBOOT__ |
||||
static u64 musb_dmamask = DMA_BIT_MASK(32); |
||||
#endif |
||||
|
||||
#ifndef __UBOOT__ |
||||
static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id) |
||||
{ |
||||
struct device *dev = glue->dev; |
||||
struct platform_device *pdev = to_platform_device(dev); |
||||
struct musb_hdrc_platform_data *pdata = dev->platform_data; |
||||
struct platform_device *musb; |
||||
struct resource *res; |
||||
struct resource resources[2]; |
||||
char res_name[10]; |
||||
int ret; |
||||
|
||||
/* get memory resource */ |
||||
sprintf(res_name, "musb%d", id); |
||||
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name); |
||||
if (!res) { |
||||
dev_err(dev, "%s get mem resource failed\n", res_name); |
||||
ret = -ENODEV; |
||||
goto err0; |
||||
} |
||||
res->parent = NULL; |
||||
resources[0] = *res; |
||||
|
||||
/* get irq resource */ |
||||
sprintf(res_name, "musb%d-irq", id); |
||||
res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name); |
||||
if (!res) { |
||||
dev_err(dev, "%s get irq resource failed\n", res_name); |
||||
ret = -ENODEV; |
||||
goto err0; |
||||
} |
||||
res->parent = NULL; |
||||
resources[1] = *res; |
||||
resources[1].name = "mc"; |
||||
|
||||
/* allocate the child platform device */ |
||||
musb = platform_device_alloc("musb-hdrc", -1); |
||||
if (!musb) { |
||||
dev_err(dev, "failed to allocate musb device\n"); |
||||
ret = -ENOMEM; |
||||
goto err0; |
||||
} |
||||
|
||||
musb->dev.parent = dev; |
||||
musb->dev.dma_mask = &musb_dmamask; |
||||
musb->dev.coherent_dma_mask = musb_dmamask; |
||||
|
||||
glue->musb = musb; |
||||
|
||||
pdata->platform_ops = &dsps_ops; |
||||
|
||||
ret = platform_device_add_resources(musb, resources, 2); |
||||
if (ret) { |
||||
dev_err(dev, "failed to add resources\n"); |
||||
goto err1; |
||||
} |
||||
|
||||
ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); |
||||
if (ret) { |
||||
dev_err(dev, "failed to add platform_data\n"); |
||||
goto err1; |
||||
} |
||||
|
||||
ret = platform_device_add(musb); |
||||
if (ret) { |
||||
dev_err(dev, "failed to register musb device\n"); |
||||
goto err1; |
||||
} |
||||
|
||||
return 0; |
||||
|
||||
err1: |
||||
platform_device_put(musb); |
||||
err0: |
||||
return ret; |
||||
} |
||||
|
||||
static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue) |
||||
{ |
||||
platform_device_del(glue->musb); |
||||
platform_device_put(glue->musb); |
||||
} |
||||
|
||||
static int __devinit dsps_probe(struct platform_device *pdev) |
||||
{ |
||||
const struct platform_device_id *id = platform_get_device_id(pdev); |
||||
const struct dsps_musb_wrapper *wrp = |
||||
(struct dsps_musb_wrapper *)id->driver_data; |
||||
struct dsps_glue *glue; |
||||
struct resource *iomem; |
||||
int ret; |
||||
|
||||
/* allocate glue */ |
||||
glue = kzalloc(sizeof(*glue), GFP_KERNEL); |
||||
if (!glue) { |
||||
dev_err(&pdev->dev, "unable to allocate glue memory\n"); |
||||
ret = -ENOMEM; |
||||
goto err0; |
||||
} |
||||
|
||||
/* get memory resource */ |
||||
iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
||||
if (!iomem) { |
||||
dev_err(&pdev->dev, "failed to get usbss mem resourse\n"); |
||||
ret = -ENODEV; |
||||
goto err1; |
||||
} |
||||
|
||||
glue->dev = &pdev->dev; |
||||
|
||||
glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL); |
||||
if (!glue->wrp) { |
||||
dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n"); |
||||
ret = -ENOMEM; |
||||
goto err1; |
||||
} |
||||
platform_set_drvdata(pdev, glue); |
||||
|
||||
/* enable the usbss clocks */ |
||||
pm_runtime_enable(&pdev->dev); |
||||
|
||||
ret = pm_runtime_get_sync(&pdev->dev); |
||||
if (ret < 0) { |
||||
dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); |
||||
goto err2; |
||||
} |
||||
|
||||
/* create the child platform device for first instances of musb */ |
||||
ret = dsps_create_musb_pdev(glue, 0); |
||||
if (ret != 0) { |
||||
dev_err(&pdev->dev, "failed to create child pdev\n"); |
||||
goto err3; |
||||
} |
||||
|
||||
return 0; |
||||
|
||||
err3: |
||||
pm_runtime_put(&pdev->dev); |
||||
err2: |
||||
pm_runtime_disable(&pdev->dev); |
||||
kfree(glue->wrp); |
||||
err1: |
||||
kfree(glue); |
||||
err0: |
||||
return ret; |
||||
} |
||||
static int __devexit dsps_remove(struct platform_device *pdev) |
||||
{ |
||||
struct dsps_glue *glue = platform_get_drvdata(pdev); |
||||
|
||||
/* delete the child platform device */ |
||||
dsps_delete_musb_pdev(glue); |
||||
|
||||
/* disable usbss clocks */ |
||||
pm_runtime_put(&pdev->dev); |
||||
pm_runtime_disable(&pdev->dev); |
||||
kfree(glue->wrp); |
||||
kfree(glue); |
||||
return 0; |
||||
} |
||||
|
||||
#ifdef CONFIG_PM_SLEEP |
||||
static int dsps_suspend(struct device *dev) |
||||
{ |
||||
struct musb_hdrc_platform_data *plat = dev->platform_data; |
||||
struct omap_musb_board_data *data = plat->board_data; |
||||
|
||||
/* Shutdown the on-chip PHY and its PLL. */ |
||||
if (data->set_phy_power) |
||||
data->set_phy_power(0); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static int dsps_resume(struct device *dev) |
||||
{ |
||||
struct musb_hdrc_platform_data *plat = dev->platform_data; |
||||
struct omap_musb_board_data *data = plat->board_data; |
||||
|
||||
/* Start the on-chip PHY and its PLL. */ |
||||
if (data->set_phy_power) |
||||
data->set_phy_power(1); |
||||
|
||||
return 0; |
||||
} |
||||
#endif |
||||
|
||||
static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); |
||||
#endif |
||||
|
||||
#ifndef __UBOOT__ |
||||
static const struct platform_device_id musb_dsps_id_table[] __devinitconst = { |
||||
{ |
||||
.name = "musb-ti81xx", |
||||
.driver_data = (kernel_ulong_t) &ti81xx_driver_data, |
||||
}, |
||||
{ }, /* Terminating Entry */ |
||||
}; |
||||
MODULE_DEVICE_TABLE(platform, musb_dsps_id_table); |
||||
|
||||
static const struct of_device_id musb_dsps_of_match[] __devinitconst = { |
||||
{ .compatible = "musb-ti81xx", }, |
||||
{ .compatible = "ti,ti81xx-musb", }, |
||||
{ .compatible = "ti,am335x-musb", }, |
||||
{ }, |
||||
}; |
||||
MODULE_DEVICE_TABLE(of, musb_dsps_of_match); |
||||
|
||||
static struct platform_driver dsps_usbss_driver = { |
||||
.probe = dsps_probe, |
||||
.remove = __devexit_p(dsps_remove), |
||||
.driver = { |
||||
.name = "musb-dsps", |
||||
.pm = &dsps_pm_ops, |
||||
.of_match_table = musb_dsps_of_match, |
||||
}, |
||||
.id_table = musb_dsps_id_table, |
||||
}; |
||||
|
||||
MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); |
||||
MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); |
||||
MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); |
||||
MODULE_LICENSE("GPL v2"); |
||||
|
||||
static int __init dsps_init(void) |
||||
{ |
||||
return platform_driver_register(&dsps_usbss_driver); |
||||
} |
||||
subsys_initcall(dsps_init); |
||||
|
||||
static void __exit dsps_exit(void) |
||||
{ |
||||
platform_driver_unregister(&dsps_usbss_driver); |
||||
} |
||||
module_exit(dsps_exit); |
||||
#endif |
Loading…
Reference in new issue