Support the new AD7160 eval board. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>master
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#
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# U-boot - Makefile
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#
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# Copyright (c) 2005-2008 Analog Device Inc.
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).a
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COBJS-y := $(BOARD).o
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SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS-y))
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SOBJS := $(addprefix $(obj),$(SOBJS-y))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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/*
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* U-boot - main board file |
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* |
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* Copyright (c) 2010 Analog Devices Inc. |
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* |
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* Licensed under the GPL-2 or later. |
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*/ |
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#include <common.h> |
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#include <asm/blackfin.h> |
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#include <asm/mach-common/bits/pll.h> |
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int checkboard(void) |
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{ |
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printf("Board: ADI BF527 AD7160-EVAL board\n"); |
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printf(" Support: http://blackfin.uclinux.org/\n"); |
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return 0; |
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} |
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int misc_init_r(void) |
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{ |
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/* CLKIN Buffer Output Enable */ |
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*pVR_CTL |= CLKBUFOE; |
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return 0; |
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} |
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#
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# Copyright (c) 2005-2008 Analog Device Inc.
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#
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# (C) Copyright 2001
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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# This is not actually used for Blackfin boards so do not change it
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#TEXT_BASE = do-not-use-me
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CFLAGS_lib_generic += -O2
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CFLAGS_lzma += -O2
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# Set some default LDR flags based on boot mode.
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LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
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/*
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* U-boot - Configuration file for BF527 AD7160-EVAL board |
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*/ |
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#ifndef __CONFIG_BF527_AD7160_EVAL_H__ |
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#define __CONFIG_BF527_AD7160_EVAL_H__ |
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#include <asm/config-pre.h> |
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/*
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* Processor Settings |
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*/ |
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#define CONFIG_BFIN_CPU bf527-0.2 |
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#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER |
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/*
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* Clock Settings |
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* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV |
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* SCLK = (CLKIN * VCO_MULT) / SCLK_DIV |
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*/ |
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/* CONFIG_CLKIN_HZ is any value in Hz */ |
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#define CONFIG_CLKIN_HZ 24000000 |
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/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ |
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/* 1 = CLKIN / 2 */ |
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#define CONFIG_CLKIN_HALF 0 |
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/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ |
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/* 1 = bypass PLL */ |
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#define CONFIG_PLL_BYPASS 0 |
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/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ |
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/* Values can range from 0-63 (where 0 means 64) */ |
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#define CONFIG_VCO_MULT 25 |
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/* CCLK_DIV controls the core clock divider */ |
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/* Values can be 1, 2, 4, or 8 ONLY */ |
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#define CONFIG_CCLK_DIV 1 |
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/* SCLK_DIV controls the system clock divider */ |
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/* Values can range from 1-15 */ |
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#define CONFIG_SCLK_DIV 5 |
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/*
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* Memory Settings |
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*/ |
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#define CONFIG_MEM_ADD_WDTH 10 |
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#define CONFIG_MEM_SIZE 64 |
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#define CONFIG_EBIU_SDRRC_VAL 0x03F6 |
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#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | CL_3 | PASR_ALL | TRAS_6 | TRP_3 | TRCD_3 | TWR_2 | PSS) |
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#define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL) |
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#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_15 | B1RAT_15 | B1HT_3 | B1RDYPOL | B0WAT_15 | B0RAT_15 | B0HT_3 | B0RDYPOL) |
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#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_15 | B3RAT_15 | B3HT_3 | B3RDYPOL | B2WAT_15 | B2RAT_15 | B2HT_3 | B2RDYPOL) |
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#define CONFIG_SYS_MONITOR_LEN (768 * 1024) |
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#define CONFIG_SYS_MALLOC_LEN (640 * 1024) |
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/*
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* NAND Settings |
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* (can't be used same time as ethernet) |
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*/ |
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#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) |
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# define CONFIG_BFIN_NFC |
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# define CONFIG_BFIN_NFC_BOOTROM_ECC |
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#endif |
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#ifdef CONFIG_BFIN_NFC |
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#define CONFIG_BFIN_NFC_CTL_VAL 0x0033 |
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#define CONFIG_DRIVER_NAND_BFIN |
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#define CONFIG_SYS_NAND_BASE 0 /* not actually used */ |
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 |
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#define NAND_MAX_CHIPS 1 |
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#endif |
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/*
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* Flash Settings |
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*/ |
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#define CONFIG_FLASH_CFI_DRIVER |
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#define CONFIG_SYS_FLASH_BASE 0x20000000 |
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#define CONFIG_SYS_FLASH_CFI |
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#define CONFIG_SYS_FLASH_PROTECTION |
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 |
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#define CONFIG_SYS_MAX_FLASH_SECT 259 |
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/*
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* SPI Settings |
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*/ |
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#define CONFIG_BFIN_SPI |
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#define CONFIG_ENV_SPI_MAX_HZ 30000000 |
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#define CONFIG_SF_DEFAULT_SPEED 30000000 |
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#define CONFIG_SPI_FLASH |
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#define CONFIG_SPI_FLASH_STMICRO |
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/*
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* Env Storage Settings |
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*/ |
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#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) |
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#define CONFIG_ENV_IS_IN_SPI_FLASH |
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#define CONFIG_ENV_OFFSET 0x10000 |
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#define CONFIG_ENV_SIZE 0x2000 |
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#define CONFIG_ENV_SECT_SIZE 0x10000 |
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#define CONFIG_ENV_IS_EMBEDDED_IN_LDR |
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#elif (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) |
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#define CONFIG_ENV_IS_IN_NAND |
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#define CONFIG_ENV_OFFSET 0x40000 |
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#define CONFIG_ENV_SIZE 0x20000 |
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#else |
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#define CONFIG_ENV_IS_IN_FLASH |
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#define CONFIG_ENV_OFFSET 0x4000 |
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) |
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#define CONFIG_ENV_SIZE 0x2000 |
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#define CONFIG_ENV_SECT_SIZE 0x2000 |
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#define CONFIG_ENV_IS_EMBEDDED_IN_LDR |
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#endif |
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/*
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* I2C Settings |
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*/ |
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#define CONFIG_BFIN_TWI_I2C 1 |
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#define CONFIG_HARD_I2C 1 |
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/*
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* SPI_MMC Settings |
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*/ |
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#define CONFIG_MMC |
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#define CONFIG_CMD_EXT2 |
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#define CONFIG_SPI_MMC |
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#define CONFIG_SPI_MMC_DEFAULT_CS (7 + GPIO_PH3) |
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/*
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* Misc Settings |
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*/ |
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#define CONFIG_MISC_INIT_R |
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#define CONFIG_UART_CONSOLE 0 |
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/*
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* Pull in common ADI header for remaining command/environment setup |
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*/ |
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#include <configs/bfin_adi_common.h> |
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#endif |
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