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@ -437,12 +437,15 @@ void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic) |
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{ |
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u32 offset_code; |
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u32 offset = volt_mv; |
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#ifndef CONFIG_DRA7XX |
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int ret = 0; |
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#endif |
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if (!volt_mv) |
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return; |
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pmic->pmic_bus_init(); |
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#ifndef CONFIG_DRA7XX |
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/* See if we can first get the GPIO if needed */ |
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if (pmic->gpio_en) |
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ret = gpio_request(pmic->gpio, "PMIC_GPIO"); |
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@ -456,7 +459,7 @@ void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic) |
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/* Pull the GPIO low to select SET0 register, while we program SET1 */ |
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if (pmic->gpio_en) |
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gpio_direction_output(pmic->gpio, 0); |
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#endif |
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/* convert to uV for better accuracy in the calculations */ |
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offset *= 1000; |
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@ -467,9 +470,10 @@ void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic) |
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if (pmic->pmic_write(pmic->i2c_slave_addr, vcore_reg, offset_code)) |
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printf("Scaling voltage failed for 0x%x\n", vcore_reg); |
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#ifndef CONFIG_DRA7XX |
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if (pmic->gpio_en) |
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gpio_direction_output(pmic->gpio, 1); |
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#endif |
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} |
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static u32 optimize_vcore_voltage(struct volts const *v) |
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@ -505,13 +509,79 @@ static u32 optimize_vcore_voltage(struct volts const *v) |
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} |
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/*
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* Setup the voltages for vdd_mpu, vdd_core, and vdd_iva |
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* We set the maximum voltages allowed here because Smart-Reflex is not |
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* enabled in bootloader. Voltage initialization in the kernel will set |
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* these to the nominal values after enabling Smart-Reflex |
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* Setup the voltages for the main SoC core power domains. |
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* We start with the maximum voltages allowed here, as set in the corresponding |
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* vcores_data struct, and then scale (usually down) to the fused values that |
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* are retrieved from the SoC. The scaling happens only if the efuse.reg fields |
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* are initialised. |
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* Rail grouping is supported for the DRA7xx SoCs only, therefore the code is |
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* compiled conditionally. Note that the new code writes the scaled (or zeroed) |
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* values back to the vcores_data struct for eventual reuse. Zero values mean |
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* that the corresponding rails are not controlled separately, and are not sent |
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* to the PMIC. |
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*/ |
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void scale_vcores(struct vcores_data const *vcores) |
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{ |
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#if defined(CONFIG_DRA7XX) |
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int i; |
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struct volts *pv = (struct volts *)vcores; |
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struct volts *px; |
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for (i=0; i<(sizeof(struct vcores_data)/sizeof(struct volts)); i++) { |
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debug("%d -> ", pv->value); |
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if (pv->value) { |
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/* Handle non-empty members only */ |
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pv->value = optimize_vcore_voltage(pv); |
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px = (struct volts *)vcores; |
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while (px < pv) { |
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/*
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* Scan already handled non-empty members to see |
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* if we have a group and find the max voltage, |
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* which is set to the first occurance of the |
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* particular SMPS; the other group voltages are |
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* zeroed. |
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*/ |
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if (px->value) { |
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if ((pv->pmic->i2c_slave_addr == |
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px->pmic->i2c_slave_addr) && |
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(pv->addr == px->addr)) { |
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/* Same PMIC, same SMPS */ |
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if (pv->value > px->value) |
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px->value = pv->value; |
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pv->value = 0; |
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} |
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} |
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px++; |
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} |
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} |
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debug("%d\n", pv->value); |
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pv++; |
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} |
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debug("cor: %d\n", vcores->core.value); |
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do_scale_vcore(vcores->core.addr, vcores->core.value, vcores->core.pmic); |
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debug("mpu: %d\n", vcores->mpu.value); |
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do_scale_vcore(vcores->mpu.addr, vcores->mpu.value, vcores->mpu.pmic); |
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/* Configure MPU ABB LDO after scale */ |
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abb_setup((*ctrl)->control_std_fuse_opp_vdd_mpu_2, |
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(*ctrl)->control_wkup_ldovbb_mpu_voltage_ctrl, |
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(*prcm)->prm_abbldo_mpu_setup, |
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(*prcm)->prm_abbldo_mpu_ctrl, |
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(*prcm)->prm_irqstatus_mpu_2, |
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OMAP_ABB_MPU_TXDONE_MASK, |
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OMAP_ABB_FAST_OPP); |
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/* The .mm member is not used for the DRA7xx */ |
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debug("gpu: %d\n", vcores->gpu.value); |
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do_scale_vcore(vcores->gpu.addr, vcores->gpu.value, vcores->gpu.pmic); |
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debug("eve: %d\n", vcores->eve.value); |
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do_scale_vcore(vcores->eve.addr, vcores->eve.value, vcores->eve.pmic); |
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debug("iva: %d\n", vcores->iva.value); |
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do_scale_vcore(vcores->iva.addr, vcores->iva.value, vcores->iva.pmic); |
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/* Might need udelay(1000) here if debug is enabled to see all prints */ |
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#else |
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u32 val; |
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val = optimize_vcore_voltage(&vcores->core); |
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@ -540,6 +610,7 @@ void scale_vcores(struct vcores_data const *vcores) |
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val = optimize_vcore_voltage(&vcores->iva); |
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do_scale_vcore(vcores->iva.addr, val, vcores->iva.pmic); |
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#endif |
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} |
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static inline void enable_clock_domain(u32 const clkctrl_reg, u32 enable_mode) |
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Tom Rini
9 years ago