Merge git://git.denx.de/u-boot-spi

drivers/mtd/spi/sf_dataflash.c

@@ -134,11 +134,17 @@ static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len)
 	debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len);
 
 	div_u64_rem(len, spi_flash->page_size, &rem);
-	if (rem)
+	if (rem) {
+		printf("%s: len(0x%x) isn't the multiple of page size(0x%x)\n",
+		       dev->name, len, spi_flash->page_size);
 		return -EINVAL;
+	}
 	div_u64_rem(offset, spi_flash->page_size, &rem);
-	if (rem)
+	if (rem) {
+		printf("%s: offset(0x%x) isn't the multiple of page size(0x%x)\n",
+		       dev->name, offset, spi_flash->page_size);
 		return -EINVAL;
+	}
 
 	status = spi_claim_bus(spi);
 	if (status) {

drivers/mtd/spi/spi_flash.c

@@ -947,11 +947,25 @@ int spi_flash_scan(struct spi_flash *flash)
 	if (IS_ERR_OR_NULL(info))
 		return -ENOENT;
 
-	/* Flash powers up read-only, so clear BP# bits */
+	/*
+	 * Flash powers up read-only, so clear BP# bits.
+	 *
+	 * Note on some flash (like Macronix), QE (quad enable) bit is in the
+	 * same status register as BP# bits, and we need preserve its original
+	 * value during a reboot cycle as this is required by some platforms
+	 * (like Intel ICH SPI controller working under descriptor mode).
+	 */
 	if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL ||
-	    JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX ||
-	    JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST)
-		write_sr(flash, 0);
+	   (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) ||
+	   (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX)) {
+		u8 sr = 0;
+
+		if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX) {
+			read_sr(flash, &sr);
+			sr &= STATUS_QEB_MXIC;
+		}
+		write_sr(flash, sr);
+	}
 
 	flash->name = info->name;
 	flash->memory_map = spi->memory_map;

drivers/mtd/spi/spi_flash_ids.c

@@ -81,6 +81,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"mx25l12805",	   INFO(0xc22018, 0x0, 64 * 1024,   256, RD_FULL | WR_QPP) },
 	{"mx25l25635f",	   INFO(0xc22019, 0x0, 64 * 1024,   512, RD_FULL | WR_QPP) },
 	{"mx25l51235f",	   INFO(0xc2201a, 0x0, 64 * 1024,  1024, RD_FULL | WR_QPP) },
+	{"mx25u6435f",	   INFO(0xc22537, 0x0, 64 * 1024,   128, RD_FULL | WR_QPP) },
 	{"mx25l12855e",	   INFO(0xc22618, 0x0, 64 * 1024,   256, RD_FULL | WR_QPP) },
 	{"mx66u51235f",    INFO(0xc2253a, 0x0, 64 * 1024,  1024, RD_FULL | WR_QPP) },
 	{"mx66l1g45g",     INFO(0xc2201b, 0x0, 64 * 1024,  2048, RD_FULL | WR_QPP) },