Whitebox
/
u-boot
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

s5pc1xx: support Samsung s5pc1xx SoC

Browse Source 
This patch adds support for the Samsung s5pc100 and s5pc110
SoCs. The s5pc1xx SoC is an ARM Cortex A8 processor.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
master
Minkyu Kang 16 years ago committed by Tom Rix
parent a380279b2a
commit 399e5ae0d0
13 changed files with 1178 additions and 0 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Show Stats Download Patch File Download Diff File
  1. 53
      cpu/arm_cortexa8/s5pc1xx/Makefile
  2. 43
      cpu/arm_cortexa8/s5pc1xx/cache.c
  3. 308
      cpu/arm_cortexa8/s5pc1xx/clock.c
  4. 57
      cpu/arm_cortexa8/s5pc1xx/cpu_info.c
  5. 47
      cpu/arm_cortexa8/s5pc1xx/reset.S
  6. 195
      cpu/arm_cortexa8/s5pc1xx/timer.c
  7. 32
      include/asm-arm/arch-s5pc1xx/clk.h
  8. 94
      include/asm-arm/arch-s5pc1xx/clock.h
  9. 72
      include/asm-arm/arch-s5pc1xx/cpu.h
  10. 129
      include/asm-arm/arch-s5pc1xx/gpio.h
  11. 42
      include/asm-arm/arch-s5pc1xx/power.h
  12. 59
      include/asm-arm/arch-s5pc1xx/pwm.h
  13. 47
      include/asm-arm/arch-s5pc1xx/uart.h

53
cpu/arm_cortexa8/s5pc1xx/Makefile
Unescape View File

@ -0,0 +1,53 @@
#
# (C) Copyright 2000-2003
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# (C) Copyright 2008
# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
SOBJS = reset.o
COBJS += cache.o
COBJS += clock.o
COBJS += cpu_info.o
COBJS += timer.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

43
cpu/arm_cortexa8/s5pc1xx/cache.c
Unescape View File

@ -0,0 +1,43 @@
/*
* Copyright (C) 2009 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/cache.h>
void l2_cache_enable(void)
{
unsigned long i;
__asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r"(i));
__asm__ __volatile__("orr %0, %0, #0x2":"=r"(i));
__asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1":"=r"(i));
}
void l2_cache_disable(void)
{
unsigned long i;
__asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r"(i));
__asm__ __volatile__("bic %0, %0, #0x2":"=r"(i));
__asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1":"=r"(i));
}

308
cpu/arm_cortexa8/s5pc1xx/clock.c
Unescape View File

@ -0,0 +1,308 @@
/*
* Copyright (C) 2009 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
* Heungjun Kim <riverful.kim@samsung.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#define APLL 0
#define MPLL 1
#define EPLL 2
#define HPLL 3
#define VPLL 4
#define CLK_M 0
#define CLK_D 1
#define CLK_P 2
#ifndef CONFIG_SYS_CLK_FREQ_C100
#define CONFIG_SYS_CLK_FREQ_C100 12000000
#endif
#ifndef CONFIG_SYS_CLK_FREQ_C110
#define CONFIG_SYS_CLK_FREQ_C110 24000000
#endif
unsigned long (*get_pclk)(void);
unsigned long (*get_arm_clk)(void);
unsigned long (*get_pll_clk)(int);
/* s5pc110: return pll clock frequency */
static unsigned long s5pc100_get_pll_clk(int pllreg)
{
struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
unsigned long r, m, p, s, mask, fout;
unsigned int freq;
switch (pllreg) {
case APLL:
r = readl(&clk->apll_con);
break;
case MPLL:
r = readl(&clk->mpll_con);
break;
case EPLL:
r = readl(&clk->epll_con);
break;
case HPLL:
r = readl(&clk->hpll_con);
break;
default:
printf("Unsupported PLL (%d)\n", pllreg);
return 0;
}
/*
* APLL_CON: MIDV [25:16]
* MPLL_CON: MIDV [23:16]
* EPLL_CON: MIDV [23:16]
* HPLL_CON: MIDV [23:16]
*/
if (pllreg == APLL)
mask = 0x3ff;
else
mask = 0x0ff;
m = (r >> 16) & mask;
/* PDIV [13:8] */
p = (r >> 8) & 0x3f;
/* SDIV [2:0] */
s = r & 0x7;
/* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
freq = CONFIG_SYS_CLK_FREQ_C100;
fout = m * (freq / (p * (1 << s)));
return fout;
}
/* s5pc100: return pll clock frequency */
static unsigned long s5pc110_get_pll_clk(int pllreg)
{
struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
unsigned long r, m, p, s, mask, fout;
unsigned int freq;
switch (pllreg) {
case APLL:
r = readl(&clk->apll_con);
break;
case MPLL:
r = readl(&clk->mpll_con);
break;
case EPLL:
r = readl(&clk->epll_con);
break;
case VPLL:
r = readl(&clk->vpll_con);
break;
default:
printf("Unsupported PLL (%d)\n", pllreg);
return 0;
}
/*
* APLL_CON: MIDV [25:16]
* MPLL_CON: MIDV [25:16]
* EPLL_CON: MIDV [24:16]
* VPLL_CON: MIDV [24:16]
*/
if (pllreg == APLL || pllreg == MPLL)
mask = 0x3ff;
else
mask = 0x1ff;
m = (r >> 16) & mask;
/* PDIV [13:8] */
p = (r >> 8) & 0x3f;
/* SDIV [2:0] */
s = r & 0x7;
freq = CONFIG_SYS_CLK_FREQ_C110;
if (pllreg == APLL) {
if (s < 1)
s = 1;
/* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */
fout = m * (freq / (p * (1 << (s - 1))));
} else
/* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
fout = m * (freq / (p * (1 << s)));
return fout;
}
/* s5pc110: return ARM clock frequency */
static unsigned long s5pc110_get_arm_clk(void)
{
struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
unsigned long div;
unsigned long dout_apll, armclk;
unsigned int apll_ratio;
div = readl(&clk->div0);
/* APLL_RATIO: [2:0] */
apll_ratio = div & 0x7;
dout_apll = get_pll_clk(APLL) / (apll_ratio + 1);
armclk = dout_apll;
return armclk;
}
/* s5pc100: return ARM clock frequency */
static unsigned long s5pc100_get_arm_clk(void)
{
struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
unsigned long div;
unsigned long dout_apll, armclk;
unsigned int apll_ratio, arm_ratio;
div = readl(&clk->div0);
/* ARM_RATIO: [6:4] */
arm_ratio = (div >> 4) & 0x7;
/* APLL_RATIO: [0] */
apll_ratio = div & 0x1;
dout_apll = get_pll_clk(APLL) / (apll_ratio + 1);
armclk = dout_apll / (arm_ratio + 1);
return armclk;
}
/* s5pc100: return HCLKD0 frequency */
static unsigned long get_hclk(void)
{
struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
unsigned long hclkd0;
uint div, d0_bus_ratio;
div = readl(&clk->div0);
/* D0_BUS_RATIO: [10:8] */
d0_bus_ratio = (div >> 8) & 0x7;
hclkd0 = get_arm_clk() / (d0_bus_ratio + 1);
return hclkd0;
}
/* s5pc100: return PCLKD1 frequency */
static unsigned long get_pclkd1(void)
{
struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
unsigned long d1_bus, pclkd1;
uint div, d1_bus_ratio, pclkd1_ratio;
div = readl(&clk->div0);
/* D1_BUS_RATIO: [14:12] */
d1_bus_ratio = (div >> 12) & 0x7;
/* PCLKD1_RATIO: [18:16] */
pclkd1_ratio = (div >> 16) & 0x7;
/* ASYNC Mode */
d1_bus = get_pll_clk(MPLL) / (d1_bus_ratio + 1);
pclkd1 = d1_bus / (pclkd1_ratio + 1);
return pclkd1;
}
/* s5pc110: return HCLKs frequency */
static unsigned long get_hclk_sys(int dom)
{
struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
unsigned long hclk;
unsigned int div;
unsigned int offset;
unsigned int hclk_sys_ratio;
if (dom == CLK_M)
return get_hclk();
div = readl(&clk->div0);
/*
* HCLK_MSYS_RATIO: [10:8]
* HCLK_DSYS_RATIO: [19:16]
* HCLK_PSYS_RATIO: [27:24]
*/
offset = 8 + (dom << 0x3);
hclk_sys_ratio = (div >> offset) & 0xf;
hclk = get_pll_clk(MPLL) / (hclk_sys_ratio + 1);
return hclk;
}
/* s5pc110: return PCLKs frequency */
static unsigned long get_pclk_sys(int dom)
{
struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
unsigned long pclk;
unsigned int div;
unsigned int offset;
unsigned int pclk_sys_ratio;
div = readl(&clk->div0);
/*
* PCLK_MSYS_RATIO: [14:12]
* PCLK_DSYS_RATIO: [22:20]
* PCLK_PSYS_RATIO: [30:28]
*/
offset = 12 + (dom << 0x3);
pclk_sys_ratio = (div >> offset) & 0x7;
pclk = get_hclk_sys(dom) / (pclk_sys_ratio + 1);
return pclk;
}
/* s5pc110: return peripheral clock frequency */
static unsigned long s5pc110_get_pclk(void)
{
return get_pclk_sys(CLK_P);
}
/* s5pc100: return peripheral clock frequency */
static unsigned long s5pc100_get_pclk(void)
{
return get_pclkd1();
}
void s5pc1xx_clock_init(void)
{
if (cpu_is_s5pc110()) {
get_pll_clk = s5pc110_get_pll_clk;
get_arm_clk = s5pc110_get_arm_clk;
get_pclk = s5pc110_get_pclk;
} else {
get_pll_clk = s5pc100_get_pll_clk;
get_arm_clk = s5pc100_get_arm_clk;
get_pclk = s5pc100_get_pclk;
}
}

57
cpu/arm_cortexa8/s5pc1xx/cpu_info.c
Unescape View File

@ -0,0 +1,57 @@
/*
* Copyright (C) 2009 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clk.h>
/* Default is s5pc100 */
unsigned int s5pc1xx_cpu_id = 0xC100;
#ifdef CONFIG_ARCH_CPU_INIT
int arch_cpu_init(void)
{
s5pc1xx_cpu_id = readl(S5PC1XX_PRO_ID);
s5pc1xx_cpu_id = 0xC000 | ((s5pc1xx_cpu_id & 0x00FFF000) >> 12);
s5pc1xx_clock_init();
return 0;
}
#endif
u32 get_device_type(void)
{
return s5pc1xx_cpu_id;
}
#ifdef CONFIG_DISPLAY_CPUINFO
int print_cpuinfo(void)
{
char buf[32];
printf("CPU:\tS5P%X@%sMHz\n",
s5pc1xx_cpu_id, strmhz(buf, get_arm_clk()));
return 0;
}
#endif

47
cpu/arm_cortexa8/s5pc1xx/reset.S
Unescape View File

@ -0,0 +1,47 @@
/*
* Copyright (c) 2009 Samsung Electronics.
* Minkyu Kang <mk7.kang@samsung.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <asm/arch/cpu.h>
#define S5PC100_SWRESET 0xE0200000
#define S5PC110_SWRESET 0xE0102000
.globl reset_cpu
reset_cpu:
ldr r1, =S5PC1XX_PRO_ID
ldr r2, [r1]
ldr r4, =0x00010000
and r4, r2, r4
cmp r4, #0
bne 110f
/* S5PC100 */
ldr r1, =S5PC100_SWRESET
ldr r2, =0xC100
b 200f
110: /* S5PC110 */
ldr r1, =S5PC110_SWRESET
mov r2, #1
200:
str r2, [r1]
_loop_forever:
b _loop_forever

195
cpu/arm_cortexa8/s5pc1xx/timer.c
Unescape View File

@ -0,0 +1,195 @@
/*
* Copyright (C) 2009 Samsung Electronics
* Heungjun Kim <riverful.kim@samsung.com>
* Inki Dae <inki.dae@samsung.com>
* Minkyu Kang <mk7.kang@samsung.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/pwm.h>
#include <asm/arch/clk.h>
#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */
#define MUX_DIV_2 1 /* 1/2 period */
#define MUX_DIV_4 2 /* 1/4 period */
#define MUX_DIV_8 3 /* 1/8 period */
#define MUX_DIV_16 4 /* 1/16 period */
#define MUX4_DIV_SHIFT 16
#define TCON_TIMER4_SHIFT 20
static unsigned long count_value;
/* Internal tick units */
static unsigned long long timestamp; /* Monotonic incrementing timer */
static unsigned long lastdec; /* Last decremneter snapshot */
/* macro to read the 16 bit timer */
static inline struct s5pc1xx_timer *s5pc1xx_get_base_timer(void)
{
if (cpu_is_s5pc110())
return (struct s5pc1xx_timer *)S5PC110_TIMER_BASE;
else
return (struct s5pc1xx_timer *)S5PC100_TIMER_BASE;
}
int timer_init(void)
{
struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer();
u32 val;
/*
* @ PWM Timer 4
* Timer Freq(HZ) =
* PCLK / { (prescaler_value + 1) * (divider_value) }
*/
/* set prescaler : 16 */
/* set divider : 2 */
writel((PRESCALER_1 & 0xff) << 8, &timer->tcfg0);
writel((MUX_DIV_2 & 0xf) << MUX4_DIV_SHIFT, &timer->tcfg1);
if (count_value == 0) {
/* reset initial value */
/* count_value = 2085937.5(HZ) (per 1 sec)*/
count_value = get_pclk() / ((PRESCALER_1 + 1) *
(MUX_DIV_2 + 1));
/* count_value / 100 = 20859.375(HZ) (per 10 msec) */
count_value = count_value / 100;
}
/* set count value */
writel(count_value, &timer->tcntb4);
lastdec = count_value;
val = (readl(&timer->tcon) & ~(0x07 << TCON_TIMER4_SHIFT)) |
S5PC1XX_TCON4_AUTO_RELOAD;
/* auto reload & manual update */
writel(val | S5PC1XX_TCON4_UPDATE, &timer->tcon);
/* start PWM timer 4 */
writel(val | S5PC1XX_TCON4_START, &timer->tcon);
timestamp = 0;
return 0;
}
/*
* timer without interrupts
*/
void reset_timer(void)
{
reset_timer_masked();
}
unsigned long get_timer(unsigned long base)
{
return get_timer_masked() - base;
}
void set_timer(unsigned long t)
{
timestamp = t;
}
/* delay x useconds */
void udelay(unsigned long usec)
{
unsigned long tmo, tmp;
if (usec >= 1000) {
/*
* if "big" number, spread normalization
* to seconds
* 1. start to normalize for usec to ticks per sec
* 2. find number of "ticks" to wait to achieve target
* 3. finish normalize.
*/
tmo = usec / 1000;
tmo *= (CONFIG_SYS_HZ * count_value / 10);
tmo /= 1000;
} else {
/* else small number, don't kill it prior to HZ multiply */
tmo = usec * CONFIG_SYS_HZ * count_value / 10;
tmo /= (1000 * 1000);
}
/* get current timestamp */
tmp = get_timer(0);
/* if setting this fordward will roll time stamp */
/* reset "advancing" timestamp to 0, set lastdec value */
/* else, set advancing stamp wake up time */
if ((tmo + tmp + 1) < tmp)
reset_timer_masked();
else
tmo += tmp;
/* loop till event */
while (get_timer_masked() < tmo)
; /* nop */
}
void reset_timer_masked(void)
{
struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer();
/* reset time */
lastdec = readl(&timer->tcnto4);
timestamp = 0;
}
unsigned long get_timer_masked(void)
{
struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer();
unsigned long now = readl(&timer->tcnto4);
if (lastdec >= now)
timestamp += lastdec - now;
else
timestamp += lastdec + count_value - now;
lastdec = now;
return timestamp;
}
/*
* This function is derived from PowerPC code (read timebase as long long).
* On ARM it just returns the timer value.
*/
unsigned long long get_ticks(void)
{
return get_timer(0);
}
/*
* This function is derived from PowerPC code (timebase clock frequency).
* On ARM it returns the number of timer ticks per second.
*/
unsigned long get_tbclk(void)
{
return CONFIG_SYS_HZ;
}

32
include/asm-arm/arch-s5pc1xx/clk.h
Unescape View File

@ -0,0 +1,32 @@
/*
* (C) Copyright 2009 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
* Heungjun Kim <riverful.kim@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#ifndef __ASM_ARM_ARCH_CLK_H_
#define __ASM_ARM_ARCH_CLK_H_
void s5pc1xx_clock_init(void);
extern unsigned long (*get_pll_clk)(int pllreg);
extern unsigned long (*get_arm_clk)(void);
extern unsigned long (*get_pclk)(void);
#endif

94
include/asm-arm/arch-s5pc1xx/clock.h
Unescape View File

@ -0,0 +1,94 @@
/*
* (C) Copyright 2009 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
* Heungjun Kim <riverful.kim@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#ifndef __ASM_ARM_ARCH_CLOCK_H_
#define __ASM_ARM_ARCH_CLOCK_H_
#ifndef __ASSEMBLY__
struct s5pc100_clock {
unsigned long apll_lock;
unsigned long mpll_lock;
unsigned long epll_lock;
unsigned long hpll_lock;
unsigned char res1[0xf0];
unsigned long apll_con;
unsigned long mpll_con;
unsigned long epll_con;
unsigned long hpll_con;
unsigned char res2[0xf0];
unsigned long src0;
unsigned long src1;
unsigned long src2;
unsigned long src3;
unsigned char res3[0xf0];
unsigned long div0;
unsigned long div1;
unsigned long div2;
unsigned long div3;
unsigned long div4;
unsigned char res4[0x1ec];
unsigned long gate_d00;
unsigned long gate_d01;
unsigned long gate_d02;
unsigned char res5[0x54];
unsigned long gate_sclk0;
unsigned long gate_sclk1;
};
struct s5pc110_clock {
unsigned long apll_lock;
unsigned char res1[0x4];
unsigned long mpll_lock;
unsigned char res2[0x4];
unsigned long epll_lock;
unsigned char res3[0xc];
unsigned long vpll_lock;
unsigned char res4[0xdc];
unsigned long apll_con;
unsigned char res5[0x4];
unsigned long mpll_con;
unsigned char res6[0x4];
unsigned long epll_con;
unsigned char res7[0xc];
unsigned long vpll_con;
unsigned char res8[0xdc];
unsigned long src0;
unsigned long src1;
unsigned long src2;
unsigned long src3;
unsigned char res9[0xf0];
unsigned long div0;
unsigned long div1;
unsigned long div2;
unsigned long div3;
unsigned long div4;
unsigned char res10[0x1ec];
unsigned long gate_d00;
unsigned long gate_d01;
unsigned long gate_d02;
unsigned char res11[0x54];
unsigned long gate_sclk0;
unsigned long gate_sclk1;
};
#endif
#endif

72
include/asm-arm/arch-s5pc1xx/cpu.h
Unescape View File

@ -0,0 +1,72 @@
/*
* (C) Copyright 2009 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
* Heungjun Kim <riverful.kim@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#ifndef _S5PC1XX_CPU_H
#define _S5PC1XX_CPU_H
#define S5PC1XX_ADDR_BASE 0xE0000000
#define S5PC1XX_CLOCK_BASE 0xE0100000
/* S5PC100 */
#define S5PC100_GPIO_BASE 0xE0300000
#define S5PC100_VIC0_BASE 0xE4000000
#define S5PC100_VIC1_BASE 0xE4100000
#define S5PC100_VIC2_BASE 0xE4200000
#define S5PC100_DMC_BASE 0xE6000000
#define S5PC100_SROMC_BASE 0xE7000000
#define S5PC100_ONENAND_BASE 0xE7100000
#define S5PC100_PWMTIMER_BASE 0xEA000000
#define S5PC100_WATCHDOG_BASE 0xEA200000
#define S5PC100_UART_BASE 0xEC000000
/* S5PC110 */
#define S5PC110_GPIO_BASE 0xE0200000
#define S5PC110_PWMTIMER_BASE 0xE2500000
#define S5PC110_WATCHDOG_BASE 0xE2700000
#define S5PC110_UART_BASE 0xE2900000
#define S5PC110_SROMC_BASE 0xE8000000
#define S5PC110_DMC0_BASE 0xF0000000
#define S5PC110_DMC1_BASE 0xF1400000
#define S5PC110_VIC0_BASE 0xF2000000
#define S5PC110_VIC1_BASE 0xF2100000
#define S5PC110_VIC2_BASE 0xF2200000
#define S5PC110_VIC3_BASE 0xF2300000
/* Chip ID */
#define S5PC1XX_PRO_ID 0xE0000000
#ifndef __ASSEMBLY__
/* CPU detection macros */
extern unsigned int s5pc1xx_cpu_id;
#define IS_SAMSUNG_TYPE(type, id) \
static inline int cpu_is_##type(void) \
{ \
return s5pc1xx_cpu_id == id ? 1 : 0; \
}
IS_SAMSUNG_TYPE(s5pc100, 0xc100)
IS_SAMSUNG_TYPE(s5pc110, 0xc110)
#endif
#endif /* _S5PC1XX_CPU_H */

129
include/asm-arm/arch-s5pc1xx/gpio.h
Unescape View File

@ -0,0 +1,129 @@
/*
* (C) Copyright 2009 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_GPIO_H
#define __ASM_ARCH_GPIO_H
#ifndef __ASSEMBLY__
struct s5pc1xx_gpio_bank {
unsigned long con;
unsigned long dat;
unsigned long pull;
unsigned long drv;
unsigned long pdn_con;
unsigned long pdn_pull;
unsigned char res1[8];
};
struct s5pc100_gpio {
struct s5pc1xx_gpio_bank gpio_a0;
struct s5pc1xx_gpio_bank gpio_a1;
struct s5pc1xx_gpio_bank gpio_b;
struct s5pc1xx_gpio_bank gpio_c;
struct s5pc1xx_gpio_bank gpio_d;
struct s5pc1xx_gpio_bank gpio_e0;
struct s5pc1xx_gpio_bank gpio_e1;
struct s5pc1xx_gpio_bank gpio_f0;
struct s5pc1xx_gpio_bank gpio_f1;
struct s5pc1xx_gpio_bank gpio_f2;
struct s5pc1xx_gpio_bank gpio_f3;
struct s5pc1xx_gpio_bank gpio_g0;
struct s5pc1xx_gpio_bank gpio_g1;
struct s5pc1xx_gpio_bank gpio_g2;
struct s5pc1xx_gpio_bank gpio_g3;
struct s5pc1xx_gpio_bank gpio_i;
struct s5pc1xx_gpio_bank gpio_j0;
struct s5pc1xx_gpio_bank gpio_j1;
struct s5pc1xx_gpio_bank gpio_j2;
struct s5pc1xx_gpio_bank gpio_j3;
struct s5pc1xx_gpio_bank gpio_j4;
struct s5pc1xx_gpio_bank gpio_k0;
struct s5pc1xx_gpio_bank gpio_k1;
struct s5pc1xx_gpio_bank gpio_k2;
struct s5pc1xx_gpio_bank gpio_k3;
struct s5pc1xx_gpio_bank gpio_l0;
struct s5pc1xx_gpio_bank gpio_l1;
struct s5pc1xx_gpio_bank gpio_l2;
struct s5pc1xx_gpio_bank gpio_l3;
struct s5pc1xx_gpio_bank gpio_l4;
struct s5pc1xx_gpio_bank gpio_h0;
struct s5pc1xx_gpio_bank gpio_h1;
struct s5pc1xx_gpio_bank gpio_h2;
struct s5pc1xx_gpio_bank gpio_h3;
};
struct s5pc110_gpio {
struct s5pc1xx_gpio_bank gpio_a0;
struct s5pc1xx_gpio_bank gpio_a1;
struct s5pc1xx_gpio_bank gpio_b;
struct s5pc1xx_gpio_bank gpio_c0;
struct s5pc1xx_gpio_bank gpio_c1;
struct s5pc1xx_gpio_bank gpio_d0;
struct s5pc1xx_gpio_bank gpio_d1;
struct s5pc1xx_gpio_bank gpio_e0;
struct s5pc1xx_gpio_bank gpio_e1;
struct s5pc1xx_gpio_bank gpio_f0;
struct s5pc1xx_gpio_bank gpio_f1;
struct s5pc1xx_gpio_bank gpio_f2;
struct s5pc1xx_gpio_bank gpio_f3;
struct s5pc1xx_gpio_bank gpio_g0;
struct s5pc1xx_gpio_bank gpio_g1;
struct s5pc1xx_gpio_bank gpio_g2;
struct s5pc1xx_gpio_bank gpio_g3;
struct s5pc1xx_gpio_bank gpio_i;
struct s5pc1xx_gpio_bank gpio_j0;
struct s5pc1xx_gpio_bank gpio_j1;
struct s5pc1xx_gpio_bank gpio_j2;
struct s5pc1xx_gpio_bank gpio_j3;
struct s5pc1xx_gpio_bank gpio_j4;
struct s5pc1xx_gpio_bank gpio_mp0_1;
struct s5pc1xx_gpio_bank gpio_mp0_2;
struct s5pc1xx_gpio_bank gpio_mp0_3;
struct s5pc1xx_gpio_bank gpio_mp0_4;
struct s5pc1xx_gpio_bank gpio_mp0_5;
struct s5pc1xx_gpio_bank gpio_mp0_6;
struct s5pc1xx_gpio_bank gpio_mp0_7;
struct s5pc1xx_gpio_bank gpio_mp1_0;
struct s5pc1xx_gpio_bank gpio_mp1_1;
struct s5pc1xx_gpio_bank gpio_mp1_2;
struct s5pc1xx_gpio_bank gpio_mp1_3;
struct s5pc1xx_gpio_bank gpio_mp1_4;
struct s5pc1xx_gpio_bank gpio_mp1_5;
struct s5pc1xx_gpio_bank gpio_mp1_6;
struct s5pc1xx_gpio_bank gpio_mp1_7;
struct s5pc1xx_gpio_bank gpio_mp1_8;
struct s5pc1xx_gpio_bank gpio_mp2_0;
struct s5pc1xx_gpio_bank gpio_mp2_1;
struct s5pc1xx_gpio_bank gpio_mp2_2;
struct s5pc1xx_gpio_bank gpio_mp2_3;
struct s5pc1xx_gpio_bank gpio_mp2_4;
struct s5pc1xx_gpio_bank gpio_mp2_5;
struct s5pc1xx_gpio_bank gpio_mp2_6;
struct s5pc1xx_gpio_bank gpio_mp2_7;
struct s5pc1xx_gpio_bank gpio_mp2_8;
struct s5pc1xx_gpio_bank res1[48];
struct s5pc1xx_gpio_bank gpio_h0;
struct s5pc1xx_gpio_bank gpio_h1;
struct s5pc1xx_gpio_bank gpio_h2;
struct s5pc1xx_gpio_bank gpio_h3;
};
#endif
#endif

42
include/asm-arm/arch-s5pc1xx/power.h
Unescape View File

@ -0,0 +1,42 @@
/*
* Copyright (c) 2009 Samsung Electronics
* Kyungmin Park <kyungmin.park@samsung.com>
* Minkyu Kang <mk7.kang@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#ifndef __ASM_ARM_ARCH_POWER_H_
#define __ASM_ARM_ARCH_POWER_H_
/*
* Power control
*/
#define S5PC100_OTHERS 0xE0108200
#define S5PC100_RST_STAT 0xE0108300
#define S5PC100_SLEEP_WAKEUP (1 << 3)
#define S5PC100_WAKEUP_STAT 0xE0108304
#define S5PC100_INFORM0 0xE0108400
#define S5PC110_RST_STAT 0xE010A000
#define S5PC110_SLEEP_WAKEUP (1 << 3)
#define S5PC110_WAKEUP_STAT 0xE010C200
#define S5PC110_OTHERS 0xE010E000
#define S5PC110_USB_PHY_CON 0xE010E80C
#define S5PC110_INFORM0 0xE010F000
#endif

59
include/asm-arm/arch-s5pc1xx/pwm.h
Unescape View File

@ -0,0 +1,59 @@
/*
* Copyright (C) 2009 Samsung Electronics
* Kyungmin Park <kyungmin.park@samsung.com>
* Minkyu Kang <mk7.kang@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __ASM_ARM_ARCH_PWM_H_
#define __ASM_ARM_ARCH_PWM_H_
/* PWM timer addressing */
#define S5PC100_TIMER_BASE S5PC100_PWMTIMER_BASE
#define S5PC110_TIMER_BASE S5PC110_PWMTIMER_BASE
/* Interval mode(Auto Reload) of PWM Timer 4 */
#define S5PC1XX_TCON4_AUTO_RELOAD (1 << 22)
/* Update TCNTB4 */
#define S5PC1XX_TCON4_UPDATE (1 << 21)
/* start bit of PWM Timer 4 */
#define S5PC1XX_TCON4_START (1 << 20)
#ifndef __ASSEMBLY__
struct s5pc1xx_timer {
unsigned long tcfg0;
unsigned long tcfg1;
unsigned long tcon;
unsigned long tcntb0;
unsigned long tcmpb0;
unsigned long tcnto0;
unsigned long tcntb1;
unsigned long tcmpb1;
unsigned long tcnto1;
unsigned long tcntb2;
unsigned long tcmpb2;
unsigned long tcnto2;
unsigned long tcntb3;
unsigned long res1;
unsigned long tcnto3;
unsigned long tcntb4;
unsigned long tcnto4;
unsigned long tintcstat;
};
#endif /* __ASSEMBLY__ */
#endif

47
include/asm-arm/arch-s5pc1xx/uart.h
Unescape View File

@ -0,0 +1,47 @@
/*
* (C) Copyright 2009 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
* Heungjun Kim <riverful.kim@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#ifndef __ASM_ARCH_UART_H_
#define __ASM_ARCH_UART_H_
#ifndef __ASSEMBLY__
struct s5pc1xx_uart {
unsigned long ulcon;
unsigned long ucon;
unsigned long ufcon;
unsigned long umcon;
unsigned long utrstat;
unsigned long uerstat;
unsigned long ufstat;
unsigned long umstat;
unsigned char utxh;
unsigned char res1[3];
unsigned char urxh;
unsigned char res2[3];
unsigned long ubrdiv;
unsigned short udivslot;
unsigned char res3[2];
unsigned char res4[0x3d0];
};
#endif /* __ASSEMBLY__ */
#endif
Write Preview
Loading…
Cancel
Save