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@ -35,7 +35,7 @@ |
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DECLARE_GLOBAL_DATA_PTR; |
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#define GDC_SCRATCH_REG 0xC1FF8008 |
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#define GDC_SCRATCH_REG 0xC1FF8044 |
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#define GDC_VERSION_REG 0xC1FF8084 |
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#define GDC_RAM_START 0xC0000000 |
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#define GDC_RAM_END 0xC2000000 |
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@ -44,7 +44,7 @@ DECLARE_GLOBAL_DATA_PTR; |
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static int gdc_test_reg_one(uint value) |
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{ |
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int ret = 0; |
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int ret; |
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uint read_value; |
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/* write test pattern */ |
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@ -56,10 +56,9 @@ static int gdc_test_reg_one(uint value) |
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if (read_value != value) { |
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post_log("GDC SCRATCH test failed write %08X, read %08X\n", |
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value, read_value); |
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ret = 1; |
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} |
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return ret; |
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return (read_value != value); |
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} |
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/* Verify GDC, get memory size */ |
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@ -71,9 +70,16 @@ int gdc_post_test(int flags) |
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post_log("\n"); |
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old_value = in_be32((void *)GDC_SCRATCH_REG); |
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if (gdc_test_reg_one(0x55555555)) |
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/*
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* GPIOC2 register behaviour: the LIME graphics processor has a |
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* maximum of 5 GPIO ports that can be used in this hardware |
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* configuration. Thus only the bits for these 5 GPIOs can be |
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* activated in the GPIOC2 register. All other bits will always be |
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* read as zero. |
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*/ |
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if (gdc_test_reg_one(0x00150015)) |
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ret = 1; |
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if (gdc_test_reg_one(0xAAAAAAAA)) |
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if (gdc_test_reg_one(0x000A000A)) |
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ret = 1; |
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out_be32((void *)GDC_SCRATCH_REG, old_value); |
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