The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>master
parent
e7f533cd59
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3ad2737ee3
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/*
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* Copyright 2014 Freescale Semiconductor, Inc. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <command.h> |
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#include <i2c.h> |
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#include <asm/immap_85xx.h> |
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#include "vid.h" |
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DECLARE_GLOBAL_DATA_PTR; |
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int __weak i2c_multiplexer_select_vid_channel(u8 channel) |
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{ |
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return 0; |
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} |
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|
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/*
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* Compensate for a board specific voltage drop between regulator and SoC |
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* return a value in mV |
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*/ |
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int __weak board_vdd_drop_compensation(void) |
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{ |
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return 0; |
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} |
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|
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/*
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* Get the i2c address configuration for the IR regulator chip |
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* |
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* There are some variance in the RDB HW regarding the I2C address configuration |
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* for the IR regulator chip, which is likely a problem of external resistor |
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* accuracy. So we just check each address in a hopefully non-intrusive mode |
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* and use the first one that seems to work |
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* |
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* The IR chip can show up under the following addresses: |
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* 0x08 (Verified on T1040RDB-PA,T4240RDB-PB,X-T4240RDB-16GPA) |
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* 0x09 (Verified on T1040RDB-PA) |
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* 0x38 (Verified on T2080QDS, T2081QDS) |
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*/ |
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static int find_ir_chip_on_i2c(void) |
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{ |
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int i2caddress; |
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int ret; |
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u8 byte; |
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int i; |
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const int ir_i2c_addr[] = {0x38, 0x08, 0x09}; |
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/* Check all the address */ |
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for (i = 0; i < (sizeof(ir_i2c_addr)/sizeof(ir_i2c_addr[0])); i++) { |
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i2caddress = ir_i2c_addr[i]; |
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ret = i2c_read(i2caddress, |
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IR36021_MFR_ID_OFFSET, 1, (void *)&byte, |
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sizeof(byte)); |
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if ((ret >= 0) && (byte == IR36021_MFR_ID)) |
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return i2caddress; |
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} |
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return -1; |
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} |
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/* Maximum loop count waiting for new voltage to take effect */ |
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#define MAX_LOOP_WAIT_NEW_VOL 100 |
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/* Maximum loop count waiting for the voltage to be stable */ |
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#define MAX_LOOP_WAIT_VOL_STABLE 100 |
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/*
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* read_voltage from sensor on I2C bus |
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* We use average of 4 readings, waiting for WAIT_FOR_ADC before |
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* another reading |
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*/ |
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#define NUM_READINGS 4 /* prefer to be power of 2 for efficiency */ |
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/* If an INA220 chip is available, we can use it to read back the voltage
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* as it may have a higher accuracy than the IR chip for the same purpose |
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*/ |
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#ifdef CONFIG_VOL_MONITOR_INA220 |
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#define WAIT_FOR_ADC 532 /* wait for 532 microseconds for ADC */ |
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#define ADC_MIN_ACCURACY 4 |
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#else |
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#define WAIT_FOR_ADC 138 /* wait for 138 microseconds for ADC */ |
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#define ADC_MIN_ACCURACY 4 |
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#endif |
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#ifdef CONFIG_VOL_MONITOR_INA220 |
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static int read_voltage_from_INA220(int i2caddress) |
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{ |
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int i, ret, voltage_read = 0; |
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u16 vol_mon; |
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u8 buf[2]; |
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for (i = 0; i < NUM_READINGS; i++) { |
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ret = i2c_read(I2C_VOL_MONITOR_ADDR, |
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I2C_VOL_MONITOR_BUS_V_OFFSET, 1, |
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(void *)&buf, 2); |
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if (ret) { |
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printf("VID: failed to read core voltage\n"); |
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return ret; |
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} |
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vol_mon = (buf[0] << 8) | buf[1]; |
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if (vol_mon & I2C_VOL_MONITOR_BUS_V_OVF) { |
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printf("VID: Core voltage sensor error\n"); |
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return -1; |
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} |
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debug("VID: bus voltage reads 0x%04x\n", vol_mon); |
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/* LSB = 4mv */ |
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voltage_read += (vol_mon >> I2C_VOL_MONITOR_BUS_V_SHIFT) * 4; |
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udelay(WAIT_FOR_ADC); |
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} |
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/* calculate the average */ |
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voltage_read /= NUM_READINGS; |
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return voltage_read; |
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} |
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#endif |
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/* read voltage from IR */ |
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#ifdef CONFIG_VOL_MONITOR_IR36021_READ |
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static int read_voltage_from_IR(int i2caddress) |
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{ |
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int i, ret, voltage_read = 0; |
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u16 vol_mon; |
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u8 buf; |
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for (i = 0; i < NUM_READINGS; i++) { |
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ret = i2c_read(i2caddress, |
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IR36021_LOOP1_VOUT_OFFSET, |
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1, (void *)&buf, 1); |
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if (ret) { |
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printf("VID: failed to read vcpu\n"); |
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return ret; |
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} |
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vol_mon = buf; |
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if (!vol_mon) { |
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printf("VID: Core voltage sensor error\n"); |
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return -1; |
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} |
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debug("VID: bus voltage reads 0x%02x\n", vol_mon); |
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/* Resolution is 1/128V. We scale up here to get 1/128mV
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* and divide at the end |
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*/ |
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voltage_read += vol_mon * 1000; |
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udelay(WAIT_FOR_ADC); |
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} |
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/* Scale down to the real mV as IR resolution is 1/128V, rounding up */ |
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voltage_read = DIV_ROUND_UP(voltage_read, 128); |
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/* calculate the average */ |
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voltage_read /= NUM_READINGS; |
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/* Compensate for a board specific voltage drop between regulator and
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* SoC before converting into an IR VID value |
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*/ |
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voltage_read -= board_vdd_drop_compensation(); |
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return voltage_read; |
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} |
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#endif |
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static int read_voltage(int i2caddress) |
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{ |
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int voltage_read; |
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#ifdef CONFIG_VOL_MONITOR_INA220 |
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voltage_read = read_voltage_from_INA220(i2caddress); |
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#elif defined CONFIG_VOL_MONITOR_IR36021_READ |
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voltage_read = read_voltage_from_IR(i2caddress); |
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#else |
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return -1; |
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#endif |
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return voltage_read; |
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} |
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/*
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* We need to calculate how long before the voltage stops to drop |
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* or increase. It returns with the loop count. Each loop takes |
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* several readings (WAIT_FOR_ADC) |
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*/ |
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static int wait_for_new_voltage(int vdd, int i2caddress) |
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{ |
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int timeout, vdd_current; |
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vdd_current = read_voltage(i2caddress); |
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/* wait until voltage starts to reach the target. Voltage slew
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* rates by typical regulators will always lead to stable readings |
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* within each fairly long ADC interval in comparison to the |
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* intended voltage delta change until the target voltage is |
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* reached. The fairly small voltage delta change to any target |
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* VID voltage also means that this function will always complete |
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* within few iterations. If the timeout was ever reached, it would |
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* point to a serious failure in the regulator system. |
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*/ |
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for (timeout = 0; |
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abs(vdd - vdd_current) > (IR_VDD_STEP_UP + IR_VDD_STEP_DOWN) && |
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timeout < MAX_LOOP_WAIT_NEW_VOL; timeout++) { |
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vdd_current = read_voltage(i2caddress); |
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} |
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if (timeout >= MAX_LOOP_WAIT_NEW_VOL) { |
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printf("VID: Voltage adjustment timeout\n"); |
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return -1; |
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} |
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return timeout; |
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} |
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/*
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* this function keeps reading the voltage until it is stable or until the |
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* timeout expires |
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*/ |
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static int wait_for_voltage_stable(int i2caddress) |
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{ |
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int timeout, vdd_current, vdd; |
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vdd = read_voltage(i2caddress); |
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udelay(NUM_READINGS * WAIT_FOR_ADC); |
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/* wait until voltage is stable */ |
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vdd_current = read_voltage(i2caddress); |
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/* The maximum timeout is
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* MAX_LOOP_WAIT_VOL_STABLE * NUM_READINGS * WAIT_FOR_ADC |
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*/ |
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for (timeout = MAX_LOOP_WAIT_VOL_STABLE; |
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abs(vdd - vdd_current) > ADC_MIN_ACCURACY && |
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timeout > 0; timeout--) { |
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vdd = vdd_current; |
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udelay(NUM_READINGS * WAIT_FOR_ADC); |
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vdd_current = read_voltage(i2caddress); |
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} |
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if (timeout == 0) |
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return -1; |
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return vdd_current; |
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} |
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#ifdef CONFIG_VOL_MONITOR_IR36021_SET |
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/* Set the voltage to the IR chip */ |
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static int set_voltage_to_IR(int i2caddress, int vdd) |
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{ |
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int wait, vdd_last; |
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int ret; |
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u8 vid; |
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/* Compensate for a board specific voltage drop between regulator and
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* SoC before converting into an IR VID value |
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*/ |
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vdd += board_vdd_drop_compensation(); |
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vid = DIV_ROUND_UP(vdd - 245, 5); |
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ret = i2c_write(i2caddress, IR36021_LOOP1_MANUAL_ID_OFFSET, |
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1, (void *)&vid, sizeof(vid)); |
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if (ret) { |
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printf("VID: failed to write VID\n"); |
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return -1; |
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} |
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wait = wait_for_new_voltage(vdd, i2caddress); |
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if (wait < 0) |
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return -1; |
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debug("VID: Waited %d us\n", wait * NUM_READINGS * WAIT_FOR_ADC); |
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vdd_last = wait_for_voltage_stable(i2caddress); |
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if (vdd_last < 0) |
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return -1; |
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debug("VID: Current voltage is %d mV\n", vdd_last); |
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return vdd_last; |
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} |
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#endif |
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static int set_voltage(int i2caddress, int vdd) |
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{ |
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int vdd_last = -1; |
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#ifdef CONFIG_VOL_MONITOR_IR36021_SET |
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vdd_last = set_voltage_to_IR(i2caddress, vdd); |
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#else |
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#error Specific voltage monitor must be defined |
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#endif |
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return vdd_last; |
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} |
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int adjust_vdd(ulong vdd_override) |
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{ |
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int re_enable = disable_interrupts(); |
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ccsr_gur_t __iomem *gur = |
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(void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
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u32 fusesr; |
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u8 vid; |
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int vdd_target, vdd_current, vdd_last; |
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int ret, i2caddress; |
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unsigned long vdd_string_override; |
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char *vdd_string; |
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static const uint16_t vdd[32] = { |
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0, /* unused */ |
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9875, /* 0.9875V */ |
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9750, |
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9625, |
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9500, |
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9375, |
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9250, |
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9125, |
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9000, |
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8875, |
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8750, |
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8625, |
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8500, |
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8375, |
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8250, |
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8125, |
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10000, /* 1.0000V */ |
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10125, |
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10250, |
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10375, |
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10500, |
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10625, |
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10750, |
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10875, |
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11000, |
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0, /* reserved */ |
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}; |
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struct vdd_drive { |
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u8 vid; |
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unsigned voltage; |
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}; |
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ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); |
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if (ret) { |
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debug("VID: I2C failed to switch channel\n"); |
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ret = -1; |
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goto exit; |
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} |
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ret = find_ir_chip_on_i2c(); |
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if (ret < 0) { |
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printf("VID: Could not find voltage regulator on I2C.\n"); |
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ret = -1; |
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goto exit; |
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} else { |
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i2caddress = ret; |
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debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); |
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} |
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/* get the voltage ID from fuse status register */ |
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fusesr = in_be32(&gur->dcfg_fusesr); |
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/*
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* VID is used according to the table below |
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* --------------------------------------- |
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* | DA_V | |
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* |-------------------------------------| |
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* | 5b00000 | 5b00001-5b11110 | 5b11111 | |
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* ---------------+---------+-----------------+---------| |
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* | D | 5b00000 | NO VID | VID = DA_V | NO VID | |
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* | A |----------+---------+-----------------+---------| |
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* | _ | 5b00001 |VID = | VID = |VID = | |
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* | V | ~ | DA_V_ALT| DA_V_ALT | DA_A_VLT| |
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* | _ | 5b11110 | | | | |
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* | A |----------+---------+-----------------+---------| |
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* | L | 5b11111 | No VID | VID = DA_V | NO VID | |
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* | T | | | | | |
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* ------------------------------------------------------ |
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*/ |
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vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) & |
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FSL_CORENET_DCFG_FUSESR_ALTVID_MASK; |
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if ((vid == 0) || (vid == FSL_CORENET_DCFG_FUSESR_ALTVID_MASK)) { |
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vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_VID_SHIFT) & |
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FSL_CORENET_DCFG_FUSESR_VID_MASK; |
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} |
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vdd_target = vdd[vid]; |
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|
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/* check override variable for overriding VDD */ |
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vdd_string = getenv(CONFIG_VID_FLS_ENV); |
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if (vdd_override == 0 && vdd_string && |
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!strict_strtoul(vdd_string, 10, &vdd_string_override)) |
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vdd_override = vdd_string_override; |
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if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) { |
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vdd_target = vdd_override * 10; /* convert to 1/10 mV */ |
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debug("VDD override is %lu\n", vdd_override); |
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} else if (vdd_override != 0) { |
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printf("Invalid value.\n"); |
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} |
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if (vdd_target == 0) { |
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debug("VID: VID not used\n"); |
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ret = 0; |
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goto exit; |
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} else { |
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/* divide and round up by 10 to get a value in mV */ |
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vdd_target = DIV_ROUND_UP(vdd_target, 10); |
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debug("VID: vid = %d mV\n", vdd_target); |
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} |
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|
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/*
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* Read voltage monitor to check real voltage. |
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*/ |
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vdd_last = read_voltage(i2caddress); |
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if (vdd_last < 0) { |
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printf("VID: Couldn't read sensor abort VID adjustment\n"); |
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ret = -1; |
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goto exit; |
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} |
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vdd_current = vdd_last; |
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debug("VID: Core voltage is currently at %d mV\n", vdd_last); |
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/*
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* Adjust voltage to at or one step above target. |
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* As measurements are less precise than setting the values |
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* we may run through dummy steps that cancel each other |
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* when stepping up and then down. |
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*/ |
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while (vdd_last > 0 && |
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vdd_last < vdd_target) { |
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vdd_current += IR_VDD_STEP_UP; |
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vdd_last = set_voltage(i2caddress, vdd_current); |
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} |
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while (vdd_last > 0 && |
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vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) { |
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vdd_current -= IR_VDD_STEP_DOWN; |
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vdd_last = set_voltage(i2caddress, vdd_current); |
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} |
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|
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if (vdd_last > 0) |
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printf("VID: Core voltage after adjustment is at %d mV\n", |
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vdd_last); |
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else |
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ret = -1; |
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exit: |
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if (re_enable) |
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enable_interrupts(); |
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return ret; |
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} |
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|
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static int print_vdd(void) |
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{ |
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int vdd_last, ret, i2caddress; |
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|
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ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); |
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if (ret) { |
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debug("VID : I2c failed to switch channel\n"); |
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return -1; |
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} |
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ret = find_ir_chip_on_i2c(); |
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if (ret < 0) { |
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printf("VID: Could not find voltage regulator on I2C.\n"); |
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return -1; |
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} else { |
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i2caddress = ret; |
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debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); |
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} |
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|
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/*
|
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* Read voltage monitor to check real voltage. |
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*/ |
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vdd_last = read_voltage(i2caddress); |
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if (vdd_last < 0) { |
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printf("VID: Couldn't read sensor abort VID adjustment\n"); |
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return -1; |
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} |
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printf("VID: Core voltage is at %d mV\n", vdd_last); |
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|
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return 0; |
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} |
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|
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static int do_vdd_override(cmd_tbl_t *cmdtp, |
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int flag, int argc, |
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char * const argv[]) |
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{ |
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ulong override; |
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|
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if (argc < 2) |
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return CMD_RET_USAGE; |
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|
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if (!strict_strtoul(argv[1], 10, &override)) |
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adjust_vdd(override); /* the value is checked by callee */ |
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else |
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return CMD_RET_USAGE; |
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return 0; |
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} |
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|
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static int do_vdd_read(cmd_tbl_t *cmdtp, |
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int flag, int argc, |
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char * const argv[]) |
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{ |
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if (argc < 1) |
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return CMD_RET_USAGE; |
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print_vdd(); |
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|
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return 0; |
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} |
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|
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U_BOOT_CMD( |
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vdd_override, 2, 0, do_vdd_override, |
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"override VDD", |
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" - override with the voltage specified in mV, eg. 1050" |
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); |
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|
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U_BOOT_CMD( |
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vdd_read, 1, 0, do_vdd_read, |
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"read VDD", |
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" - Read the voltage specified in mV" |
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) |
@ -0,0 +1,20 @@ |
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/*
|
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* Copyright 2014 Freescale Semiconductor, Inc. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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#ifndef __VID_H_ |
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#define __VID_H_ |
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|
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#define IR36021_LOOP1_MANUAL_ID_OFFSET 0x6A |
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#define IR36021_LOOP1_VOUT_OFFSET 0x9A |
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#define IR36021_MFR_ID_OFFSET 0x92 |
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#define IR36021_MFR_ID 0x43 |
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|
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/* step the IR regulator in 5mV increments */ |
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#define IR_VDD_STEP_DOWN 5 |
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#define IR_VDD_STEP_UP 5 |
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int adjust_vdd(ulong vdd_override); |
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|
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#endif /* __VID_H_ */ |
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Reference in new issue