omap: am33xx: enable gpio support

This patch uses the code in omap-common to support gpio modules 1-3
on am33xx based boards.

It adds base address and register definitions, enables clocks to the
modules, and enables building the common gpio code for CONFIG_AM33XX
as well as CONFIG_OMAP

Signed-off-by: Steve Sakoman <steve@sakoman.com>

arch/arm/cpu/armv7/am33xx/board.c

@@ -22,6 +22,7 @@
 #include <asm/arch/omap.h>
 #include <asm/arch/ddr_defs.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/gpio.h>
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/common_def.h>
 #include <asm/io.h>
@@ -33,6 +34,15 @@ struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
 struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;
 struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
 
+static const struct gpio_bank gpio_bank_am33xx[4] = {
+	{ (void *)AM33XX_GPIO0_BASE, METHOD_GPIO_24XX },
+	{ (void *)AM33XX_GPIO1_BASE, METHOD_GPIO_24XX },
+	{ (void *)AM33XX_GPIO2_BASE, METHOD_GPIO_24XX },
+	{ (void *)AM33XX_GPIO3_BASE, METHOD_GPIO_24XX },
+};
+
+const struct gpio_bank *const omap_gpio_bank = gpio_bank_am33xx;
+
 /* UART Defines */
 #ifdef CONFIG_SPL_BUILD
 #define UART_RESET		(0x1 << 1)

arch/arm/cpu/armv7/am33xx/clock.c

@@ -118,6 +118,21 @@ static void enable_per_clocks(void)
 	writel(PRCM_MOD_EN, &cmwkup->wkup_i2c0ctrl);
 	while (readl(&cmwkup->wkup_i2c0ctrl) != PRCM_MOD_EN)
 		;
+
+	/* gpio1 module */
+	writel(PRCM_MOD_EN, &cmper->gpio1clkctrl);
+	while (readl(&cmper->gpio1clkctrl) != PRCM_MOD_EN)
+		;
+
+	/* gpio2 module */
+	writel(PRCM_MOD_EN, &cmper->gpio2clkctrl);
+	while (readl(&cmper->gpio2clkctrl) != PRCM_MOD_EN)
+		;
+
+	/* gpio3 module */
+	writel(PRCM_MOD_EN, &cmper->gpio3clkctrl);
+	while (readl(&cmper->gpio3clkctrl) != PRCM_MOD_EN)
+		;
 }
 
 static void mpu_pll_config(void)

arch/arm/cpu/armv7/omap-common/Makefile

@@ -29,7 +29,7 @@ SOBJS	:= reset.o
 
 COBJS	:= timer.o
 COBJS	+= utils.o
-ifdef CONFIG_OMAP
+ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP),)
 COBJS	+= gpio.o
 endif
 

arch/arm/include/asm/arch-am33xx/cpu.h

@@ -235,6 +235,26 @@ struct ctrl_stat {
 	unsigned int resv1[16];
 	unsigned int statusreg;		/* ofset 0x40 */
 };
+
+/* AM33XX GPIO registers */
+#define OMAP_GPIO_REVISION		0x0000
+#define OMAP_GPIO_SYSCONFIG		0x0010
+#define OMAP_GPIO_SYSSTATUS		0x0114
+#define OMAP_GPIO_IRQSTATUS1		0x002c
+#define OMAP_GPIO_IRQSTATUS2		0x0030
+#define OMAP_GPIO_CTRL			0x0130
+#define OMAP_GPIO_OE			0x0134
+#define OMAP_GPIO_DATAIN		0x0138
+#define OMAP_GPIO_DATAOUT		0x013c
+#define OMAP_GPIO_LEVELDETECT0		0x0140
+#define OMAP_GPIO_LEVELDETECT1		0x0144
+#define OMAP_GPIO_RISINGDETECT		0x0148
+#define OMAP_GPIO_FALLINGDETECT		0x014c
+#define OMAP_GPIO_DEBOUNCE_EN		0x0150
+#define OMAP_GPIO_DEBOUNCE_VAL		0x0154
+#define OMAP_GPIO_CLEARDATAOUT		0x0190
+#define OMAP_GPIO_SETDATAOUT		0x0194
+
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL_STRICT_NAMES */
 

arch/arm/include/asm/arch-am33xx/gpio.h

@@ -0,0 +1,29 @@
+/*
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#ifndef _GPIO_AM33xx_H
+#define _GPIO_AM33xx_H
+
+#include <asm/omap_gpio.h>
+
+#define AM33XX_GPIO0_BASE       0x44E07000
+#define AM33XX_GPIO1_BASE       0x4804C000
+#define AM33XX_GPIO2_BASE       0x481AC000
+#define AM33XX_GPIO3_BASE       0x481AE000
+
+#endif /* _GPIO_AM33xx_H */