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@ -3,15 +3,46 @@ |
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* |
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* Author: Valentin Raevsky <valentin@compulab.co.il> |
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* |
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* The code contained herein is licensed under the GNU General Public |
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* License. You may obtain a copy of the GNU General Public License |
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* Version 2 or later at the following locations: |
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* This file is dual-licensed: you can use it either under the terms |
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* of the GPL or the X11 license, at your option. Note that this dual |
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* licensing only applies to this file, and not this project as a |
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* whole. |
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* |
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* http://www.opensource.org/licenses/gpl-license.html |
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* http://www.gnu.org/copyleft/gpl.html |
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* a) This file is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License |
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* version 2 as published by the Free Software Foundation. |
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* |
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* This file is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* Or, alternatively, |
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* |
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* b) Permission is hereby granted, free of charge, to any person |
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* obtaining a copy of this software and associated documentation |
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* files (the "Software"), to deal in the Software without |
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* restriction, including without limitation the rights to use, |
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* copy, modify, merge, publish, distribute, sublicense, and/or |
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* sell copies of the Software, and to permit persons to whom the |
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* Software is furnished to do so, subject to the following |
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* conditions: |
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* |
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* The above copyright notice and this permission notice shall be |
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* included in all copies or substantial portions of the Software. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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* OTHER DEALINGS IN THE SOFTWARE. |
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*/ |
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/dts-v1/; |
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#include <dt-bindings/gpio/gpio.h> |
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#include "imx6q.dtsi" |
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/ { |
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@ -31,6 +62,118 @@ |
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linux,default-trigger = "heartbeat"; |
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}; |
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}; |
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awnh387_pwrseq: pwrseq { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_pwrseq>; |
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compatible = "mmc-pwrseq-sd8787"; |
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powerdown-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>; |
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reset-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; |
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}; |
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reg_pcie_power_on_gpio: regulator-pcie-power-on-gpio { |
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compatible = "regulator-fixed"; |
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regulator-name = "regulator-pcie-power-on-gpio"; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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gpio = <&gpio2 24 GPIO_ACTIVE_LOW>; |
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}; |
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reg_usb_h1_vbus: usb_h1_vbus { |
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compatible = "regulator-fixed"; |
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regulator-name = "usb_h1_vbus"; |
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regulator-min-microvolt = <5000000>; |
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regulator-max-microvolt = <5000000>; |
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gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>; |
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enable-active-high; |
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}; |
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reg_usb_otg_vbus: usb_otg_vbus { |
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compatible = "regulator-fixed"; |
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regulator-name = "usb_otg_vbus"; |
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regulator-min-microvolt = <5000000>; |
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regulator-max-microvolt = <5000000>; |
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gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; |
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enable-active-high; |
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}; |
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sound-analog { |
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compatible = "simple-audio-card"; |
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simple-audio-card,name = "On-board analog audio"; |
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simple-audio-card,widgets = |
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"Headphone", "Headphone Jack", |
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"Line", "Line Out", |
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"Microphone", "Mic Jack", |
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"Line", "Line In"; |
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simple-audio-card,routing = |
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"Headphone Jack", "RHPOUT", |
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"Headphone Jack", "LHPOUT", |
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"MICIN", "Mic Bias", |
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"Mic Bias", "Mic Jack"; |
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simple-audio-card,format = "i2s"; |
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simple-audio-card,bitclock-master = <&sound_master>; |
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simple-audio-card,frame-master = <&sound_master>; |
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simple-audio-card,bitclock-inversion; |
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sound_master: simple-audio-card,cpu { |
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sound-dai = <&ssi2>; |
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system-clock-frequency = <2822400>; |
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}; |
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simple-audio-card,codec { |
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sound-dai = <&wm8731>; |
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}; |
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}; |
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sound-spdif { |
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compatible = "fsl,imx-audio-spdif"; |
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model = "imx-spdif"; |
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spdif-controller = <&spdif>; |
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spdif-out; |
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spdif-in; |
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}; |
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}; |
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/* |
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* The U-Boot: audio mux node has been removed because the required dt-bindings |
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* header file is not present in the U-Boot. |
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*/ |
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&cpu0 { |
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/* |
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* Although the imx6q fuse indicates that 1.2GHz operation is possible, |
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* the module behaves unstable at this frequency. Hence, remove the |
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* 1.2GHz operation point here. |
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*/ |
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operating-points = < |
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/* kHz uV */ |
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996000 1250000 |
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852000 1250000 |
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792000 1175000 |
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396000 975000 |
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>; |
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fsl,soc-operating-points = < |
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/* ARM kHz SOC-PU uV */ |
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996000 1250000 |
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852000 1250000 |
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792000 1175000 |
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396000 1175000 |
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>; |
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}; |
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&ecspi1 { |
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cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio3 19 GPIO_ACTIVE_HIGH>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_ecspi1>; |
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status = "okay"; |
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m25p80@0 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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compatible = "st,m25p", "jedec,spi-nor"; |
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spi-max-frequency = <20000000>; |
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reg = <0>; |
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}; |
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}; |
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&fec { |
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@ -46,70 +189,215 @@ |
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status = "okay"; |
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}; |
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&i2c3 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c3>; |
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status = "okay"; |
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clock-frequency = <100000>; |
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eeprom@50 { |
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compatible = "atmel,24c02"; |
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reg = <0x50>; |
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pagesize = <16>; |
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}; |
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wm8731: codec@1a { |
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#sound-dai-cells = <0>; |
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compatible = "wlf,wm8731"; |
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reg = <0x1a>; |
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}; |
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}; |
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&iomuxc { |
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imx6q-cm-fx6 { |
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pinctrl_enet: enetgrp { |
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fsl,pins = < |
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 |
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 |
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 |
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 |
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 |
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 |
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 |
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 |
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 |
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 |
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 |
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 |
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
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>; |
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}; |
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pinctrl_audmux: audmuxgrp { |
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fsl,pins = < |
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MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 |
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MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 |
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MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 |
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MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 |
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MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 |
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>; |
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}; |
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pinctrl_gpmi_nand: gpminandgrp { |
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fsl,pins = < |
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MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 |
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MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 |
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MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 |
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MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 |
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MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 |
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MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 |
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MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 |
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MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 |
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MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 |
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MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 |
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MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 |
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MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 |
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MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 |
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MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 |
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MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 |
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MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 |
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MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 |
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>; |
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}; |
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pinctrl_ecspi1: ecspi1grp { |
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fsl,pins = < |
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MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 |
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MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 |
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MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 |
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MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 |
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MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 |
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>; |
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}; |
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pinctrl_uart4: uart4grp { |
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fsl,pins = < |
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MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 |
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MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 |
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>; |
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}; |
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pinctrl_enet: enetgrp { |
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fsl,pins = < |
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
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>; |
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}; |
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pinctrl_gpmi_nand: gpminandgrp { |
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fsl,pins = < |
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MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 |
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MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 |
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MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 |
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MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 |
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MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 |
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MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 |
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MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 |
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MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 |
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MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 |
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MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 |
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MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 |
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MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 |
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MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 |
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MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 |
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MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 |
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MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 |
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MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 |
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>; |
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}; |
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pinctrl_i2c3: i2c3grp { |
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fsl,pins = < |
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MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 |
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MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 |
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>; |
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}; |
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pinctrl_pcie: pciegrp { |
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fsl,pins = < |
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MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 |
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MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1 |
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>; |
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}; |
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pinctrl_pwrseq: pwrseqgrp { |
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fsl,pins = < |
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MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 |
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MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0 |
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>; |
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}; |
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pinctrl_spdif: spdifgrp { |
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fsl,pins = < |
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MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 |
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MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 |
|
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>; |
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}; |
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pinctrl_uart4: uart4grp { |
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fsl,pins = < |
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MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 |
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MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 |
|
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>; |
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}; |
|
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|
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pinctrl_usbh1: usbh1grp { |
|
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fsl,pins = < |
|
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MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1 |
|
|
|
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>; |
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}; |
|
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|
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pinctrl_usbotg: usbotggrp { |
|
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fsl,pins = < |
|
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MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 |
|
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MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0 |
|
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|
|
>; |
|
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}; |
|
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pinctrl_usdhc1: usdhc1grp { |
|
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fsl,pins = < |
|
|
|
|
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 |
|
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|
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 |
|
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MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 |
|
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|
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 |
|
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|
|
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 |
|
|
|
|
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 |
|
|
|
|
>; |
|
|
|
|
}; |
|
|
|
|
}; |
|
|
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|
|
|
|
|
|
&pcie { |
|
|
|
|
pinctrl-names = "default"; |
|
|
|
|
pinctrl-0 = <&pinctrl_pcie>; |
|
|
|
|
reset-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>; |
|
|
|
|
vpcie-supply = <®_pcie_power_on_gpio>; |
|
|
|
|
status = "okay"; |
|
|
|
|
}; |
|
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|
|
|
|
|
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&sata { |
|
|
|
|
status = "okay"; |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
&snvs_poweroff { |
|
|
|
|
status = "okay"; |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
&spdif { |
|
|
|
|
pinctrl-names = "default"; |
|
|
|
|
pinctrl-0 = <&pinctrl_spdif>; |
|
|
|
|
status = "okay"; |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
&ssi2 { |
|
|
|
|
assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>, |
|
|
|
|
<&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>; |
|
|
|
|
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>; |
|
|
|
|
assigned-clock-rates = <0>, <786432000>; |
|
|
|
|
status = "okay"; |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
&uart4 { |
|
|
|
|
pinctrl-names = "default"; |
|
|
|
|
pinctrl-0 = <&pinctrl_uart4>; |
|
|
|
|
status = "okay"; |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
&sata { |
|
|
|
|
&usbh1 { |
|
|
|
|
vbus-supply = <®_usb_h1_vbus>; |
|
|
|
|
pinctrl-names = "default"; |
|
|
|
|
pinctrl-0 = <&pinctrl_usbh1>; |
|
|
|
|
status = "okay"; |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
&usbotg { |
|
|
|
|
vbus-supply = <®_usb_otg_vbus>; |
|
|
|
|
pinctrl-names = "default"; |
|
|
|
|
pinctrl-0 = <&pinctrl_usbotg>; |
|
|
|
|
dr_mode = "otg"; |
|
|
|
|
status = "okay"; |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
&usdhc1 { |
|
|
|
|
pinctrl-names = "default"; |
|
|
|
|
pinctrl-0 = <&pinctrl_usdhc1>; |
|
|
|
|
mmc-pwrseq = <&awnh387_pwrseq>; |
|
|
|
|
non-removable; |
|
|
|
|
/* |
|
|
|
|
* If the OS probes the Bluetooth AMP function advertised on this bus |
|
|
|
|
* but the firmware in place does not support it, the WiFi/BT module |
|
|
|
|
* gets unresponsive. |
|
|
|
|
* Users who configured their OS properly can enable this node to gain |
|
|
|
|
* WiFi and/or plain Bluetooth support. |
|
|
|
|
*/ |
|
|
|
|
status = "disabled"; |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
/* The U-Boot: enable usdhc3 for mmc boot */ |
|
|
|
|
&usdhc3 { |
|
|
|
|
status = "okay"; |
|
|
|
|
}; |
|
|
|
|
|
Tom Rini
7 years ago