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ARM: remove broken "lart" board.

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Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Alex Züpke <azu@sysgo.de>
master
Wolfgang Denk 14 years ago
parent c1f8750f9f
commit 3d57573986
10 changed files with 1 additions and 1062 deletions
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  1. 4
      MAINTAINERS
  2. 51
      board/lart/Makefile
  3. 23
      board/lart/config.mk
  4. 476
      board/lart/flash.c
  5. 177
      board/lart/flashasm.S
  6. 76
      board/lart/lart.c
  7. 94
      board/lart/lowlevel_init.S
  8. 1
      boards.cfg
  9. 1
      doc/README.scrapyard
  10. 160
      include/configs/lart.h

4
MAINTAINERS
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@ -891,10 +891,6 @@ Richard Woodruff <r-woodruff2@ti.com>
omap2420h4 ARM1136EJS
Alex Züpke <azu@sysgo.de>
lart SA1100
Syed Mohammed Khasim <sm.khasim@gmail.com>
Sughosh Ganu <urwithsughosh@gmail.com>

51
board/lart/Makefile
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#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
COBJS := lart.o flash.o
SOBJS := flashasm.o lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

23
board/lart/config.mk
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#
# LART board with SA1100 cpu
#
# see http://www.lart.tudelft.nl/ for more information on LART
#
#
# LART has 4 banks of 8 MB DRAM
#
# c000'0000
# c100'0000
# c800'0000
# c900'0000
#
# Linux-Kernel is expected to be at c000'8000, entry c000'8000
#
# we load ourself to c178'0000, the upper 1 MB of second bank
#
# download areas is c800'0000
#
CONFIG_SYS_TEXT_BASE = 0xc1780000

476
board/lart/flash.c
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/*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
ulong myflush(void);
#define FLASH_BANK_SIZE 0x800000
#define MAIN_SECT_SIZE 0x20000
#define PARAM_SECT_SIZE 0x4000
/* puzzle magic for lart
* data_*_flash are def'd in flashasm.S
*/
extern u32 data_from_flash(u32);
extern u32 data_to_flash(u32);
#define PUZZLE_FROM_FLASH(x) data_from_flash((x))
#define PUZZLE_TO_FLASH(x) data_to_flash((x))
flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
#define CMD_READ_ARRAY 0x00FF00FF
#define CMD_IDENTIFY 0x00900090
#define CMD_ERASE_SETUP 0x00200020
#define CMD_ERASE_CONFIRM 0x00D000D0
#define CMD_PROGRAM 0x00400040
#define CMD_RESUME 0x00D000D0
#define CMD_SUSPEND 0x00B000B0
#define CMD_STATUS_READ 0x00700070
#define CMD_STATUS_RESET 0x00500050
#define BIT_BUSY 0x00800080
#define BIT_ERASE_SUSPEND 0x00400040
#define BIT_ERASE_ERROR 0x00200020
#define BIT_PROGRAM_ERROR 0x00100010
#define BIT_VPP_RANGE_ERROR 0x00080008
#define BIT_PROGRAM_SUSPEND 0x00040004
#define BIT_PROTECT_ERROR 0x00020002
#define BIT_UNDEFINED 0x00010001
#define BIT_SEQUENCE_ERROR 0x00300030
#define BIT_TIMEOUT 0x80000000
/*-----------------------------------------------------------------------
*/
ulong flash_init(void)
{
int i, j;
ulong size = 0;
for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
{
ulong flashbase = 0;
flash_info[i].flash_id =
(INTEL_MANUFACT & FLASH_VENDMASK) |
(INTEL_ID_28F160F3B & FLASH_TYPEMASK);
flash_info[i].size = FLASH_BANK_SIZE;
flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
if (i == 0)
flashbase = PHYS_FLASH_1;
else
panic("configured too many flash banks!\n");
for (j = 0; j < flash_info[i].sector_count; j++)
{
if (j <= 7)
{
flash_info[i].start[j] = flashbase + j * PARAM_SECT_SIZE;
}
else
{
flash_info[i].start[j] = flashbase + (j - 7)*MAIN_SECT_SIZE;
}
}
size += flash_info[i].size;
}
/* Protect monitor and environment sectors
*/
flash_protect(FLAG_PROTECT_SET,
CONFIG_SYS_FLASH_BASE,
CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
&flash_info[0]);
flash_protect(FLAG_PROTECT_SET,
CONFIG_ENV_ADDR,
CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
&flash_info[0]);
return size;
}
/*-----------------------------------------------------------------------
*/
void flash_print_info (flash_info_t *info)
{
int i;
switch (info->flash_id & FLASH_VENDMASK)
{
case (INTEL_MANUFACT & FLASH_VENDMASK):
printf("Intel: ");
break;
default:
printf("Unknown Vendor ");
break;
}
switch (info->flash_id & FLASH_TYPEMASK)
{
case (INTEL_ID_28F160F3B & FLASH_TYPEMASK):
printf("2x 28F160F3B (16Mbit)\n");
break;
default:
printf("Unknown Chip Type\n");
goto Done;
break;
}
printf(" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
printf(" Sector Start Addresses:");
for (i = 0; i < info->sector_count; i++)
{
if ((i % 5) == 0)
{
printf ("\n ");
}
printf (" %08lX%s", info->start[i],
info->protect[i] ? " (RO)" : " ");
}
printf ("\n");
Done:
;
}
/*-----------------------------------------------------------------------
*/
int flash_error (ulong code)
{
/* Check bit patterns */
/* SR.7=0 is busy, SR.7=1 is ready */
/* all other flags indicate error on 1 */
/* SR.0 is undefined */
/* Timeout is our faked flag */
/* sequence is described in Intel 290644-005 document */
/* check Timeout */
if (code & BIT_TIMEOUT)
{
printf ("Timeout\n");
return ERR_TIMOUT;
}
/* check Busy, SR.7 */
if (~code & BIT_BUSY)
{
printf ("Busy\n");
return ERR_PROG_ERROR;
}
/* check Vpp low, SR.3 */
if (code & BIT_VPP_RANGE_ERROR)
{
printf ("Vpp range error\n");
return ERR_PROG_ERROR;
}
/* check Device Protect Error, SR.1 */
if (code & BIT_PROTECT_ERROR)
{
printf ("Device protect error\n");
return ERR_PROG_ERROR;
}
/* check Command Seq Error, SR.4 & SR.5 */
if (code & BIT_SEQUENCE_ERROR)
{
printf ("Command seqence error\n");
return ERR_PROG_ERROR;
}
/* check Block Erase Error, SR.5 */
if (code & BIT_ERASE_ERROR)
{
printf ("Block erase error\n");
return ERR_PROG_ERROR;
}
/* check Program Error, SR.4 */
if (code & BIT_PROGRAM_ERROR)
{
printf ("Program error\n");
return ERR_PROG_ERROR;
}
/* check Block Erase Suspended, SR.6 */
if (code & BIT_ERASE_SUSPEND)
{
printf ("Block erase suspended\n");
return ERR_PROG_ERROR;
}
/* check Program Suspended, SR.2 */
if (code & BIT_PROGRAM_SUSPEND)
{
printf ("Program suspended\n");
return ERR_PROG_ERROR;
}
/* OK, no error */
return ERR_OK;
}
/*-----------------------------------------------------------------------
*/
int flash_erase (flash_info_t *info, int s_first, int s_last)
{
ulong result;
int iflag, cflag, prot, sect;
int rc = ERR_OK;
ulong start;
/* first look for protection bits */
if (info->flash_id == FLASH_UNKNOWN)
return ERR_UNKNOWN_FLASH_TYPE;
if ((s_first < 0) || (s_first > s_last)) {
return ERR_INVAL;
}
if ((info->flash_id & FLASH_VENDMASK) !=
(INTEL_MANUFACT & FLASH_VENDMASK)) {
return ERR_UNKNOWN_FLASH_VENDOR;
}
prot = 0;
for (sect=s_first; sect<=s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
}
if (prot)
return ERR_PROTECTED;
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
cflag = icache_status();
icache_disable();
iflag = disable_interrupts();
/* Start erase on unprotected sectors */
for (sect = s_first; sect<=s_last && !ctrlc(); sect++)
{
printf("Erasing sector %2d ... ", sect);
/* arm simple, non interrupt dependent timer */
start = get_timer(0);
if (info->protect[sect] == 0)
{ /* not protected */
vu_long *addr = (vu_long *)(info->start[sect]);
*addr = PUZZLE_TO_FLASH(CMD_STATUS_RESET);
*addr = PUZZLE_TO_FLASH(CMD_ERASE_SETUP);
*addr = PUZZLE_TO_FLASH(CMD_ERASE_CONFIRM);
/* wait until flash is ready */
do
{
/* check timeout */
if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT)
{
*addr = PUZZLE_TO_FLASH(CMD_SUSPEND);
result = BIT_TIMEOUT;
break;
}
result = PUZZLE_FROM_FLASH(*addr);
} while (~result & BIT_BUSY);
*addr = PUZZLE_TO_FLASH(CMD_READ_ARRAY);
if ((rc = flash_error(result)) != ERR_OK)
goto outahere;
printf("ok.\n");
}
else /* it was protected */
{
printf("protected!\n");
}
}
if (ctrlc())
printf("User Interrupt!\n");
outahere:
/* allow flash to settle - wait 10 ms */
udelay_masked(10000);
if (iflag)
enable_interrupts();
if (cflag)
icache_enable();
return rc;
}
/*-----------------------------------------------------------------------
* Copy memory to flash
*/
static int write_word (flash_info_t *info, ulong dest, ulong data)
{
vu_long *addr = (vu_long *)dest;
ulong result;
int rc = ERR_OK;
int cflag, iflag;
ulong start;
/* Check if Flash is (sufficiently) erased
*/
result = PUZZLE_FROM_FLASH(*addr);
if ((result & data) != data)
return ERR_NOT_ERASED;
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
cflag = icache_status();
icache_disable();
iflag = disable_interrupts();
*addr = PUZZLE_TO_FLASH(CMD_STATUS_RESET);
*addr = PUZZLE_TO_FLASH(CMD_PROGRAM);
*addr = data;
/* arm simple, non interrupt dependent timer */
start = get_timer(0);
/* wait until flash is ready */
do
{
/* check timeout */
if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT)
{
*addr = PUZZLE_TO_FLASH(CMD_SUSPEND);
result = BIT_TIMEOUT;
break;
}
result = PUZZLE_FROM_FLASH(*addr);
} while (~result & BIT_BUSY);
*addr = PUZZLE_TO_FLASH(CMD_READ_ARRAY);
rc = flash_error(result);
if (iflag)
enable_interrupts();
if (cflag)
icache_enable();
return rc;
}
/*-----------------------------------------------------------------------
* Copy memory to flash.
*/
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
{
ulong cp, wp, data;
int l;
int i, rc;
wp = (addr & ~3); /* get lower word aligned address */
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
data = 0;
for (i=0, cp=wp; i<l; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 24);
}
for (; i<4 && cnt>0; ++i) {
data = (data >> 8) | (*src++ << 24);
--cnt;
++cp;
}
for (; cnt==0 && i<4; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 24);
}
if ((rc = write_word(info, wp, data)) != 0) {
return (rc);
}
wp += 4;
}
/*
* handle word aligned part
*/
while (cnt >= 4) {
data = *((vu_long*)src);
if ((rc = write_word(info, wp, data)) != 0) {
return (rc);
}
src += 4;
wp += 4;
cnt -= 4;
}
if (cnt == 0) {
return ERR_OK;
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
data = (data >> 8) | (*src++ << 24);
--cnt;
}
for (; i<4; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 24);
}
return write_word(info, wp, data);
}

177
board/lart/flashasm.S
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/*
* flashasm.S: flash magic for LART
*
* Copyright (C) 1999 2000 2001 Jan-Derk bakker (J.D.Bakker@its.tudelft.nl)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
.text
.globl data_to_flash
.globl data_from_flash
/* Subroutine that takes data in r0 and formats it so it will be in */
/* the correct order for the internal flash */
/* used for LART only */
data_to_flash:
mov r1, #0x0
tst r0, #0x00000001
orrne r1, r1, #0x00001000
tst r0, #0x00000002
orrne r1, r1, #0x00004000
tst r0, #0x00000004
orrne r1, r1, #0x00000800
tst r0, #0x00000008
orrne r1, r1, #0x00000200
tst r0, #0x00000010
orrne r1, r1, #0x00000001
tst r0, #0x00000020
orrne r1, r1, #0x00000004
tst r0, #0x00000040
orrne r1, r1, #0x00000080
tst r0, #0x00000080
orrne r1, r1, #0x00000020
tst r0, #0x00000100
orrne r1, r1, #0x00002000
tst r0, #0x00000200
orrne r1, r1, #0x00008000
tst r0, #0x00000400
orrne r1, r1, #0x00000400
tst r0, #0x00000800
orrne r1, r1, #0x00000100
tst r0, #0x00001000
orrne r1, r1, #0x00000002
tst r0, #0x00002000
orrne r1, r1, #0x00000008
tst r0, #0x00004000
orrne r1, r1, #0x00000040
tst r0, #0x00008000
orrne r1, r1, #0x00000010
tst r0, #0x00010000
orrne r1, r1, #0x00100000
tst r0, #0x00020000
orrne r1, r1, #0x00400000
tst r0, #0x00040000
orrne r1, r1, #0x00080000
tst r0, #0x00080000
orrne r1, r1, #0x00020000
tst r0, #0x00100000
orrne r1, r1, #0x01000000
tst r0, #0x00200000
orrne r1, r1, #0x04000000
tst r0, #0x00400000
orrne r1, r1, #0x80000000
tst r0, #0x00800000
orrne r1, r1, #0x20000000
tst r0, #0x01000000
orrne r1, r1, #0x00200000
tst r0, #0x02000000
orrne r1, r1, #0x00800000
tst r0, #0x04000000
orrne r1, r1, #0x00040000
tst r0, #0x08000000
orrne r1, r1, #0x00010000
tst r0, #0x10000000
orrne r1, r1, #0x02000000
tst r0, #0x20000000
orrne r1, r1, #0x08000000
tst r0, #0x40000000
orrne r1, r1, #0x40000000
tst r0, #0x80000000
orrne r1, r1, #0x10000000
mov r0, r1
mov pc, lr
/* Takes data received from the flash, and unshuffles it. */
data_from_flash:
mov r1, #0x00
tst r0, #0x00000001
orrne r1, r1, #0x00000010
tst r0, #0x00000002
orrne r1, r1, #0x00001000
tst r0, #0x00000004
orrne r1, r1, #0x00000020
tst r0, #0x00000008
orrne r1, r1, #0x00002000
tst r0, #0x00000010
orrne r1, r1, #0x00008000
tst r0, #0x00000020
orrne r1, r1, #0x00000080
tst r0, #0x00000040
orrne r1, r1, #0x00004000
tst r0, #0x00000080
orrne r1, r1, #0x00000040
tst r0, #0x00000100
orrne r1, r1, #0x00000800
tst r0, #0x00000200
orrne r1, r1, #0x00000008
tst r0, #0x00000400
orrne r1, r1, #0x00000400
tst r0, #0x00000800
orrne r1, r1, #0x00000004
tst r0, #0x00001000
orrne r1, r1, #0x00000001
tst r0, #0x00002000
orrne r1, r1, #0x00000100
tst r0, #0x00004000
orrne r1, r1, #0x00000002
tst r0, #0x00008000
orrne r1, r1, #0x00000200
tst r0, #0x00010000
orrne r1, r1, #0x08000000
tst r0, #0x00020000
orrne r1, r1, #0x00080000
tst r0, #0x00040000
orrne r1, r1, #0x04000000
tst r0, #0x00080000
orrne r1, r1, #0x00040000
tst r0, #0x00100000
orrne r1, r1, #0x00010000
tst r0, #0x00200000
orrne r1, r1, #0x01000000
tst r0, #0x00400000
orrne r1, r1, #0x00020000
tst r0, #0x00800000
orrne r1, r1, #0x02000000
tst r0, #0x01000000
orrne r1, r1, #0x00100000
tst r0, #0x02000000
orrne r1, r1, #0x10000000
tst r0, #0x04000000
orrne r1, r1, #0x00200000
tst r0, #0x08000000
orrne r1, r1, #0x20000000
tst r0, #0x10000000
orrne r1, r1, #0x80000000
tst r0, #0x20000000
orrne r1, r1, #0x00800000
tst r0, #0x40000000
orrne r1, r1, #0x40000000
tst r0, #0x80000000
orrne r1, r1, #0x00400000
mov r0, r1
mov pc, lr

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board/lart/lart.c
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/*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/*
* Miscelaneous platform dependent initialisations
*/
int board_init (void)
{
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
/* arch number of LART-Board */
gd->bd->bi_arch_number = MACH_TYPE_LART;
/* adress of boot parameters */
gd->bd->bi_boot_params = 0xc0000100;
return 0;
}
int dram_init (void)
{
bd_t *bd = gd->bd;
bd->bi_dram[0].start = PHYS_SDRAM_1;
bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
bd->bi_dram[1].start = PHYS_SDRAM_2;
bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
bd->bi_dram[2].start = PHYS_SDRAM_3;
bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
bd->bi_dram[3].start = PHYS_SDRAM_4;
bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
return (0);
}
#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_CS8900
rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
#endif
return rc;
}
#endif

94
board/lart/lowlevel_init.S
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/*
* Memory Setup stuff - taken from blob memsetup.S
*
* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
* Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <version.h>
/* some parameters for the board */
MEM_BASE: .long 0xa0000000
MEM_START: .long 0xc0000000
#define MDCNFG 0x00
#define MDCAS0 0x04
#define MDCAS1 0x08
#define MDCAS2 0x0c
#define MSC0 0x10
#define MSC1 0x14
#define MECR 0x18
mdcas0: .long 0xc71c703f
mdcas1: .long 0xffc71c71
mdcas2: .long 0xffffffff
/* mdcnfg: .long 0x0bb2bcbf */
mdcnfg: .long 0x0334b22f @ alt
/* mcs0: .long 0xfff8fff8 */
msc0: .long 0xad8c4888 @ alt
mecr: .long 0x00060006
/* mecr: .long 0x994a994a @ alt */
/* setting up the memory */
.globl lowlevel_init
lowlevel_init:
ldr r0, MEM_BASE
/* Setup the flash memory */
ldr r1, msc0
str r1, [r0, #MSC0]
/* Set up the DRAM */
/* MDCAS0 */
ldr r1, mdcas0
str r1, [r0, #MDCAS0]
/* MDCAS1 */
ldr r1, mdcas1
str r1, [r0, #MDCAS1]
/* MDCAS2 */
ldr r1, mdcas2
str r1, [r0, #MDCAS2]
/* MDCNFG */
ldr r1, mdcnfg
str r1, [r0, #MDCNFG]
/* Set up PCMCIA space */
ldr r1, mecr
str r1, [r0, #MECR]
/* Load something to activate bank */
ldr r1, MEM_START
.rept 8
ldr r0, [r1]
.endr
/* everything is fine now */
mov pc, lr

1
boards.cfg
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@ -219,7 +219,6 @@ xm250 arm pxa
zipitz2 arm pxa
zylonite arm pxa
jornada arm sa1100
lart arm sa1100
shannon arm sa1100
atngw100 avr32 at32ap - atmel at32ap700x
atstk1002 avr32 at32ap atstk1000 atmel at32ap700x

1
doc/README.scrapyard
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@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
Board Arch CPU removed Commit last known maintainer/contact
=============================================================================
lart arm sa1100 - 2011-09-05 Alex Züpke <azu@sysgo.de>
impa7 arm arm720t - 2011-09-05 Marius Gröger <mag@sysgo.de>
gcplus arm sa1100 - 2011-09-05 George G. Davis <gdavis@mvista.com>
evb4510 arm arm720t - 2011-09-05 Curt Brune <curt@cucy.com>

160
include/configs/lart.h
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@ -1,160 +0,0 @@
/*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* Configuation settings for the LART board.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_SA1100 1 /* This is an SA1100 CPU */
#define CONFIG_LART 1 /* on an LART Board */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
/* we will never enable dcache, because we have to setup MMU first */
#define CONFIG_SYS_DCACHE_OFF
/*
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
/*
* Hardware drivers
*/
#define CONFIG_NET_MULTI
#define CONFIG_CS8900 /* we have a CS8900 on-board */
#define CONFIG_CS8900_BASE 0x20008300
#define CONFIG_CS8900_BUS16
/*
* select serial console configuration
*/
#define CONFIG_SA1100_SERIAL
#define CONFIG_SERIAL3 1 /* we use SERIAL 3 on LART */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE 9600
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
#include <config_cmd_default.h>
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600"
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
#define CONFIG_NETMASK 255.255.0.0
#define CONFIG_IPADDR 172.22.2.131
#define CONFIG_SERVERIP 172.22.2.126
#define CONFIG_BOOTFILE "elinos-lart"
#define CONFIG_BOOTCOMMAND "tftp; bootm"
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT "LART # " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR 0xc8000000 /* default load address */
#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
#define CONFIG_SYS_CPUSPEED 0x0b /* set core clock to 220 MHz */
/* valid baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/*-----------------------------------------------------------------------
* Stack sizes
*
* The stack sizes are set up in start.S using the settings below
*/
#define CONFIG_STACKSIZE (128*1024) /* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
#endif
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */
#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */
#define PHYS_SDRAM_2 0xc1000000 /* SDRAM Bank #2 */
#define PHYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */
#define PHYS_SDRAM_3 0xc8000000 /* SDRAM Bank #3 */
#define PHYS_SDRAM_3_SIZE 0x00800000 /* 8 MB */
#define PHYS_SDRAM_4 0xc9000000 /* SDRAM Bank #4 */
#define PHYS_SDRAM_4_SIZE 0x00800000 /* 8 MB */
#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
#define PHYS_FLASH_SIZE 0x00400000 /* 4 MB */
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT (31+8) /* max number of sectors on one chip */
/* timeout values are in ticks */
#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
#endif /* __CONFIG_H */
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