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ARM: dts: uniphier: sync DT with Linux 4.17-rc1

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Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
lime2-spi
Masahiro Yamada 7 years ago
parent 34b3722e38
commit 3e98fc1236
25 changed files with 925 additions and 206 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 109
      arch/arm/dts/uniphier-ld11-global.dts
  2. 25
      arch/arm/dts/uniphier-ld11-ref.dts
  3. 127
      arch/arm/dts/uniphier-ld11.dtsi
  4. 111
      arch/arm/dts/uniphier-ld20-global.dts
  5. 25
      arch/arm/dts/uniphier-ld20-ref.dts
  6. 138
      arch/arm/dts/uniphier-ld20.dtsi
  7. 14
      arch/arm/dts/uniphier-ld4-ref.dts
  8. 14
      arch/arm/dts/uniphier-ld4.dtsi
  9. 25
      arch/arm/dts/uniphier-ld6b-ref.dts
  10. 14
      arch/arm/dts/uniphier-ld6b.dtsi
  11. 64
      arch/arm/dts/uniphier-pinctrl.dtsi
  12. 25
      arch/arm/dts/uniphier-pro4-ace.dts
  13. 25
      arch/arm/dts/uniphier-pro4-ref.dts
  14. 25
      arch/arm/dts/uniphier-pro4-sanji.dts
  15. 32
      arch/arm/dts/uniphier-pro4.dtsi
  16. 14
      arch/arm/dts/uniphier-pro5.dtsi
  17. 49
      arch/arm/dts/uniphier-pxs2-gentil.dts
  18. 62
      arch/arm/dts/uniphier-pxs2-vodka.dts
  19. 89
      arch/arm/dts/uniphier-pxs2.dtsi
  20. 36
      arch/arm/dts/uniphier-pxs3-ref.dts
  21. 52
      arch/arm/dts/uniphier-pxs3.dtsi
  22. 14
      arch/arm/dts/uniphier-ref-daughter.dtsi
  23. 14
      arch/arm/dts/uniphier-sld8-ref.dts
  24. 14
      arch/arm/dts/uniphier-sld8.dtsi
  25. 14
      arch/arm/dts/uniphier-support-card.dtsi

109
arch/arm/dts/uniphier-ld11-global.dts
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@ -1,14 +1,13 @@
/*
* Device Tree Source for UniPhier LD11 Global Board
*
* Copyright (C) 2016-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
* Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier LD11 Global Board
//
// Copyright (C) 2016-2017 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
// Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
/dts-v1/;
#include <dt-bindings/gpio/uniphier-gpio.h>
#include "uniphier-ld11.dtsi"
/ {
@ -37,6 +36,53 @@
device_type = "memory";
reg = <0 0x80000000 0 0x40000000>;
};
dvdd_reg: reg-fixed {
compatible = "regulator-fixed";
regulator-name = "DVDD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
amp_vcc_reg: reg-fixed {
compatible = "regulator-fixed";
regulator-name = "AMP_VCC";
regulator-min-microvolt = <24000000>;
regulator-max-microvolt = <24000000>;
};
sound {
compatible = "audio-graph-card";
label = "UniPhier LD11";
widgets = "Headphone", "Headphone Jack";
dais = <&i2s_port2
&i2s_port3
&i2s_port4
&spdif_port0
&comp_spdif_port0>;
};
spdif-out {
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
port@0 {
spdif_tx: endpoint {
remote-endpoint = <&spdif_hiecout1>;
};
};
};
comp-spdif-out {
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
port@0 {
comp_spdif_tx: endpoint {
remote-endpoint = <&comp_spdif_hiecout1>;
};
};
};
};
&serial0 {
@ -47,9 +93,43 @@
status = "okay";
};
&i2s_hpcmout1 {
dai-format = "i2s";
remote-endpoint = <&tas_speaker>;
};
&spdif_hiecout1 {
remote-endpoint = <&spdif_tx>;
};
&comp_spdif_hiecout1 {
remote-endpoint = <&comp_spdif_tx>;
};
&i2c0 {
status = "okay";
tas5707a@1d {
compatible = "ti,tas5711";
reg = <0x1d>;
reset-gpios = <&gpio UNIPHIER_GPIO_PORT(23, 4) GPIO_ACTIVE_LOW>;
pdn-gpios = <&gpio UNIPHIER_GPIO_PORT(23, 5) GPIO_ACTIVE_LOW>;
#sound-dai-cells = <0>;
AVDD-supply = <&dvdd_reg>;
DVDD-supply = <&dvdd_reg>;
PVDD_A-supply = <&amp_vcc_reg>;
PVDD_B-supply = <&amp_vcc_reg>;
PVDD_C-supply = <&amp_vcc_reg>;
PVDD_D-supply = <&amp_vcc_reg>;
port@0 {
tas_speaker: endpoint {
dai-format = "i2s";
remote-endpoint = <&i2s_hpcmout1>;
};
};
};
eeprom@50 {
compatible = "st,24c64", "atmel,24c64", "i2c-eeprom";
reg = <0x50>;
@ -69,6 +149,17 @@
status = "okay";
};
&eth {
status = "okay";
phy-handle = <&ethphy>;
};
&mdio {
ethphy: ethphy@1 {
reg = <1>;
};
};
&nand {
status = "okay";
};

25
arch/arm/dts/uniphier-ld11-ref.dts
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier LD11 Reference Board
*
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier LD11 Reference Board
//
// Copyright (C) 2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-ld11.dtsi"
@ -70,3 +68,14 @@
&usb2 {
status = "okay";
};
&eth {
status = "okay";
phy-handle = <&ethphy>;
};
&mdio {
ethphy: ethphy@1 {
reg = <1>;
};
};

127
arch/arm/dts/uniphier-ld11.dtsi
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier LD11 SoC
*
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier LD11 SoC
//
// Copyright (C) 2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/uniphier-gpio.h>
@ -191,6 +189,92 @@
<21 217 3>;
};
audio@56000000 {
compatible = "socionext,uniphier-ld11-aio";
reg = <0x56000000 0x80000>;
interrupts = <0 144 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_aout1>,
<&pinctrl_aoutiec1>;
clock-names = "aio";
clocks = <&sys_clk 40>;
reset-names = "aio";
resets = <&sys_rst 40>;
#sound-dai-cells = <1>;
socionext,syscon = <&soc_glue>;
i2s_port0: port@0 {
i2s_hdmi: endpoint {
};
};
i2s_port1: port@1 {
i2s_pcmin2: endpoint {
};
};
i2s_port2: port@2 {
i2s_line: endpoint {
dai-format = "i2s";
remote-endpoint = <&evea_line>;
};
};
i2s_port3: port@3 {
i2s_hpcmout1: endpoint {
};
};
i2s_port4: port@4 {
i2s_hp: endpoint {
dai-format = "i2s";
remote-endpoint = <&evea_hp>;
};
};
spdif_port0: port@5 {
spdif_hiecout1: endpoint {
};
};
src_port0: port@6 {
i2s_epcmout2: endpoint {
};
};
src_port1: port@7 {
i2s_epcmout3: endpoint {
};
};
comp_spdif_port0: port@8 {
comp_spdif_hiecout1: endpoint {
};
};
};
codec@57900000 {
compatible = "socionext,uniphier-evea";
reg = <0x57900000 0x1000>;
clock-names = "evea", "exiv";
clocks = <&sys_clk 41>, <&sys_clk 42>;
reset-names = "evea", "exiv", "adamv";
resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>;
#sound-dai-cells = <1>;
port@0 {
evea_line: endpoint {
remote-endpoint = <&i2s_line>;
};
};
port@1 {
evea_hp: endpoint {
remote-endpoint = <&i2s_hp>;
};
};
};
adamv@57920000 {
compatible = "socionext,uniphier-ld11-adamv",
"simple-mfd", "syscon";
@ -400,7 +484,7 @@
};
};
soc-glue@5f800000 {
soc_glue: soc-glue@5f800000 {
compatible = "socionext,uniphier-ld11-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
@ -464,6 +548,22 @@
};
};
eth: ethernet@65000000 {
compatible = "socionext,uniphier-ld11-ave4";
status = "disabled";
reg = <0x65000000 0x8500>;
interrupts = <0 66 4>;
clocks = <&sys_clk 6>;
resets = <&sys_rst 6>;
phy-mode = "rmii";
local-mac-address = [00 00 00 00 00 00];
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
};
};
nand: nand@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
@ -479,3 +579,12 @@
};
#include "uniphier-pinctrl.dtsi"
&pinctrl_aoutiec1 {
drive-strength = <4>; /* default: 4mA */
ao1arc {
pins = "AO1ARC";
drive-strength = <8>; /* 8mA */
};
};

111
arch/arm/dts/uniphier-ld20-global.dts
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@ -1,14 +1,13 @@
/*
* Device Tree Source for UniPhier LD20 Global Board
*
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
* Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier LD20 Global Board
//
// Copyright (C) 2015-2017 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
// Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
/dts-v1/;
#include <dt-bindings/gpio/uniphier-gpio.h>
#include "uniphier-ld20.dtsi"
/ {
@ -37,6 +36,53 @@
device_type = "memory";
reg = <0 0x80000000 0 0xc0000000>;
};
dvdd_reg: reg-fixed {
compatible = "regulator-fixed";
regulator-name = "DVDD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
amp_vcc_reg: reg-fixed {
compatible = "regulator-fixed";
regulator-name = "AMP_VCC";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
sound {
compatible = "audio-graph-card";
label = "UniPhier LD20";
widgets = "Headphone", "Headphone Jack";
dais = <&i2s_port2
&i2s_port3
&i2s_port4
&spdif_port0
&comp_spdif_port0>;
};
spdif-out {
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
port@0 {
spdif_tx: endpoint {
remote-endpoint = <&spdif_hiecout1>;
};
};
};
comp-spdif-out {
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
port@0 {
comp_spdif_tx: endpoint {
remote-endpoint = <&comp_spdif_hiecout1>;
};
};
};
};
&serial0 {
@ -47,8 +93,55 @@
status = "okay";
};
&i2s_hpcmout1 {
dai-format = "i2s";
remote-endpoint = <&tas_speaker>;
};
&spdif_hiecout1 {
remote-endpoint = <&spdif_tx>;
};
&comp_spdif_hiecout1 {
remote-endpoint = <&comp_spdif_tx>;
};
&i2c0 {
status = "okay";
tas5707@1b {
compatible = "ti,tas5711";
reg = <0x1b>;
reset-gpios = <&gpio UNIPHIER_GPIO_PORT(0, 0) GPIO_ACTIVE_LOW>;
pdn-gpios = <&gpio UNIPHIER_GPIO_PORT(0, 1) GPIO_ACTIVE_LOW>;
#sound-dai-cells = <0>;
AVDD-supply = <&dvdd_reg>;
DVDD-supply = <&dvdd_reg>;
PVDD_A-supply = <&amp_vcc_reg>;
PVDD_B-supply = <&amp_vcc_reg>;
PVDD_C-supply = <&amp_vcc_reg>;
PVDD_D-supply = <&amp_vcc_reg>;
port@0 {
tas_speaker: endpoint {
dai-format = "i2s";
remote-endpoint = <&i2s_hpcmout1>;
};
};
};
};
&eth {
status = "okay";
phy-mode = "rmii";
pinctrl-0 = <&pinctrl_ether_rmii>;
phy-handle = <&ethphy>;
};
&mdio {
ethphy: ethphy@1 {
reg = <1>;
};
};
&nand {

25
arch/arm/dts/uniphier-ld20-ref.dts
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier LD20 Reference Board
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier LD20 Reference Board
//
// Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-ld20.dtsi"
@ -58,3 +56,14 @@
&i2c0 {
status = "okay";
};
&eth {
status = "okay";
phy-handle = <&ethphy>;
};
&mdio {
ethphy: ethphy@0 {
reg = <0>;
};
};

138
arch/arm/dts/uniphier-ld20.dtsi
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier LD20 SoC
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier LD20 SoC
//
// Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/uniphier-gpio.h>
@ -291,6 +289,92 @@
<21 217 3>;
};
audio@56000000 {
compatible = "socionext,uniphier-ld20-aio";
reg = <0x56000000 0x80000>;
interrupts = <0 144 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_aout1>,
<&pinctrl_aoutiec1>;
clock-names = "aio";
clocks = <&sys_clk 40>;
reset-names = "aio";
resets = <&sys_rst 40>;
#sound-dai-cells = <1>;
socionext,syscon = <&soc_glue>;
i2s_port0: port@0 {
i2s_hdmi: endpoint {
};
};
i2s_port1: port@1 {
i2s_pcmin2: endpoint {
};
};
i2s_port2: port@2 {
i2s_line: endpoint {
dai-format = "i2s";
remote-endpoint = <&evea_line>;
};
};
i2s_port3: port@3 {
i2s_hpcmout1: endpoint {
};
};
i2s_port4: port@4 {
i2s_hp: endpoint {
dai-format = "i2s";
remote-endpoint = <&evea_hp>;
};
};
spdif_port0: port@5 {
spdif_hiecout1: endpoint {
};
};
src_port0: port@6 {
i2s_epcmout2: endpoint {
};
};
src_port1: port@7 {
i2s_epcmout3: endpoint {
};
};
comp_spdif_port0: port@8 {
comp_spdif_hiecout1: endpoint {
};
};
};
codec@57900000 {
compatible = "socionext,uniphier-evea";
reg = <0x57900000 0x1000>;
clock-names = "evea", "exiv";
clocks = <&sys_clk 41>, <&sys_clk 42>;
reset-names = "evea", "exiv", "adamv";
resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>;
#sound-dai-cells = <1>;
port@0 {
evea_line: endpoint {
remote-endpoint = <&i2s_line>;
};
};
port@1 {
evea_hp: endpoint {
remote-endpoint = <&i2s_hp>;
};
};
};
adamv@57920000 {
compatible = "socionext,uniphier-ld20-adamv",
"simple-mfd", "syscon";
@ -460,7 +544,7 @@
cap-sd-highspeed;
};
soc-glue@5f800000 {
soc_glue: soc-glue@5f800000 {
compatible = "socionext,uniphier-ld20-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
@ -531,6 +615,24 @@
};
};
eth: ethernet@65000000 {
compatible = "socionext,uniphier-ld20-ave4";
status = "disabled";
reg = <0x65000000 0x8500>;
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
clocks = <&sys_clk 6>;
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
};
};
usb: usb@65b00000 {
compatible = "socionext,uniphier-ld20-dwc3";
reg = <0x65b00000 0x1000>;
@ -564,3 +666,21 @@
};
#include "uniphier-pinctrl.dtsi"
&pinctrl_aout1 {
drive-strength = <4>; /* default: 3.5mA */
ao1dacck {
pins = "AO1DACCK";
drive-strength = <5>; /* 5mA */
};
};
&pinctrl_aoutiec1 {
drive-strength = <4>; /* default: 3.5mA */
ao1arc {
pins = "AO1ARC";
drive-strength = <11>; /* 11mA */
};
};

14
arch/arm/dts/uniphier-ld4-ref.dts
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier LD4 Reference Board
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier LD4 Reference Board
//
// Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-ld4.dtsi"

14
arch/arm/dts/uniphier-ld4.dtsi
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier LD4 SoC
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier LD4 SoC
//
// Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/uniphier-gpio.h>

25
arch/arm/dts/uniphier-ld6b-ref.dts
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier LD6b Reference Board
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier LD6b Reference Board
//
// Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-ld6b.dtsi"
@ -71,6 +69,17 @@
status = "okay";
};
&eth {
status = "okay";
phy-handle = <&ethphy>;
};
&mdio {
ethphy: ethphy@0 {
reg = <0>;
};
};
&usb0 {
status = "okay";
};

14
arch/arm/dts/uniphier-ld6b.dtsi
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier LD6b SoC
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier LD6b SoC
//
// Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/*
* LD6b consists of two silicon dies: D-chip and A-chip.

64
arch/arm/dts/uniphier-pinctrl.dtsi
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier SoCs default pinctrl settings
*
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier SoCs default pinctrl settings
//
// Copyright (C) 2015-2017 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
&pinctrl {
pinctrl_aout: aout {
@ -13,6 +11,46 @@
function = "aout";
};
pinctrl_ain1: ain1 {
groups = "ain1";
function = "ain1";
};
pinctrl_ain2: ain2 {
groups = "ain2";
function = "ain2";
};
pinctrl_ainiec1: ainiec1 {
groups = "ainiec1";
function = "ainiec1";
};
pinctrl_aout1: aout1 {
groups = "aout1";
function = "aout1";
};
pinctrl_aout2: aout2 {
groups = "aout2";
function = "aout2";
};
pinctrl_aout3: aout3 {
groups = "aout3";
function = "aout3";
};
pinctrl_aoutiec1: aoutiec1 {
groups = "aoutiec1";
function = "aoutiec1";
};
pinctrl_aoutiec2: aoutiec2 {
groups = "aoutiec2";
function = "aoutiec2";
};
pinctrl_emmc: emmc {
groups = "emmc", "emmc_dat8";
function = "emmc";
@ -38,6 +76,16 @@
function = "ether_rmii";
};
pinctrl_ether1_rgmii: ether1-rgmii {
groups = "ether1_rgmii";
function = "ether1_rgmii";
};
pinctrl_ether1_rmii: ether1-rmii {
groups = "ether1_rmii";
function = "ether1_rmii";
};
pinctrl_i2c0: i2c0 {
groups = "i2c0";
function = "i2c0";

25
arch/arm/dts/uniphier-pro4-ace.dts
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier Pro4 Ace Board
*
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier Pro4 Ace Board
//
// Copyright (C) 2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-pro4.dtsi"
@ -83,6 +81,17 @@
status = "okay";
};
&eth {
status = "okay";
phy-handle = <&ethphy>;
};
&mdio {
ethphy: ethphy@1 {
reg = <1>;
};
};
&usb2 {
status = "okay";
};

25
arch/arm/dts/uniphier-pro4-ref.dts
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier Pro4 Reference Board
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier Pro4 Reference Board
//
// Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-pro4.dtsi"
@ -84,6 +82,17 @@
status = "okay";
};
&eth {
status = "okay";
phy-handle = <&ethphy>;
};
&mdio {
ethphy: ethphy@0 {
reg = <0>;
};
};
&usb0 {
status = "okay";
};

25
arch/arm/dts/uniphier-pro4-sanji.dts
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier Pro4 Sanji Board
*
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier Pro4 Sanji Board
//
// Copyright (C) 2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-pro4.dtsi"
@ -78,6 +76,17 @@
status = "okay";
};
&eth {
status = "okay";
phy-handle = <&ethphy>;
};
&mdio {
ethphy: ethphy@1 {
reg = <1>;
};
};
&usb2 {
status = "okay";
};

32
arch/arm/dts/uniphier-pro4.dtsi
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier Pro4 SoC
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier Pro4 SoC
//
// Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/uniphier-gpio.h>
@ -422,6 +420,24 @@
};
};
eth: ethernet@65000000 {
compatible = "socionext,uniphier-pro4-ave4";
status = "disabled";
reg = <0x65000000 0x8500>;
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
clocks = <&sys_clk 6>;
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
};
};
usb0: usb@65b00000 {
compatible = "socionext,uniphier-pro4-dwc3";
status = "disabled";

14
arch/arm/dts/uniphier-pro5.dtsi
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier Pro5 SoC
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier Pro5 SoC
//
// Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/ {
compatible = "socionext,uniphier-pro5";

49
arch/arm/dts/uniphier-pxs2-gentil.dts
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier PXs2 Gentil Board
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier PXs2 Gentil Board
//
// Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-pxs2.dtsi"
@ -34,6 +32,12 @@
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
sound {
compatible = "audio-graph-card";
label = "UniPhier PXs2";
dais = <&i2s_port2>;
};
};
&serial2 {
@ -51,14 +55,43 @@
};
};
&i2s_aux {
dai-format = "i2s";
remote-endpoint = <&wm_speaker>;
};
&i2c2 {
status = "okay";
wm8960@1a {
compatible = "wlf,wm8960";
reg = <0x1a>;
#sound-dai-cells = <0>;
port@0 {
wm_speaker: endpoint {
dai-format = "i2s";
remote-endpoint = <&i2s_aux>;
};
};
};
};
&emmc {
status = "okay";
};
&eth {
status = "okay";
phy-handle = <&ethphy>;
};
&mdio {
ethphy: ethphy@1 {
reg = <1>;
};
};
&usb0 {
status = "okay";
};

62
arch/arm/dts/uniphier-pxs2-vodka.dts
Unescape View File

@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier PXs2 Vodka Board
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier PXs2 Vodka Board
//
// Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-pxs2.dtsi"
@ -32,12 +30,49 @@
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
sound {
compatible = "audio-graph-card";
label = "UniPhier PXs2";
dais = <&spdif_port0
&comp_spdif_port0>;
};
spdif-out {
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
port@0 {
spdif_tx: endpoint {
remote-endpoint = <&spdif_hiecout1>;
};
};
};
comp-spdif-out {
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
port@0 {
comp_spdif_tx: endpoint {
remote-endpoint = <&comp_spdif_hiecout1>;
};
};
};
};
&serial2 {
status = "okay";
};
&spdif_hiecout1 {
remote-endpoint = <&spdif_tx>;
};
&comp_spdif_hiecout1 {
remote-endpoint = <&comp_spdif_tx>;
};
&i2c0 {
status = "okay";
};
@ -46,6 +81,17 @@
status = "okay";
};
&eth {
status = "okay";
phy-handle = <&ethphy>;
};
&mdio {
ethphy: ethphy@1 {
reg = <1>;
};
};
&usb0 {
status = "okay";
};

89
arch/arm/dts/uniphier-pxs2.dtsi
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier PXs2 SoC
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier PXs2 SoC
//
// Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/uniphier-gpio.h>
#include <dt-bindings/thermal/thermal.h>
@ -231,6 +229,61 @@
<21 217 3>;
};
audio@56000000 {
compatible = "socionext,uniphier-pxs2-aio";
reg = <0x56000000 0x80000>;
interrupts = <0 144 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ain1>,
<&pinctrl_ain2>,
<&pinctrl_ainiec1>,
<&pinctrl_aout2>,
<&pinctrl_aout3>,
<&pinctrl_aoutiec1>,
<&pinctrl_aoutiec2>;
clock-names = "aio";
clocks = <&sys_clk 40>;
reset-names = "aio";
resets = <&sys_rst 40>;
#sound-dai-cells = <1>;
socionext,syscon = <&soc_glue>;
i2s_port0: port@0 {
i2s_hdmi: endpoint {
};
};
i2s_port1: port@1 {
i2s_line: endpoint {
};
};
i2s_port2: port@2 {
i2s_aux: endpoint {
};
};
spdif_port0: port@3 {
spdif_hiecout1: endpoint {
};
};
spdif_port1: port@4 {
spdif_iecout1: endpoint {
};
};
comp_spdif_port0: port@5 {
comp_spdif_hiecout1: endpoint {
};
};
comp_spdif_port1: port@6 {
comp_spdif_iecout1: endpoint {
};
};
};
i2c0: i2c@58780000 {
compatible = "socionext,uniphier-fi2c";
status = "disabled";
@ -405,7 +458,7 @@
sd-uhs-sdr50;
};
soc-glue@5f800000 {
soc_glue: soc-glue@5f800000 {
compatible = "socionext,uniphier-pxs2-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
@ -485,6 +538,24 @@
};
};
eth: ethernet@65000000 {
compatible = "socionext,uniphier-pxs2-ave4";
status = "disabled";
reg = <0x65000000 0x8500>;
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
clocks = <&sys_clk 6>;
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
};
};
usb0: usb@65b00000 {
compatible = "socionext,uniphier-pxs2-dwc3";
status = "disabled";

36
arch/arm/dts/uniphier-pxs3-ref.dts
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier PXs3 Reference Board
*
* Copyright (C) 2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier PXs3 Reference Board
//
// Copyright (C) 2017 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-pxs3.dtsi"
@ -77,6 +75,28 @@
status = "okay";
};
&eth0 {
status = "okay";
phy-handle = <&ethphy0>;
};
&mdio0 {
ethphy0: ethphy@0 {
reg = <0>;
};
};
&eth1 {
status = "okay";
phy-handle = <&ethphy1>;
};
&mdio1 {
ethphy1: ethphy@0 {
reg = <0>;
};
};
&usb0 {
status = "okay";
};

52
arch/arm/dts/uniphier-pxs3.dtsi
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier PXs3 SoC
*
* Copyright (C) 2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier PXs3 SoC
//
// Copyright (C) 2017 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/uniphier-gpio.h>
@ -361,7 +359,7 @@
cap-sd-highspeed;
};
soc-glue@5f800000 {
soc_glue: soc-glue@5f800000 {
compatible = "socionext,uniphier-pxs3-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
@ -425,6 +423,42 @@
};
};
eth0: ethernet@65000000 {
compatible = "socionext,uniphier-pxs3-ave4";
status = "disabled";
reg = <0x65000000 0x8500>;
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
clocks = <&sys_clk 6>;
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
mdio0: mdio {
#address-cells = <1>;
#size-cells = <0>;
};
};
eth1: ethernet@65200000 {
compatible = "socionext,uniphier-pxs3-ave4";
status = "disabled";
reg = <0x65200000 0x8500>;
interrupts = <0 67 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether1_rgmii>;
clocks = <&sys_clk 7>;
resets = <&sys_rst 7>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
mdio1: mdio {
#address-cells = <1>;
#size-cells = <0>;
};
};
usb0: usb@65b00000 {
compatible = "socionext,uniphier-pxs3-dwc3";
status = "disabled";

14
arch/arm/dts/uniphier-ref-daughter.dtsi
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier Reference Daughter Board
*
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier Reference Daughter Board
//
// Copyright (C) 2015-2017 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
&i2c0 {
eeprom@50 {

14
arch/arm/dts/uniphier-sld8-ref.dts
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier sLD8 Reference Board
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier sLD8 Reference Board
//
// Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-sld8.dtsi"

14
arch/arm/dts/uniphier-sld8.dtsi
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier sLD8 SoC
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier sLD8 SoC
//
// Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/uniphier-gpio.h>

14
arch/arm/dts/uniphier-support-card.dtsi
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier Support Card (Expansion Board)
*
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier Support Card (Expansion Board)
//
// Copyright (C) 2015-2017 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
&system_bus {
status = "okay";

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