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@ -172,9 +172,8 @@ struct zynq_gem_priv { |
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struct mii_dev *bus; |
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}; |
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static inline int mdio_wait(struct eth_device *dev) |
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static inline int mdio_wait(struct zynq_gem_regs *regs) |
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{ |
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struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; |
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u32 timeout = 20000; |
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/* Wait till MDIO interface is ready to accept a new transaction. */ |
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@ -198,7 +197,7 @@ static u32 phy_setup_op(struct eth_device *dev, u32 phy_addr, u32 regnum, |
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u32 mgtcr; |
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struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; |
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if (mdio_wait(dev)) |
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if (mdio_wait(regs)) |
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return 1; |
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/* Construct mgtcr mask for the operation */ |
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@ -209,7 +208,7 @@ static u32 phy_setup_op(struct eth_device *dev, u32 phy_addr, u32 regnum, |
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/* Write mgtcr and wait for completion */ |
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writel(mgtcr, ®s->phymntnc); |
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if (mdio_wait(dev)) |
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if (mdio_wait(regs)) |
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return 1; |
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if (op == ZYNQ_GEM_PHYMNTNC_OP_R_MASK) |
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