@ -226,17 +226,34 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
/*
* SPL
*
* SRAM Memory layout :
* SRAM Memory layout for gen 5 :
*
* 0xFFFF _0000 . . . . . . Start of SRAM
* 0xFFFF _xxxx . . . . . . Top of stack ( grows down )
* 0xFFFF _yyyy . . . . . . Malloc area
* 0xFFFF _zzzz . . . . . . Global Data
* 0xFFFF _FF00 . . . . . . End of SRAM
*
* SRAM Memory layout for Arria 10 :
* 0xFFE0 _0000 . . . . . . Start of SRAM ( bottom )
* 0xFFE x_xxxx . . . . . . Top of stack ( grows down to bottom )
* 0xFFE y_yyyy . . . . . . Global Data
* 0xFFE z_zzzz . . . . . . Malloc area ( grows up to top )
* 0xFFE3 _FFFF . . . . . . End of SRAM ( top )
*/
# define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR
# define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE
# if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
/* SPL memory allocation configuration, this is for FAT implementation */
# ifndef CONFIG_SYS_SPL_MALLOC_START
# define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
# define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE - \
CONFIG_SYS_SPL_MALLOC_SIZE + \
CONFIG_SYS_INIT_RAM_ADDR )
# endif
# endif
/* SPL SDMMC boot support */
# ifdef CONFIG_SPL_MMC_SUPPORT
# if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
@ -263,7 +280,11 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
/*
* Stack setup
*/
# if defined(CONFIG_TARGET_SOCFPGA_GEN5)
# define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
# elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
# define CONFIG_SPL_STACK CONFIG_SYS_SPL_MALLOC_START
# endif
/* Extra Environment */
# ifndef CONFIG_SPL_BUILD