@ -97,77 +97,6 @@ struct imx_sec_config_fuse_t const imx_sec_config_fuse = {
} ;
# endif
/*
* OCOTP_TESTER3 [ 9 : 8 ] ( see Fusemap Description Table offset 0x440 )
* defines a 2 - bit SPEED_GRADING
*/
# define OCOTP_TESTER3_SPEED_SHIFT 8
# define OCOTP_TESTER3_SPEED_800MHZ 0
# define OCOTP_TESTER3_SPEED_500MHZ 1
# define OCOTP_TESTER3_SPEED_1GHZ 2
# define OCOTP_TESTER3_SPEED_1P2GHZ 3
u32 get_cpu_speed_grade_hz ( void )
{
struct ocotp_regs * ocotp = ( struct ocotp_regs * ) OCOTP_BASE_ADDR ;
struct fuse_bank * bank = & ocotp - > bank [ 1 ] ;
struct fuse_bank1_regs * fuse =
( struct fuse_bank1_regs * ) bank - > fuse_regs ;
uint32_t val ;
val = readl ( & fuse - > tester3 ) ;
val > > = OCOTP_TESTER3_SPEED_SHIFT ;
val & = 0x3 ;
switch ( val ) {
case OCOTP_TESTER3_SPEED_800MHZ :
return 800000000 ;
case OCOTP_TESTER3_SPEED_500MHZ :
return 500000000 ;
case OCOTP_TESTER3_SPEED_1GHZ :
return 1000000000 ;
case OCOTP_TESTER3_SPEED_1P2GHZ :
return 1200000000 ;
}
return 0 ;
}
/*
* OCOTP_TESTER3 [ 7 : 6 ] ( see Fusemap Description Table offset 0x440 )
* defines a 2 - bit SPEED_GRADING
*/
# define OCOTP_TESTER3_TEMP_SHIFT 6
u32 get_cpu_temp_grade ( int * minc , int * maxc )
{
struct ocotp_regs * ocotp = ( struct ocotp_regs * ) OCOTP_BASE_ADDR ;
struct fuse_bank * bank = & ocotp - > bank [ 1 ] ;
struct fuse_bank1_regs * fuse =
( struct fuse_bank1_regs * ) bank - > fuse_regs ;
uint32_t val ;
val = readl ( & fuse - > tester3 ) ;
val > > = OCOTP_TESTER3_TEMP_SHIFT ;
val & = 0x3 ;
if ( minc & & maxc ) {
if ( val = = TEMP_AUTOMOTIVE ) {
* minc = - 40 ;
* maxc = 125 ;
} else if ( val = = TEMP_INDUSTRIAL ) {
* minc = - 40 ;
* maxc = 105 ;
} else if ( val = = TEMP_EXTCOMMERCIAL ) {
* minc = - 20 ;
* maxc = 105 ;
} else {
* minc = 0 ;
* maxc = 95 ;
}
}
return val ;
}
static bool is_mx7d ( void )
{
struct ocotp_regs * ocotp = ( struct ocotp_regs * ) OCOTP_BASE_ADDR ;