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@ -138,18 +138,6 @@ |
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ |
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/* NAND devices */ |
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#define SECTORSIZE 512 |
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#define NAND_ALLOW_ERASE_ALL |
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#define ADDR_COLUMN 1 |
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#define ADDR_PAGE 2 |
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#define ADDR_COLUMN_PAGE 3 |
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#define NAND_ChipID_UNKNOWN 0x00 |
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#define NAND_MAX_FLOORS 1 |
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#define NAND_MAX_CHIPS 1 |
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#define NAND_NO_RB 1 |
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#define CONFIG_SYS_NAND_WP |
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#define CONFIG_JFFS2_NAND |
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/* nand device jffs2 lives on */ |
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@ -304,23 +292,6 @@ extern unsigned int boot_flash_sec; |
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extern unsigned int boot_flash_type; |
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#endif |
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#define WRITE_NAND_COMMAND(d, adr)\ |
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writel(d, &nand_cs_base->nand_cmd) |
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#define WRITE_NAND_ADDRESS(d, adr)\ |
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writel(d, &nand_cs_base->nand_adr) |
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#define WRITE_NAND(d, adr) writew(d, &nand_cs_base->nand_dat) |
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#define READ_NAND(adr) readl(&nand_cs_base->nand_dat) |
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/* Other NAND Access APIs */ |
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#define NAND_WP_OFF() do {readl(&gpmc_cfg_base->config) |= GPMC_CONFIG_WP; } \ |
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while (0) |
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#define NAND_WP_ON() do {readl(&gpmc_cfg_base->config) &= ~GPMC_CONFIG_WP; } \ |
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while (0) |
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#define NAND_DISABLE_CE(nand) |
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#define NAND_ENABLE_CE(nand) |
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#define NAND_WAIT_READY(nand) udelay(10) |
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/*----------------------------------------------------------------------------
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* SMSC9115 Ethernet from SMSC9118 family |
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*---------------------------------------------------------------------------- |
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