x86: ivybridge: Add FSP support

IvyBridge FSP package is built with a base address at 0xfff80000,
and does not use UPD data region. This adds basic FSP support.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested on link (ivybridge non-FSP)
Tested-by: Simon Glass <sjg@chromium.org>

arch/x86/cpu/ivybridge/Kconfig

@@ -71,4 +71,12 @@ config ENABLE_VMX
 	  will be unable to support virtualisation, or it will run very
 	  slowly.
 
+config FSP_ADDR
+	hex
+	default 0xfff80000
+
+config FSP_USE_UPD
+	bool
+	default n
+
 endif

arch/x86/cpu/ivybridge/Makefile

@@ -4,6 +4,9 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
+ifdef CONFIG_HAVE_FSP
+obj-y += fsp_configs.o ivybridge.o
+else
 obj-y += bd82x6x.o
 obj-y += car.o
 obj-y += cpu.o
@@ -17,3 +20,4 @@ obj-y += northbridge.o
 obj-y += report_platform.o
 obj-y += sata.o
 obj-y += sdram.o
+endif

arch/x86/cpu/ivybridge/fsp_configs.c

@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <asm/fsp/fsp_support.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void update_fsp_configs(struct fsp_config_data *config,
+			struct fspinit_rtbuf *rt_buf)
+{
+	struct platform_config *plat_config = &config->plat_config;
+	struct memory_config *mem_config = &config->mem_config;
+	const void *blob = gd->fdt_blob;
+	int node;
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_IVYBRIDGE_FSP);
+	if (node < 0) {
+		debug("%s: Cannot find FSP node\n", __func__);
+		return;
+	}
+
+	plat_config->enable_ht =
+		fdtdec_get_bool(blob, node, "fsp,enable-ht");
+	plat_config->enable_turbo =
+		fdtdec_get_bool(blob, node, "fsp,enable-turbo");
+	plat_config->enable_memory_down =
+		fdtdec_get_bool(blob, node, "fsp,enable-memory-down");
+	plat_config->enable_fast_boot =
+		fdtdec_get_bool(blob, node, "fsp,enable-fast-boot");
+
+	/* Initialize runtime buffer for fsp_init() */
+	rt_buf->stack_top = config->common.stack_top - 32;
+	rt_buf->boot_mode = config->common.boot_mode;
+	rt_buf->plat_config = plat_config;
+
+	if (plat_config->enable_memory_down)
+		rt_buf->mem_config = mem_config;
+	else
+		rt_buf->mem_config = NULL;
+}

arch/x86/cpu/ivybridge/ivybridge.c

@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/post.h>
+#include <asm/processor.h>
+
+int arch_cpu_init(void)
+{
+	int ret;
+
+	post_code(POST_CPU_INIT);
+
+	ret = x86_cpu_init_f();
+	if (ret)
+		return ret;
+
+	return 0;
+}

arch/x86/include/asm/arch-ivybridge/fsp/fsp_configs.h

@@ -0,0 +1,40 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __FSP_CONFIGS_H__
+#define __FSP_CONFIGS_H__
+
+struct platform_config {
+	u8 enable_ht;
+	u8 enable_turbo;
+	u8 enable_memory_down;
+	u8 enable_fast_boot;
+};
+
+/*
+ * Dummy structure for now as currently only SPD is verified in U-Boot.
+ *
+ * We can add the missing parameters when adding support on a board with
+ * memory down configuration.
+ */
+struct memory_config {
+	u8 dummy;
+};
+
+struct fsp_config_data {
+	struct fsp_cfg_common common;
+	struct platform_config plat_config;
+	struct memory_config mem_config;
+};
+
+struct fspinit_rtbuf {
+	u32 stack_top;
+	u32 boot_mode;
+	struct platform_config *plat_config;
+	struct memory_config *mem_config;
+};
+
+#endif /* __FSP_CONFIGS_H__ */

arch/x86/include/asm/arch-ivybridge/fsp/fsp_vpd.h

@@ -0,0 +1,12 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __FSP_VPD_H__
+#define __FSP_VPD_H__
+
+/* IvyBridge FSP does not support VPD/UPD */
+
+#endif